Lakshmi narain college of technology

A presentation on Tomasulo's algorithm and Scoreboarding

Submitted to Er. Nutan bhati Submitted by Parth kale

Contents

Introduction. About Dynamic scheduling. Pros and cons of Dynamic Scheduling. Tomasulo's algorithm. Scoreboarding.

Introduction

As we all know scheduling is a very known concept to us .

Dynamic scheduling

Dynamic scheduling introduces the idea of out of order execution i.e an instruction will be executed as soon as its data operands are available. It includes the probability of WAR and WAW hazards. It may generate imprecise exceptions as well, i.e the processor state when the exception is generated does not look as if the instructions were executed in sequential order.

Approaches to dynamic scheduling

Tomasulo's algorithm

Scoreboarding technique

Score-boarding

The scoreboard is a central location where information about the currently active instructions is kept. The scoreboard determines when and where an instruction begins and ends execution. Forwarding is not supported during this dynamic
scheduling technique.

SCOREBOARD STAGES
ISSUE (IN ORDER): Check for structural hazards Check for WAW hazards on destination ops

READ OPERANDS (OUT OF ORDER) Check for RAW hazards

 EXECUTION (OUTOFORDER) Execution completion depends on latency of FUs Execution completion of LD/ST depends on cache hit/miss latencies) WRITE RESULTS (OUTOFORDER) Check for WAR hazards on destination ops Check for structural hazards in write RF

Score boarding limitation

The major limitation of this scheme is that no forwarding is implemented from the execution unit.Subsequent instructions have to wait till the value has been written into the registers.

Tomasulo's algorithm

Tomasulos algorithm there is a common data bus between all the units that collects all the results. So an instruction can look into the CDB and not any register for a value provided by a previous instruction. Further the overall number of cycles is reduced for this scheme.

Reservation stations: A reservation station fetches and buffers operands as soon as they are available. Provide register renaming for destination registers as well. May be split i.e every functional unit has its own RS or unified i.e a common RS for all units. Each reservation station holds an instruction that has been issued and is awaiting execution at a functional unit.It also stores the operands or the names of the RSs that will provide the operands

Tomasulo's algorithm

Stages of Tomasulo's algorithm

Dispatch (D): An instruction proceeds from dispatch to issue when it reaches the front of the instruction queue and there is a free reservation station (RSV) for the functional unit (FU) it needs. In the case of loads and stores, there must also be a slot in the Load/Store Address Queue

Issue (I): In the issue stage, the instruction collects any values that it needs from the CDB (including branch outcomes, see the section on branches), based on the tag that is broadcast. If at the end of the cycle, the instruction would have both operands available, it will proceed the execute stage.

Execute : In this model, we assume that all functional units are fully pipelined. Note that an instruction will reserve its reservation station until the end of the writeback stage. An instruction waiting for this reservation station will occupy it (and be in the Issue stage) immediately afterwards.

Writeback (WB): Once an instruction has finished executing, it will write its result to the CDB. We assume every functional unit has a dedicated CDB. During writeback, the appropriate register will be updated in the register file, if the non speculative RST entry matches the tag.