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Slide 1 EE100 Summer 2008 Bharathwaj Muthuswamy

EE100Su08 Lecture #14 (July 28


th
2008)
Outline
MultiSim licenses: trying to get new licenses
HW #2: regrade deadline: Monday, 07/28, 5:00 pm
PST.
Midterm #1 regrades: DONE!
QUESTIONS?
Bode plots
Diodes: Introduction
Reading
Appendix E* (skip second-order resonance bode
plots), Chapter 1 from your reader (skip second-order
resonance bode plots)
Chapter 2 from your reader (Diode Circuits)
Slide 2 EE100 Summer 2008 Bharathwaj Muthuswamy
Example Circuit
) 1 ( ) / 1
) / 1 (
2 2
C R j
A
C j R
jwC A
IN
OUT
e e +
=
+
=
V
V
IN
OUT
nction TransferFu
V
V
=

+
AV
T
R
2
R
1
+

V
T
+

V
OUT
C
V
IN
+

c R
c
IN
OUT
Z Z
AZ
+
=
V
V
A = 100
R
1
= 100,000 Ohms
R
2
= 1000 Ohms
C = 10 uF
Slide 3 EE100 Summer 2008 Bharathwaj Muthuswamy
Example Circuit

+
AV
T
R
2
R
1
+

V
T
+

V
OUT
C
V
IN
+

A = 100
R
1
= 100,000 Ohms
R
2
= 1000 Ohms
C = 10 uF
Slide 4 EE100 Summer 2008 Bharathwaj Muthuswamy
Example Circuit

+
AV
T
R
2
R
1
+

V
T
+

V
OUT
C
V
IN
+

A = 100
R
1
= 100,000 Ohms
R
2
= 1000 Ohms
C = 10 uF
Slide 5 EE100 Summer 2008 Bharathwaj Muthuswamy
Slide 6 EE100 Summer 2008 Bharathwaj Muthuswamy
Bode Plot: Label as dB
0
20
40
60
-20
10 100 1000
1
Radian
Frequency
) 1 (
2
C R j
A
IN
OUT
e +
=
V
V
A = 100
R
2
= 1000 Ohms
C = 10 uF
w
p
= 1/(R
2
C) = 100
A
M
a
g
n
i
t
u
d
e

i
n

d
B

Note: Magnitude in dB = 20 log
10
(V
OUT
/V
IN
)
Slide 7 EE100 Summer 2008 Bharathwaj Muthuswamy
Slide 8 EE100 Summer 2008 Bharathwaj Muthuswamy
Example: Phase plot
) 1 (
2
C R j
A
IN
OUT
e +
=
V
V
-90
0
90
180
-180
10 100 1000
1
Radian
Frequency
-45
o
A = 100
R
2
= 1000 Ohms
C = 10 uF
P
h
a
s
e

Actual value is
45 45 0 }
45 2
0 100
{ }
| 1 |
0 100
{ = =
Z
Z
=
+
Z
Phase
j
Phase
Slide 9 EE100 Summer 2008 Bharathwaj Muthuswamy
Transfer Function
Transfer function is a function of frequency
Complex quantity
Both magnitude and phase are function of
frequency
Two Port
filter network
V
in
V
out
( )
( )
( )
out
out in
in
V
f
V
H f
u u
u
= = Z
= Z
out
in
V
H
V
H(f)
Slide 10 EE100 Summer 2008 Bharathwaj Muthuswamy
Filters
Circuit designed to retain a certain
frequency range and discard others
Low-pass: pass low frequencies and reject high
frequencies
High-pass: pass high frequencies and reject low
frequencies
Band-pass: pass some particular range of
frequencies, reject other frequencies outside
that band
Notch: reject a range of frequencies and pass
all other frequencies
Slide 11 EE100 Summer 2008 Bharathwaj Muthuswamy
Common Filter Transfer Function vs. Freq
(Magnitude Plots shown)
( ) H f
Frequency
High Pass
( ) H f
Frequency
Low Pass
( ) H f
Frequency
Band Pass
Frequency
Band Reject
( ) H f
Slide 12 EE100 Summer 2008 Bharathwaj Muthuswamy
First-Order Lowpass Filter
( )
( )
1
2
1
2
1 ( ) 1 1
tan
1 ( ) 1
1
1 1
2
( )
1
( ) , tan
1
B B
B
B
j C
RC
j C R j RC
RC
Let and f
RC RC
H f
f
H f
f
f
f
e
e
e e
e
e
t
u
u

= = = Z
+ +
+
= =
= Z
| |
= =
|
\ .
| |
+
|
\ .
C
V
H(f) =
V
H(f)
R
+
-
C
V
V
C

+
-
1/ 2
10 10
1
( ) 2
2
( ) 1
20log 20( ) log 2 3
(0) 2
B
B
H f
H f
dB
H

= =
= =
Slide 13 EE100 Summer 2008 Bharathwaj Muthuswamy
Slide 14 EE100 Summer 2008 Bharathwaj Muthuswamy
Slide 15 EE100 Summer 2008 Bharathwaj Muthuswamy
Slide 16 EE100 Summer 2008 Bharathwaj Muthuswamy
First-Order Highpass Filter
( )
( )
( )
1
2
1
2
tan
1 ( ) 1 2
1
( ) , tan
2
1
R
B
B
B
RC
R j RC
RC
j C R j RC
RC
f
f
f
H f
f
f
f
e
e t
e
e e
e
t
u

(
= = = Z
(
+ +

+
| |
|
| |
\ .
= =
|
\ .
| |
+
|
\ .
V
H(f) =
V
R
+
-
C
V
V
C

+
-
1/ 2
10 10
1
( ) 2
2
( ) 1
20log 20( ) log 2 3
(0) 2
B
B
H f
H f
dB
H

= =
= =
V
R

Slide 17 EE100 Summer 2008 Bharathwaj Muthuswamy
First-Order Lowpass Filter
1
2
1
2
1 1
tan
1
1
2
( )
1
( ) , tan
1
R
B B
B
B
L
j L
R
L
R
R
R R
Let and f
L L
H f
f
H f
f
f
f
e
e
e
e
t
u
u

| |
= = Z
|
\ .
| | +
+
|
\ .
= =
= Z
| |
= =
|
\ .
| |
+
|
\ .
V
H(f) =
V
H(f)
R
+
-
L
V
V
L

+
-
V
R

Slide 18 EE100 Summer 2008 Bharathwaj Muthuswamy
First-Order Highpass Filter
1
2
1
2
tan
2
1
1
2
( )
( ) , tan
2
1
L
B B
B
B
B
j L L
L
R R
j L
R
L
R
R
R R
Let and f
L L
H f
f
f
f
H f
f
f
f
e e
t e
e
e
e
t
u
t
u

(
| |
= = Z
|
(
\ .

| | +
+
|
\ .
= =
= Z
| |
|
| |
\ .
= =
|
\ .
| |
+
|
\ .
V
H(f) =
V
H(f)
R
+
-
L
V
V
L

+
-
V
R

Slide 19 EE100 Summer 2008 Bharathwaj Muthuswamy
First-Order Filter Circuits
L
+

V
S
C
R
Low Pass
High
Pass
H
R
= R / (R + jeL)
H
L
= jeL / (R + jeL)
+

V
S
R
High Pass
Low
Pass
H
R
= R / (R + 1/jeC)
H
C
= (1/jeC) / (R + 1/jeC)
Slide 20 EE100 Summer 2008 Bharathwaj Muthuswamy
Slide 21 EE100 Summer 2008 Bharathwaj Muthuswamy
Diodes
OUTLINE
Diode Model(s)
Circuit Analysis with Diodes
Diode Logic Gates
Load Line Analysis
Zener Diodes
Diode Peak Detector
Reading
Reader: Chapter 2
Slide 22 EE100 Summer 2008 Bharathwaj Muthuswamy
Diode Physical Behavior and Equation
N
type
P
type
Schematic Device
+

V
I
I
Symbol
+

V
Qualitative I-V characteristics:
I
V
V positive,
easy
conduction
V negative,
no
conduction
Quantitative I-V characteristics:
) 1 e ( I I
kT qV
0
=
In which kT/q is 0.026V and I
O
is a
constant depending on diode area.
Typical values: 10
-12
to 10
-16
A.
Interestingly, the graph of this
equation looks just like the figure to
the left.
A non-ideality factor n times kT/q is often included.
Slide 23 EE100 Summer 2008 Bharathwaj Muthuswamy
Diode Ideal (Perfect Rectifier) Model
The equation
is graphed below for
1)
kT
qV
exp( I I
0
=
A 10 I
15
0

=
The characteristic is described as
a rectifier that is, a device that
permits current to pass in only one
direction. (The hydraulic analog is
a check value.) Hence the
symbol:
+
V
I
Simple Perfect Rectifier Model
If we can ignore the small forward-
bias voltage drop of a diode, a
simple effective model is the
perfect rectifier, whose I-V
characteristic is given below:
V
I
Reverse bias
0 V any , 0 I < ~
Forward bias
0 I any , 0 V > ~
A perfect rectifier
0
2
4
6
8
10
-5 0 5 10
Current
in mA
Forward
Voltage in V
Slide 24 EE100 Summer 2008 Bharathwaj Muthuswamy
I-V Characteristics
In forward bias (+ on p-side) we
have almost unlimited flow
(very low resistance).
Qualitatively, the I-V
characteristics must look like:
V
F

I
current increases
rapidly with V
V
F

I
The current is close
to zero for any
negative bias
In reverse bias (+ on n-side)
almost no current can flow.
Qualitatively, the I-V
characteristics must look like:

Slide 25 EE100 Summer 2008 Bharathwaj Muthuswamy
pn-Junction Reverse Breakdown
As the reverse bias voltage increases, the peak electric
field in the depletion region increases. When the electric
field exceeds a critical value (E
crit
~ 2x10
5
V/cm), the
reverse current shows a dramatic increase:
I
D
(A)
V
D
(V)
reverse (leakage) current
forward current
breakdown voltage V
BD

Slide 26 EE100 Summer 2008 Bharathwaj Muthuswamy
The pn Junction I vs. V Equation
In EECS 105, 130, and other courses you will learn why the I vs. V
relationship for PN junctions is of the form
) 1 e ( I I
kT qV
0
=
where I
0
is a constant proportional to junction area and depending
on doping in P and N regions,
k is Boltzman constant, and T is absolute temperature.
a typical value for I
0
is
, 10 6 . 1 harge c electronic q
19
= =
, K at300 0.026V q KT = A 10 10
15 12

We note that in forward bias, I increases exponentially and is in
the A-mA range for voltages typically in the range of 0.6-0.8V.
In reverse bias, the current is essentially zero.
I-V characteristic of PN junctions
Slide 27 EE100 Summer 2008 Bharathwaj Muthuswamy
reverse bias
forward bias
An ideal diode passes current only in one direction.
An ideal diode has the following properties:
when I
D
> 0, V
D
= 0
when V
D
< 0, I
D
= 0
Ideal Diode Model of PN Diode
I
D
(A)
V
D
(V)
I
D
+

V
D



+
V
D


I
D
Circuit symbol I-V characteristic
Diode behaves like a switch:
closed in forward bias mode
open in reverse bias mode
Switch model
Slide 28 EE100 Summer 2008 Bharathwaj Muthuswamy
Diode Large-Signal Model (0.7 V Drop)
Improved Large-Signal Diode Model:
If we choose not to ignore the small
forward-bias voltage drop of a
diode, it is a very good
approximation to regard the voltage
drop in forward bias as a constant,
about 0.7V. the Large signal
model results.
Reverse bias
0 V any , 0 I < ~
Forward bias
0 I any , 0.7 V
> ~
0
100
200
300
400
-5 -3 -1 1
forward bias (V)
C
u
r
r
e
n
t

(
m
i
c
r
o
a
m
p
)
+

V
I
The Large-Signal
Diode Model
- 0.7+
V
I
0.7
Slide 29 EE100 Summer 2008 Bharathwaj Muthuswamy
Large-Signal Diode Model
reverse bias
forward bias
I
D
(A)
V
D
(V)
I
D
+

V
D



+

V
D



I
D
Circuit symbol I-V characteristic Switch model
V
Don

+

V
Don

RULE 1: When I
D
> 0, V
D
= V
Don

RULE 2: When V
D
< V
Don
, I
D
= 0
Diode behaves like a voltage
source in series with a switch:
closed in forward bias mode
open in reverse bias mode
For a Si pn diode, V
Don
~ 0.7 V

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