By Robert Sheehan, Principal Applications Engineer, National Semiconductor, Santa Clara, Calif.

A breakdown of current-mode control into its component parts provides designers with a greater intuitive understanding of converter operation. This analysis also sets the stage for the introduction of a unied model for xed-frequency CCM current-mode control.

hen it comes to understanding currentmode control, one thing becomes painfully obvious: nine out of ten experts do not agree. For xed-frequency operation, the vast majority of theory and modeling has focused on the classic peak current-mode method with a xed-slope compensating ramp. Some theory has been developed for average current-mode control but little exists for other methods. Of the newer architectures developed, emulated peak current-mode control solves the problem of large stepdown ratios (high input voltage to low output voltage) while maintaining good noise immunity. While the classic peak current-mode theory can be used for design analysis with reasonable results, it doesnt explain all aspects of current-mode operation. A fresh approach to modeling xedfrequency continuous conduction-mode, current-mode control provides the solution for any peak- or valley-derived architecture, including the emulated method.
Power Electronics Technology May 2007

In the rst part of this two-part article, the basic operation of current-mode control is broken down into component parts, allowing a greater intuitive understanding for the practical designer. A comparison of the modulator gain is made with voltage-mode operation. A simple analogy allows the optimal slope-compensation requirement to be met without any complicated equations. In the second part of this article, which will appear in the June 2007 issue, a unied model using general gain parameters is developed, along with simplied design equations. An in-depth treatment of the analysis and theory is presented for the advanced reader. This general modeling technique explains how previous models can coexist and complement each other on various aspects of the currentmode control theory.

Current-Mode Control Fundamentals

There are a great deal of misconceptions and misinformation about current-mode control within the power elec14
www.powerelectronics.com

Fig. 1. A typical voltage-mode PWM circuit uses a control voltage fed to a comparator to modulate the duty cycle of the regulator output stage.

Fig. 2. For xed-frequency operation, an increase in the control voltage causes an increase in the duty cycle of the output of the Fig. 1 circuit.

tronics industry. Papers on the topic that have been written at the graduate or Ph.D. level are hard to understand, and many of the concepts introduced are difcult to put into practical use. This article aims to demystify current-mode control, and cut through the myths and misconceptions of its operation. For current-mode control, there are three factors to consider. First, an ideal current-mode converter is only dependent on the dc or average inductor current. The inner current loop turns the inductor into a voltage-controlled current source, effectively removing the inductor from the outer voltage control loop at dc and low frequency. The second factor to consider is modulator gain, which is dependent on the effective slope of the ramp presented to the modulating comparator input. Each operating mode will have a unique characteristic equation for the modulator gain. The third consideration is slope compensation. The requirement for slope compensation is dependent on the
www.powerelectronics.com

relationship of the average current to the value of current at the time the sample is taken. For xed-frequency operation, if the sampled current were equal to the average current, there would be no requirement for slope compensation.

Current-Mode Operation
Whether the current-mode converter uses the peak, valley, average or sample-and-hold method is of secondary importance to the operation of the current loop. As long as the dc current is sampled, current-mode operation is maintained. The current-loop gain splits the complex-conjugate pole of the output lter into two real poles, so that the characteristics of the output lter are set by the capacitor and load resistor. Only when the impedance of the output inductor equals the current-loop gain does the inductor pole reappear at higher frequencies. To understand how this works, voltage-mode operation is rst examined. The basic concept of pulse-width modulation (PWM) is used to establish the criteria for the modulator 15
Power Electronics Technology May 2007

CURRENT-MODE CONTROL
gain. This allows a linear model to be developed, illustrating the dc- and ac-gain characteristics. Having established the basic modulator concept, the current loop is added by sensing the inductor current and feeding the sensed signal back to the modulator. For simplicity, the buck regulator is used to illustrate the operation.

Voltage-Mode Control
Fig. 1 shows a voltage-mode PWM cir- Fig. 3. A basic voltage-mode buck controller uses a dedicated circuit to generate V . RAMP cuit. It uses a comparator to modulate the duty cycle (D). The xed-frequency operation of this circuit is shown in Fig. 2, where a sawtooth voltage ramp (VRAMP) is presented to the inverting input. The control or error voltage is applied to the noninverting input. The modulator gain (FM) is dened as the change in control voltage (VC), which causes the duty cycle to go from 0% to 100%: D 1 Fig. 4. Because the voltage ramp of the voltage-mode buck regulator FM = = . VC VRAMP is generated internally, the inductor current is not part of the PWM RAM The modulator voltage gain (KM), which is the gain from control loop. the control voltage to the switch voltage (VSW), is dened as: V K M = VIN FM = IN , VRAMP where VIN is the voltage applied to S1 in Fig. 3. For voltage-mode operation, the control-to-output transfer function is found by multiplying the modulator voltage gain by the output-lter response. With VIN = 10 V and VRAMP = 1 V, KM = 10, which is 20 dB. Figs. 3, 4 and 5 show the schematic, the linear model and the frequency re sponse plot for a voltage-mode buck regulator, respectively. The complex-conjugate pole of the LC output lter is clearly seen, with the resulting 180-degree phase shift occurring at approximately 8 kHz.

Current Mode
The same PWM function occurs for current-mode control, except that monitoring the inductor current creates the ramp. This signal is comprised of two parts: the ac-ripple current and the dc or average value of the inductor current. The output of the current-sense amplier is summed with an external ramp (VSLOPE) to produce VRAMP at the inverting input of the comparator. In Fig. 6, the effective VRAMP = 1 V, which was used for the voltage-mode modulator. With VIN = 10 V, the modulator voltage gain KM = 10. The linear model for the current loop is an amplier (Fig. 7), which feeds back the dc value of the inductor current, creating a voltage-controlled current source. This is what makes the inductor disappear at dc and low frequencies (Fig. 8) while the ac-ripple current sets the modulator gain. The current-sense gain (RI) is usually expressed as the product of the current-sense amplier gain (GI) and the resistance of the sense resistor (RS): RI = GI RS.
Power Electronics Technology May 2007

Fig. 5. The frequency response of the Fig. 3 circuit includes a gain reduction and phase shift caused by the LC lter, formed by L and COUT , at approximately 8 kHz.

The current-sense gain is an equivalent resistance, the units of which are V/A. The current-loop gain is the product of the modulator voltage gain and the current-sense gain, which is also in units of V/A. The modulator voltage gain is reduced by the equivalent divider ratio of the load resistor (ROUT) and the current-loop gain KM RI. This sets the dc value of the control-to-output gain. Neglecting the dc loss of the sense resistor: VOUT R OUT = KM . VC R OUT + (K M R I ) This is usually written in factored form: VOUT R OUT 1 = OUT . R OUT VC RI 1+ KM RI 16
www.powerelectronics.com

CURRENT-MODE CONTROL
The dominant pole in the transfer function (P) appears when the impedance of the output capacitor (C OUT ) equals the parallel impedance of the load resistor and the current-loop gain: P = 1 C OUT OUT 1 R 1 + . KM RI

O OUT

The inductor pole (L) appears when the impedance of the inductor equals the current-loop gain: KM RI L = . L The current loop creates the effect of a lossless damping resistor, splitting the complex-conjugate pole of the output lter into two real poles. For current-mode control, the ideal steady-state modulator Fig. 6. The current-mode buck regulator utilizes inductor current to create the PWM control gain may be modified, depending on ramp, shown here with slope compensation. whether the external ramp is xed or is proportional to some combination of input and output voltage. Further modication of the gain is realized when the input and output voltages are perturbed to derive the effective small-signal terms. However, the concepts remain valid despite small-signal modication of the ideal steadystate value.

Current-Mode Slope Compensation

The difference between the average inductor current and the dc value of the sampled inductor current can cause instability for certain operating conditions. This instability is known as subharmonic oscillation, which occurs when the inductor ripple current does not return to its initial value by the start of the next switching cycle. Subharmonic oscillation is normally characterized by observing alternating wide and narrow pulses at the switch node. Adding an external ramp (slope compensation) to the current-sense signal prevents this oscillation. Formal derivation of the criteria for slope compensation is covered in reference 1. For the purpose of this analysis, a discussion of feed-forward techniques and some illustrations will sufce. For the buck regulator, the modulator voltage gain (KM) was found to be VIN / VRAMP . For voltage-mode operation, the gain varies with VIN. Feed-forward techniques are often employed to stabilize the gain. This is typically done by generating VRAMP with a voltage-controlled current source or a xed resistor charging a capacitor from VIN. Peak current-mode control is often referred to as having inherent line feed forward. While basically true, this is not quite ideal. The sensed inductor up-slope which is used as VRAMP / T for the modulator, where T is the switching period is equal to (VIN - VO) (RI / L). In order to stabilize the gain, an external ramp of VSLOPE / T = VO (RI / L) must be added to the current-sense signal. The result is VRAMP / T = VIN (RI / L).
Power Electronics Technology May 2007

Fig. 7. The linear model for the current-mode buck regulator includes a voltage-controlled current source that reduces the inuence of the inductor at low frequencies.

Fig. 8. The low-frequency modulator gain of the Fig. 6 circuit is primarily set by the ac-ripple current.

Fig. 9a and 9b shows the under-damped condition, where subharmonic oscillation occurs with a duty cycle greater than 50%. The relationship of Q as shown in the graphs is dened in reference 1. To demonstrate the under-damped condition, VSLOPE / T = (0.1) VO (RI / L). By adding a 18
www.powerelectronics.com

CURRENT-MODE CONTROL

Fig. 9. Subharmonic oscillation can occur in peak current-mode control once the duty cycle exceeds 50% (waveforms a and b). However, through the use of slope compensation (waveforms c and d), oscillation is damped within a single switching cycle, regardless of duty cycle.

compensating ramp equal to the down-slope of the inductor current, any tendency toward subharmonic oscillation is damped within one switching cycle. These conditions are shown in Fig. 9c and 9d. For peak current-mode control, when the slope of the compensating ramp is equal to one-half the down-slope of the inductor current, innite line rejection is achieved. Though a desirable operating point, this represents a special case. As the theoretical limit for stability of the current loop, the tendency toward subharmonic oscillation increases as the duty cycle approaches unity. To ensure stability of the current loop, the optimal compensating slope remains equal to one times the down-slope of the inductor current. For valley current mode, the down-slope of the inductor current is presented to the modulator, which is VO (RI / L). This transposes the function of the external ramp. It is now necessary to use slope compensation equal to the up-slope of the inductor current, so VSLOPE / T = (VIN - VO) (RI / L). Again, the result is VRAMP / T = VIN (RI / L). For emulated peak current mode, the valley current is sampled on the down-slope of the inductor current. This is used as the dc value of current to start the next cycle. A slope-compensating ramp is added to produce VRAMP at the modulator input. The primary application for emulated peak current mode is high input voltage to low output voltage operating at a narrow duty cycle. In any practical design, device capacitance and wiring inductance may cause a signicant leading-edge spike on the current-sense waveform, followed
www.powerelectronics.com

From .3J To 540kJ

Transient Voltage T Surge Suppressors (TVSS) Metal Oxide Varistors (MOVs) Selenium Voltage Suppressors Silicon Carbide Varistors (SiCV)

CKE

Lucernemines, PA 15754 (724) 479-3533 (724) 479-3537 FAX

e-mail: info@cke.com www.cke.com

19
Power Electronics Technology May 2007

CURRENT-MODE CONTROL
by an extended period of ringing. By sampling the inductor current at the end of the switching cycle and adding an external ramp, the minimum on time can be signicantly reduced, without the need for blanking or ltering, which is normally required for peak current-mode control. To determine the correct slope compensation, the most salient feature is the absence of any ramp from the inductor, since only the dc value of the valley current is sampled. Formal derivation in reference 1 has shown the optimal compensation to be VSLOPE /T = VRAMP / T = VIN (RI / L). This is consistent with the results for both peak and valley buck regulators. Since the slope compensation requirement is independent of the duty cycle, an interesting observation can be made. If the slope of the ramp is made less than (0.5) VIN (RI / L), the circuit will exhibit subharmonic oscillation at any duty cycle. By identifying the appropriate sensed inductor slope, it is easy to nd the correct slope-compensating ramp.

Rethinking Assumptions
The basic current-mode buck regulator linear model has been developed with gain terms that can be related directly to the model. The three main considerations for current-mode control can be summarized as follows: First, for current-mode operation, the dc or average value of the inductor current must be sampled. Second, the modulator gain is set by the effective slope of the ramp presented to the modulating comparator input. Third, the requirement for slope compensation is dependent upon the relationship of the sampled current to the average value of the inductor current. Previous researchers have assumed a xed ramp for the slope compensation to simplify the analysis. When analyzing the peak current-mode buck with a xed-slope compensating ramp, the dc-modulator gain and the high-frequency criteria for slope compensation are identical. This result has been used to form conclusions about current-mode operation in general. Since the optimal slope of the compensating ramp for this mode is proportional to the down-slope of the inductor current, the preferred method should be to make the compensating ramp proportional to VO . Though seemingly trivial, the consequence of doing this is profound. In the second part of this article, general gain parameters and sampling gain terms will be introduced. The effect of proportional ramp terms and new operating modes identify limitations of existing models, which provides direction for further research. PETech

PwrBlade Power Distribution Connector System Ideal for servers, storage systems, fault-tolerant computers, uninterruptible power systems, and redundant power distribution systems. The one-piece PwrBlade connector mixes power and signal contacts for a variety of custom design congurations. www.fciconnect.com/pwrblade

Bus Bar Simplies Complex Wiring FCIs Laminated Bus Bars and Power Distribution Systems solve power distribution challenges in electronic systems, such as wireless base stations, switches, storage enclosures, routers, and servers. Where space, temperature rise, current or voltage drops are critical concerns, FCI bus bars replace bulky cable harnesses, optimize cabinet space, and increase power transmission efciency. Multilayer bus bars may be equipped with cables ultra-sonically welded to specic conductors, clinch studs, integrally stamped connector contacts, as well as active components. www.fciconnect.com

General SlopeCompensation Criteria

For any mode of operation (peak, valley or emulated), the optimal slope of the ramp presented to the modulating comparator input is equal to the sum of the absolute values of the inductor up-slope and down-slope scaled by the current-sense gain. This will cause any tendency toward subharmonic oscillation to damp in one switching cycle. For the buck regulator, this is equivalent to a ramp whose slope is VIN (RI / L). Up-slope = (VIN - VO) (RI / L) Down-slope = VO (RI / L). For the boost regulator, this is equivalent to a ramp whose slope is VO (RI / L). Up-slope = VIN (RI / L) Down-slope = (VO - VIN) (RI / L). For the buck-boost regulator, this is equivalent to a ramp whose slope is (VIN + VO) (RI / L). Up-slope = VIN (RI / L) Down-slope = VO (RI / L). To avoid confusion, VIN and VO represent the magnitude of the input and output voltages as a positive quantity. 20

AirMax VS Power Connectors FCIs compact and cost-effective AirMax VS power connectors address system designers need to carry higher current to faster, more powerful processors on add-in cards. A 2x2 connector has a current-carrying capacity of up to 80 amps and a voltage rating of 150V and are used in data, industrial or communications equipment, as well as in medical electronics and instrumentation. www.fciconnect.com/airmax

Reference
1. Sheehan, Robert. Emulated Current Mode Control for Buck Regulators Using Sample and Hold Technique, 2006 Power Electronics Technology Exhibition and Conference. (An updated version of this paper, including complete appendix material, is available from National Semiconductor.)
www.powerelectronics.com

Power Electronics Technology May 2007