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White Paper

Ethernet Differential Return Loss Measurement on a Digital Storage Oscilloscope


John Pickerd and Kan Tan Tektronix Inc. Beaverton, Oregon, USA Abstract: The IEEE 802.3 [5] identifies several compliance tests to ensure equipment interoperability. Many of these tests are performed using a digital storage oscilloscope and an arbitrary waveform generator. Media dependent interface (MDI) return loss is among the most crucial tests that typically have been performed by using a vector network analyzer thereby implying additional resource requirements. Recent development of Ethernet compliance test software for Tektronix TDS7000 series oscilloscopes incorporates a test fixture combined with AWG, signal source, and differential probes that enables the oscilloscope to perform the required differential return loss measurement. In addition a patent application is in process for this system. The software application on the oscilloscope compares the return loss result against the IEEE 802.3 limits and generates the desired reports. This paper describes the test and measurement setup and the theory behind this new system that enables efficient use of resources and shorter validation cycles. I. Introduction

IEEE 802.3 standards describe a number of tests that need to be performed for compliance. Return loss is one of the crucial tests because it provides an important indicator of the performance of a transmission system. The standard also mentions that the return loss is tested for a cabling system having an impedance of 100 + 15%. Implying the test needs to be performed for 85 , 100 and 115 .

Figure 1. Oscilloscope screen showing return loss limit mask, return loss plots, and report summary indicating a pass.

II. Understanding Return Loss The following equation defines return loss according to [1] as it is displayed on most vector network analyzers: (1) Return loss := 20 log ( | Vr / Vi | )

Where Vi is the forward incident voltage at a point in a transmission channel and Vr is the reflected voltage at that point. Return loss describes the degree of mismatch between a load and the characteristic impedance of a transmission system. It is a non-dissipating loss term. For the case where the load is a short circuit, 100% of the voltage is reflected giving a return loss value of zero. The same is true for the case where the load is an open circuit. When the load is equal to the characteristic impedance, Z0, the reflected voltage is zero. That results in a return loss of minus infinity. Refer to [1]. Reference [5] specifies a return loss limit curve that 1000BaseT Ethernet DUT must adhere too for reliable signal transmission. Section 40.7.2.3 states Each link segment duplex channel shall meet or exceed the return loss specified in the following equation at all frequencies from 1 MHz to 100 MHz. It gives equations for return loss as positive values, however, it is more common to represent return loss as defined in [1] by Smith. This is the same format used in network analyzers. Thus the limit line is 15 dB for frequencies in the range of 1 MHz to 20 MHz. For frequencies above 20 MHz to 100 MHz the limit line is given by: (2) limit line := -15 + 10 log( f / 20 )

The resulting curve is represented in Figure 1 and in Figure 18. A DUT must have return loss that is below this line. As mentioned in the Introduction above it is a requirement to plot the return loss values with load impedance of 85 and 115 in addition to the reference of 100 . The mathematics are described in detail in section X. The 85 and 115 ohm cases are obtained from the measurement based on 100 by performing a mathematical transformation. An example of these plots is shown in Figure 1. III. DUT Signal Characteristics The 1000BaseT return loss measurement on transmitter pairs is to be performed while the DUT is placed into test mode 4 transmitting a pseudo random test signal. The characteristics of the DUT signal may be analyzed using the oscilloscope time display and its FFT based spectral analyzer display. A typical DUT is shown below in Figure 2 illustrating voltage of approximately 2 Vpp.

Figure 2. Time domain display of a 1000BaseT DUT operating in test mode 4.

The frequency domain view of the signal shown in Figure 2 is obtained using the FFT spectral analyzer of the oscilloscope as shown in Figure 3. This spectral view illustrates that there is a large number of harmonics in the DUT. Looking at the expanded view of the same spectrum in Figure 4 the approximate spacing of the harmonics in this signal is 61.25 kHz.

Figure 3. Spectral view of DUT signal. Vertical scale is 10 dB/division and horizontal scale is 31.2 MHz/division. The vertical cursor is positioned at 100 MHz.

Figure 4. Expanded view of spectrum components for a given DUT. Note spacing of harmonic components is approximately 61.25 kHz.

A return loss measurement is performed by stimulating the device under test with a sine wave at the desired frequency. If the DUT is generating signals at the same frequency as the stimulus then an error in the measurement will occur unless steps are taken to minimize that error. This implies careful testing to avoid harmonic interference. This problem is sometimes overcome by injecting a signal with higher power. However, care must be taken when driving a DUT with a signal larger than 2.8 Vpp. It is possible that some devices have ESD structures that will start to interfere and become nonlinear at about 5 Volts. The Tektronix software application configuration described in this paper minimizes the error in two ways. First sine wave frequencies in the AWG are chosen so that most of them fall in between the harmonics of the DUT. Second the acquired waveform is averaged so that much of the DUT signal is greatly reduced.

IV.

Measurement With a VNA

Ethernet systems require measurement of differential return loss and have a characteristic impedance of 100 ohms. The frequency range of measurement is low with a stop frequency of 100 MHz .This measurement can be performed on a vector network analyzer, VNA. However, most VNAs cannot directly measure differential networks and therefore require an external balun to convert the swept stimulus signal into differential. Next an SMA or BNC to RJ45 breakout fixture board is needed to connect the balun to the DUT. This connection would be made with a short piece of CAT5 Ethernet cable. The end of this cable would be the impedance reference plane where the open, short, and load calibration would be performed. Another issue encountered with the VNA is that calibration is typically performed normalized to a 50 ohm reference rather then the required 100 ohms. However, the VNA may be calibrated with a 100 ohm user defined cal kit so that the correct return loss values are obtained. In order to perform the required open, short, load calibration to remove the effects of the balun and cables from the measurement a custom calibration kit made from female RJ45 connectors is needed. The calibration of a VNA would be performed as a one port calibration and the parameter would be S11 displayed on a log magnitude graph. The S11 parameter is defined as follows: S11 = b0 / a0 when a1 = 0 Where b0 is reflected voltage and a0 is incident voltage into port 1 of the two-port network represented by the S parameters. The value of a1 would be incident voltage into port two of the model. Thus the network analyzer is displaying 20 log( | s11 | ) for the return loss measurement. The value of a1 equal to zero implies that port 2 is loaded with the characteristic impedance. Once data is obtained in the VNA, it must be exported to an external software application program to plot and compare against the limit line specified by [5]. This step is not required using the oscilloscope application which can make the measurements and comparison and generate a test report. V. Return Loss Measurement Using an Oscilloscope A test setup to measure differential return loss for an Ethernet DUT using an oscilloscope and arbitrary waveform generator is shown in Figure 5. This configuration consists of a specific AWG test signal, a specific hardware test fixture configuration for connection to differential probes, DUT and AWG, and finally software algorithms that run in the oscilloscope. RJ45 connectors on the test fixture enable connection to 10BaseT, 100BaseT, and 1000BaseT DUTs for testing. A patent application [4] is in process for this return loss test system. The user would connect the system as shown below in Figure 5. Then run the Ethernet software application on the oscilloscope and select the return loss measurement using the Select menu button. Probe connection details are provided using the Configure menu. The Connect menu provides connection details and for calibration. Pressing the New Cal button enables calibration process for open, short, and load. The DUT is disconnected. Then press the Open menu item in the software application. The software application then handles all of the setup and control of the oscilloscope automatically to acquire the first set of data that will be used in the calibration. The user would then repeat this process for both the short and the load while connecting to the appropriate ports on the calibration circuit and then press the Apply Cal button. This calibration procedure corrects for probe loading and fixture loading in the final measured results. Section VIII provides more details of this process. The next step is to insert the CAT5 cable back into the DUT. Then one button press to start the measurement will cause the software to automatically acquire data from the DUT while it is transmitting a test mode 4 pseudo random signal. The software application then plots the return loss data for 85 ohm, 100 ohm, and 115 ohm reference impedance. It also compares the results against the return loss limits specified in [5].

Figure 5. Test setup configuration for Ethernet differential return loss measurement using a digital storage oscilloscope.

VI. The AWG Signal Generator The AWG generates a differential signal from two of its outputs that connect directly to the test fixture. Since the impedance of both the outputs is 50 ohm, there is no need for a balun in this configuration. The signal generated by the AWG consists of a summation of multiple sine waves that covers the span of 0.625 kHz to 125 MHz. The phase of the sines is assigned to obtain the best possible signal to noise ratio. For 1000BaseT Return Loss test, the standard defines frequencies up to 100 MHz. The AWG must have minimum sample rate of 250 MS/s and a bandwidth greater than 100 MHz. Also, the voltage range must be able go to 2 Vpp. The AWG is configured to generate a marker pulse at the end of each record of random phased sine waves. This connects to the AUX Trigger input on the oscilloscope. Thus the AWG will be synchronized to the oscilloscope when the signals are acquired in average mode. The random DUT signal will then tend to average toward zero while the AWG signal does not. The time domain view of the AWG signal is shown below in Figure 6. The application uses a 100 s segment of this signal.

Figure 6. AWG test signal in the time domain. Horizontal axis is in units of time.

An expanded view of this signal is shown in Figure 7.

Figure 7. Expanded time domain view of stimulus signal from AWG.

Even though the time domain view has an appearance similar to random noise the frequency domain view clearly shows the equal amplitude sine waves with constant frequency spacing. As shown in Figure 8 the first frequency is at 0.625 MHz and the succeeding frequencies are spaced by 1.25 MHz.

Figure 8. Frequency domain view of the AWG stimulus signal with vertical axis with units of dB and horizontal axis with units of frequency in MHz.

An attempt was made in choosing these frequencies to avoid making them equal to those in the DUT. The reason for this is that any frequencies in the DUT that are the same as the AWG will have a tendency to maintain a constant phase relationship to the AWG while the oscilloscope is acquiring in average acquisition mode. Any such frequencies in the DUT will not average out and will tend to cause some interference with the measurement at that frequency. DUT interference is also a problem that must be considered when performing return loss measurement using a vector network analyzer. The resulting interference appears as large spikes on the final return loss plot. An Ethernet return loss plot obtained from a VNA showing this type of interference is presented in the blue return loss trace in Figure 9. Increasing the VNA sweep signal power will reduce size of this interference.

Figure 9. A VNA plot showing interference spikes from the DUT transmitter.

VII. Signal to Noise Ratio The signal to noise ratio for the return loss measurement is considered in terms of the DUT signal and the AWG signal. The nominal voltage of the DUT is 2 Vpp as shown in Figure 2. The signal generators such as AWG520 and AWG610 can output 2 Vpp. The AWG2021 can be set to output up to 5 Vpp. Given that two AWG channels are in use and that one is inverted compared to the other; the voltage given above is double when applied to the differential resistive power splitter in the test fixture. However, the actual voltage applied to the DUT is much less do to the four way power split and the two series 49.9 reference resistors. There are several ways to improve the SNR for the return loss measurement. But first consider the following equations to aid in this analysis. The reflection coefficient is given as: (3) := Vr / Vi The magnitude of the reflection coefficient, , is as shown in (4). (4) := | |

Therefore, inserting (4) into equation (1) the following is obtained [1]: (5) Return loss := 20 log( )

Now consider that the DUT is generating voltage, Vt, which will add to the reflected voltage in the return loss measurement. The resulting equation becomes: (6) := ( Vr + Vt ) / Vi

Vt represents the voltage from the DUT. The quantities in (6) are vectors with magnitude and phase values and are a function of frequency. Substitute (3) into (6) to obtain the reflection coefficient, with error: (7) := + Vt / Vi

The amount of error in the reflection coefficient is Vt/Vi from (7) above. Thus if Vt can be averaged to zero or if can be measured at frequencies where Vt is zero then the effects of DUT voltage on error can be eliminated. Also, if the value of Vi can be made larger, then the error term will be smaller. Vi can be made larger by increasing the AWG output voltage. Care must be taken not to increase it to a point that causes the DUT to become non-linear in operation. The SNR for the oscilloscope based return loss analyzer can also be improved by reducing the resolution bandwidth of the FFT functions used in the steps to compute the return loss from the signal measured by the probes. This results in better rejection of DUT frequencies that are close to AWG frequencies. Increasing the time domain acquisition duration used in the computation will reduce the RBW. Thus the AWG signal would repeat its sine pattern over a longer time interval. A VNA generates a single sine wave for each test frequency. It step sweeps over the desired range. The oscilloscope based return loss analyzer uses a multitude of sine waves that are analyzed simultaneously from an averaged acquisition in the oscilloscope-based analyzer. Leveled sine waves are not necessary for this measurement. This is because the return loss is based on the ratio of incident and reflected voltages. Therefore, it is not necessary to make all of the sine waves equal in amplitude since the absolute signal amplitude cancels out in the reflection coefficient ratio. Thus, flatness of the signal source leveling is not an issue in the accuracy of the measurement as long as good SNR is maintained.

Figure 10. Differential probes connected to the return loss circuit in the test fixture.

VIII. The Test Fixture The test fixture is the interface that provides connections for the AWG stimulus signal, the two differential oscilloscope probes, and the DUT. It also incorporates a small calibration board that contains female RJ45 open, short, and load circuits.

The fixture is configured with a differential resistive four way power splitter on the input which connects to the AWG. The output of each power splitter branch connects to 50 ohm reference resistors in each leg of the differential line. There are differential probe points on each side of these to provide the necessary signals to the oscilloscope. Finally the differential pairs connect from the reference resistors to the female RJ45 connector and a short CAT5 cable (less than 6 inch) for connection to the DUT.

Figure 11. Block Circuit diagram for the return loss test fixture for use with a digital storage oscilloscope.

Figure 12. Female RJ45 open, short, and load calibration circuits for the test fixture. Also shown is 6 inch CAT5 cable where impedance reference plane is established.

The following three screen shots illustrate the appearance of the display for each of the open, short, and load calibration steps. Familiarization with these views results in positive feedback to let the user know that the full test setup is correct.

Figure 13. Trace appearance when performing the open calibration step for 1000BaseT.

Figure 14. Trace appearance when performing the short calibration step for 1000BaseT.

Figure 15. Trace appearance when performing a load calibration step for 1000BaseT.

IX.

The Algorithm

The oscilloscope based return loss analyzer uses a two port error correction model for removing the effects of the differential probes, and test fixture, and cable loading. Refer to [2] and [3].

Figure 16. Block diagram of return loss measurement with error correction.

Error correction involves the concept of introducing an imaginary error term two port network between the test fixture and the DUT. The error terms in this model must be computed during a calibration process that the user performs. Only three of these terms are needed for the s11 single port calibration. The differential signal flows from the AWG into the probe fixture that contains a resistive reference impedance. This provides the necessary signals to the differential probes. These signals can then be used to compute the reflection coefficient of the DUT. The Error Correction box is not physically realized in the signal path. It is a factitious 2-port model that corrects errors associated with the test fixture. This model has four parameters that vary as a function of frequency but only three are needed. A set of three equations and three unknowns can be derived so these error coefficients can be computed. These equations are derived from three different loads placed in the position of the DUT. This would be a short, an open, and a 100 Z0 termination. The AWG is setup to simultaneously drive the test fixture with sine waves at each of the frequencies at which a measurement shall be made. The user would 9

connect one of the calibration impedances. The oscilloscope application would then measure the reflection coefficient at each frequency. This would be repeated with the other two calibration standards. Then three error coefficients for the two port correction model can be computed for each frequency. Now that the error correction model is known the DUT can be connected and the measured return loss can be corrected by applying equations derived from the two port error correction model. Return loss without error correction: The math algorithm required to compute the return loss values without error correction is given as follows: Factor equation (1) to obtain: (8) Return Loss := 20 log(Vr) - 20 log(Vi)

Assume the channel 1 differential probe is connected to probe point A in Figure 11 and the differential probe of channel 2 is connected to probe point B. Let the voltage at A be referred to as ch1 and refer to the voltage at B as ch2. Vr := ch2 ( ch1 ch2 ) (9) Vr := 2 ch2 ch1

Vi := ch2 + ( ch1 ch2 ) (10) Vi := ch1

Substitute (9) and (10) into (3) to obtain (11). This defines mathematically how relates to the acquired input signals on ch1 and ch2 of the oscilloscope: (11) (12) (13) := ( 2 ch2 ch1 ) / ch1 Mi := 20 log( | FFT( Vi ) | ) Mr := 20 log( | FFT( Vr ) | )

Inserting (12) and (13) into (8) yields the following: (14) Return Loss := Mi - Mr

Thus equation (14) describes the return loss computation required to translate the ch1 and ch2 differential probe signals from the test fixture into a return loss value without error correction. Only values at the same frequencies of the input stimulus signal are kept and the rest are discarded. Return Loss With Error Correction: The derivations needed for computing error correction are given in [2] and [3]. Figure 17 shows the two port error correction model that is used.

Figure 17. Flow graph for two port error correction model.

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The value of a0 is the incident signal into port 1 at the left and b0 is the reflected signal in port 1. The values of a1 and b1 are respectively incident and reflected signals from port two at the right of Figure 17. The values e10 and e01 would represent frequency response terms. The value of e00 is directivity and e11 is port match. Refer to [2] and [3].
m b0 a0 when a2 = 0

Where m is the measured reflection coefficient when the DUT is connected to the test fixture.
m e00 + ( e10 e01 ) A 1 e11 A

The error corrected actual data is represented by A as:


A e11 ( m e00 ) + e10 e00 m e00

The following equation applies to a one-port error calibration where port two is terminated with the characteristic impedance. (15) Where: a = e10 e01 e00 e11 b = e00 c = -e11 Equation (15) may be rewritten as:
m a A + b c A m m a A + b c A + 1

Now it is possible to measure m with three different loads and then write three different equations. This will allow for the solution for values of a, b, and c at each frequency of interest. (16) (17) (18)
m1 m2 m3 a A1 + b c A1 m1 a A2 + b c A2 m2 a A3 + b c A3 m3

Once the values of a, b, and c have been solved from the above system of equations then it is possible to compute the value of A. The value of A may be computed from (15) as follows: (19)
A m b a c m

Keeping (19) in mind the equations for the two port error correction network in Figure 17 are as follows:
b0 b1 e00 a0 + e01 a1 e10 a0 + e11 a1

11

a1 b0 b1 b1

b1 A e00 a0 + e01 b1 A e10 a0 + e11 b1 A e10 a0 1 e11 A a0 e00 + b0 a0 e00 + e10 e01 A 1 e11 A

b0

e10 e01 A 1 e11 A

( m e00 ) ( 1 e11 A)
e10 e01
m e00 e11 m A + e00 e11 A e10 e01
m e00 + ( e00 e11 e11 m) A

e10 e01 A

e10 e01 A ( e00 e11 e11 m) A

m e00

The final value for DUT measurement is expressed by the following equation:
A m e00 e10 e01 e00 e11 + e11 m

Derive expressions for the Error Coefficients: Since reflection coefficient is the ratio of reflected to incident signal a value of 0 means a perfect match and a value of 1 for an open and a -1 for a short. Substitute those values into the above equations (16), (17), and (18) to obtain the following: (20) (21) (22)
m1 m2 m3 a ( 1) + b c ( 1) m1 short a 1 + b c 1 m2 a 0 + b c 0 m3

open load

Factoring of (20), (21), and (22) will result in the following:


m1 m2 m3 a + b + c m1 a + b c m2 b

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Solve for the a, b, and c error coefficients: (23) a


m1 m2 + m2 2 m3 m2 m1 m2

+ m2 m3

(24) b = m3 (25) c
m1 + m2 2 m3

m1 m2 Summary of the calibration procedure using the derived equations: Replace the DUT with an open circuit calibration standard and measure m1 using (11). Then replace the DUT with a short circuit calibration standard and use (11) to compute m2. Then replace the DUT with a Z0 load of 100 ohms and compute m3 using (11). Now the error correction coefficients a, b, and c may be computed from (23), (24), and (25). The user then reconnects the DUT to the test fixture and compute m using (11). The next step provides error corrected values for the reflection coefficient by computing A from (19). The final step is to compute return loss from A by using (4) and (5).

X.

Renormalization to 85 and 115 ohms

This section describes the derivation of the formula used for return loss re-normalization. An assumption is made that reflection coefficients have been measured after the system has been calibrated to a standard of 100 . Then re-normalization will compute the return loss for a reference impedance of 85 or 115 . This re-normalization is performed using a bilinear transformation. Return loss, R0 , is 20log of the magnitude of the reflection coefficient, 0, where the reflection coefficient can be written in terms of impedance as shown below:
0 Z Z0 Z + Z0 Z Z1 Z + Z1

(26)

(27)

R0 = 20 log( | 0 | ) R1 = 20 log( | 1 | ) The value of Z0 is the reference impedance of 100 and Z is the impedance of the DUT. Given that the return loss, R0, and the reflection coefficient, 0, are measured based with a standard reference impedance of Z0 = 100 , what value will be obtained for a return loss, R1, and a reflection coefficient, 1, with an alternative reference impedance Z1 = 85 or 115 ? Solve for Z from (26):
Z 1 + 0 1 0 Z0

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Substitute resulting Z into (27):


1 + 0 Z0 Z1 1 0 1 + 0 1 0 1 Z0 Z1

( Z0 Z1) + 0 ( Z0 + Z1) ( Z0 + Z1) + 0 ( Z0 Z1)


+ 0 1 + 0 Z0 Z1 Z0 + Z1

(28)

(29)

The re-normalization computation uses equations (27), (28), and (29) Examples: Applying equations (28) and (29) for load, open, short cases the following are obtained: For load:
Z 0 Z1

Z1 Z0 Z1 + Z0 1

For open
Z 0 1

Z0 + Z0 +1 1+

For short
Z 0 0 1

0 Z0 0 + Z0 1 1

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XI. Comparison of Oscilloscope and VNA The oscilloscope based return loss analyzer described in this paper has been specifically configured to measure the transmitter and receiver interface circuits for Ethernet systems. The mask test for Ethernet requires comparison against the limit line which is at higher return loss levels where the oscilloscope application most closely matches results from a VNA. An example of the comparison between a VNA and multiple test traces from the oscilloscope based return loss application is shown below in Figure 18. This shows the degree of consistency of measurement from the oscilloscope. The upper blue trace is the return loss limit line. A DUT return loss must be less then this line to pass. The remaining traces are four waveforms from the oscilloscope based return loss measurement. There is close agreement between the oscilloscope results and the VNA results in this example.

Figure 18. Vertical axis is return loss with 5 dB/div. Horizontal axis is frequency in MHz. Black dashed line is DUT measured by VNA. Other lines are different runs of measurement from the oscilloscope.

NOTE: The VNA plot in Figure 18 shows a sharp increase in return loss in the 0 to 2 MHz range. This is error caused by a balun that had low frequency limit of 2 MHz. The oscilloscope based measurement does not have this error. Another advantage the oscilloscope offers is the ability to perform Pass/Fail limit testing. The TDSET3 offers limit templates for easy pass/fail testing and instant report generation along with screen images and values. At lower frequencies, return losses tend to be low and not significant for limits testing. It is not close to the mask limit line. For example, consider performing the open, short, load calibration procedure on the oscilloscope test fixture. Then run a return loss measurement on the load that was used for calibration. Ideally the return loss would measure at minus infinity across the span. However, calibration of 10BaseT across a 20 MHz span gives approximately -40 dB. The VNA calibrates in a similar situation to around 50 dB. XII. Conclusion This paper has described a new test and measurement system for obtaining return loss of Ethernet devices by using an oscilloscope, differential high impedance probes, an AWG, a test fixture, and a software application based in the oscilloscope. This system has advantages over a VNA in that it is able to compare the results against the limit mask and produce a pass fail report. In addition, it can also display the computed return loss at 85 and 115 ohms reference loads. (A value of 111 ohms is used for 10BaseT.) The measured return loss values compare favorably with a VNA at the dB levels where the comparison against the mask occurs. An additional advantage for this application is that it provides the user with many other IEEE tests in addition to return loss as specified in [5].

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Glossary AWG - Arbitrary Waveform Generator DUT - Device Under Test MDI - Media Dependent Interface Reflection Coefficient, - Complex number representing ratio of reflected voltage to incident voltage. - magnitude of the reflection coefficient. Return Loss - 20 times log of magnitude of reflection coefficient. RBW Resolution bandwidth - 3 dB down bandwidth of filters in the FFT. VNA - Vector network analyzer. Bibliography John Pickerd is a Principal Engineer for Tektronix IBU oscilloscope design group. He has been designing hardware and software for 33 years and has a BS degree in Electrical Engineering from Oregon State University in 1988 and an Associate degree in Electrical Engineering Technology from Blue Mountain Community College in 1972. Kan Tan received B.S. degree from the Department of Automation, Tsinghua University, Beijing, and M.S. degree from the Institute of Systems Science, Chinese Academy of Science, Beijing, and Ph.D. degree from the Department of Mechanical Engineering, University of Houston, TX. He has developed inventions that are incorporated in products from Tektronix.

References 1. Philip H Smith, Electronic Applications of the Smith Chart. ISBN 1-884932-39-8, Nobel Publishing, Atlanta, Copyright 1995, pages 11-42 2. Doug Rytting, An Analysis of Vector Measurement Accuracy Enhancement Techniques, Hewlett Packard, RF & Microwave Measurement Symposium and Exhibition page 5., March 1962. 3. Doug Rytting, Appendix to An Analysis of Vector Measurement Accuracy Enhancement Techniques, Hewlett Packard, RF & Microwave Measurement Symposium and Exhibition page 5., March 1982. 4. John Pickerd, Patent Application, Tektronix Inc. 7424-US1. 5. IEEE Std P802.3, 2000 Edition, Part 3: Carrier sense multiple access with collision detection ( CSMA/CD) access method and physical layer specifications. 40.7.2.3

Copyright 2005, Tektronix, Inc. All rights reserved. Tektronix products are covered by U.S. and foreign patents, issued and pending. TEKTRONIX and TEK are registered trademarks of Tektronix, Inc. All other trade names referenced are the service marks, trademarks or registered trademarks of their respective companies. 02/05 TN/WOW 55W-17590-1

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