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CHAPTER 5

MOS Field-Effect Transistors (MOSFETs)

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Figure 5.2 The enhancement-type NMOS transistor with a positive voltage applied to the gate An n channel is induced at the top of the 52 gate. substrate beneath the gate.

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Figure 5.10 Cross-section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n-type region, known as an n well. Another arrangement is also possible in which an n-type body is used and the n device is formed in a p well. Not shown are the connections made to the p-type body and to the n well; the latter functions as the body terminal for the p-channel device.

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Figure 5.11 (a) Circuit symbol for the n-channel enhancement-type MOSFET. (b) Modified circuit symbol with an arrowhead on the source terminal to distinguish it from the drain and to indicate device polarity (i.e., n channel). (c) Simplified circuit symbol to be used when the source is connected to the body or when the effect of the body on device operation is unimportant.

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Table 5 1 Regions of Operation of the Enhancement NMOS Transistor 5.1

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Figure 5.12 The relative levels of the terminal voltages of the enhancement NMOS transistor for operation in the triode region and in the saturation region. region

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Figure 5.15 Large-signal equivalent-circuit model of an n-channel MOSFET operating in the saturation

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Figure 5.19 (a) Circuit symbol for the p-channel enhancement-type MOSFET. (b) Modified symbol with an arrowhead on the source lead. (c) Simplified circuit symbol for the case where the source is connected to the body.

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Table 5.2 Regions of Operation of the Enhancement PMOS Transistor

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Figure 5.20 The relative levels of the terminal voltages of the enhancement-type PMOS transistor for operation in the triode region and in the saturation region.

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Figure 5.28 Biasing the MOSFET amplifier at a point Q located on the segment AB of the VTC.

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Figure 5.31 Graphical construction to determine the voltage transfer characteristic of the amplifier in Fig 5 29(a) 5 31 Fig. 5.29(a).

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Figure 5.32 Operation of the MOSFET in Figure 5.29(a) as a switch: (a) Open corresponding to point A in Figure 5 31; (b) Closed 5 32 5 29(a) Open, 5.31; Closed, corresponding to point C in Figure 5.31. The closure resistance is approximately equal to rDS because VDS is usually very small. Sedra/Smith Copyright 2010 by Oxford University Press, Inc.

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Figure 5.33 Two load lines and corresponding bias points. Bias point Q1 does not leave sufficient room for positive signal swing at the drain (too close to VDD). Bias point Q2 is too close to the boundary of the triode region and might not allow for sufficient negative signal swing.

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Figure 5.34 Conceptual circuit utilized to study the operation of the MOSFET as a small-signal amplifier.

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Figure 5.35 Small-signal operation of the MOSFET amplifier 5 35 amplifier.

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Figure 5.40 Development of the T equivalent-circuit model for the MOSFET. For simplicity, ro has been omitted; however, it may be added between D and S in the T model of (d).

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Figure 5.41 (a) The T model of the MOSFET augmented with the drain-to-source resistance ro. (b) An alternative representation of the T model.

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Table 5.3 Small-Signal Equivalent-Circuit Models for the MOSFET

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Figure 5.43 The three basic MOSFET amplifier configurations.

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Figure 5.46 Performing the analysis directly on the circuit diagram with the MOSFET model used implicitly.

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Figure 5.47 The CS amplifier with a source resistance Rs: (a) Circuit without bias details; (b) Equivalent circuit with the MOSFET represented by its T model.

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Figure 5.48 (a) Common-gate (CG) amplifier with bias arrangement omitted. (b) Equivalent circuit of the CG amplifier with the MOSFET replaced with its T model model.

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Figure 5.49 Illustrating the need for a unity-gain buffer amplifier.

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Figure 5.51 The use of fixed bias (constant VGS) can result in a large variability in the value of ID. Devices 1 and 2 represent extremes among units of the same type.

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Figure 5.52 Biasing using a fixed voltage at the gate, VG, and a resistance in the source lead, RS: (a) basic arrangement; (b) reduced variability in ID; (c) practical implementation using a single supply; (d) coupling of a signal source to the gate using a capacitor CC1; (e) practical implementation using two supplies supplies.

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Figure 5.54 Biasing the MOSFET using a large drain-to-gate feedback resistance, RG.

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Figure 5.55 (a) Biasing the MOSFET using a constant-current source I. (b) Implementation of the constant-current source I using a current mirror.

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Figure 5.56 Basic structure of the circuit used to realize single-stage discrete-circuit MOS amplifier configurations 5 56 single-stage, configurations.

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Figure 5.57 (a) Common-source amplifier based on the circuit of Fig. 5.56. (b) Equivalent circuit of the amplifier for small-signal analysis.

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Figure 5.58 (a) Common-source amplifier with a resistance RS in the source lead. (b) Small-signal equivalent circuit with ro neglected.

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Figure 5.59 (a) A common-gate amplifier based on the circuit of Fig. 5.56. (b) A small-signal equivalent circuit of the amplifier in (a).

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Figure 5.60 (a) A source-follower amplifier. (b) Small-signal, equivalent-circuit model.

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Figure 5.61 A sketch of the frequency response of a CS amplifier delineating the three frequency bands of interest 5 61 interest.

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Figure 5.62 Small-signal, equivalent-circuit model of a MOSFET in which the source is not connected to the body.

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