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CS 632 High Performance Computer Architecture L-T-P: 3-1-0, Credit: 4 Introduction: review of basic computer architecture, quantitative techniques in computer design, measuring and reporting performance. CISC and RISC processors. Pipelining: Basic concepts, instruction and arithmetic pipeline, data hazards, control hazards, and structural hazards, techniques for handling hazards. Exception handling. Pipeline optimization techniques. Compiler techniques for improving performance. Hierarchical memory technology: Inclusion, Coherence and locality properties; Cache memory organizations, Techniques for reducing cache misses; Virtual memory organization, mapping and management techniques, memory replacement policies. Instruction-level parallelism: basic concepts, techniques for increasing ILP, superscalar, super pipelined and VLIW processor architectures. Array and vector processors. Multiprocessor architecture: taxonomy of parallel architectures. Centralized shared-memory architecture: synchronization, memory consistency, interconnection networks. Distributed sharedmemory architecture. Cluster computers. Non von Neumann architectures: data flow computers, reduction computer architectures, systolic architectures. OE 005 Telematics L-T-P: 3-1-0, Credit: 4 Basics of Telephony: Telephone Network overview; Subscriber Loop; Signaling in the Telephone Network; Overview of ISDN, BISDN and ATM Technologies Circuit Switching in Telephone Networks: Crossbar switch; Close networks; Close and Slepian-Duguid theorems; Recursive construction of Close Networks; Time switching, TMS and TST switches; Lee and Jacobeus blocking analysis; Routing in R-NB network; Switch processor, Call processing and overload control; Example telephone switches. Cell Switching: Generic Switch; Input and output queued switches; Shared memory and Shared medium switches, Crossbar switch, Complexity and scaling disadvantage of output queued switches, Knockout principle; Interconnections for large switches, Self routing architectures, Batcher-banyan networks; Unbufferred banyan switches, Buffered banyan, Tandem banyan, Speedup, Parallelism and Channel grouping toenhance input queued switches; Concentrators super concentrators and Copy networks, Examples of ATM switches, IP Switching from VC based fixed length packet switches. Multiplexing and Routing in Circuit Switched Networks: Abstract System Models Erlang Blocking Models; Overflow Models, Equivalent Random Theory, Haywards Approxmn and Introductory Non Poisson Arrival Processes; Product form solution; Erlang Fixed Point Solution; Techniques to choose good routes; Alternate Routing.
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