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D D D D D D D
Output Swing Includes Both Supply Rails Low Noise . . . 9 nV/Hz Typ at f = 1 kHz Low Input Bias Current . . . 1 pA Typ Fully Specified for Both Single-Supply and Split-Supply Operation Common-Mode Input Voltage Range Includes Negative Rail High-Gain Bandwidth . . . 2.2 MHz Typ High Slew Rate . . . 3.6 V/s Typ
950 V Max at TA = 25C Macromodel Included Performance Upgrades for the TS272, TS274, TLC272, and TLC274 Available in Q-Temp Automotive HighRel Automotive Applications Configuration Control / Print Support Qualification to Automotive Standards
description
The TLC2272 and TLC2274 are dual and quadruple operational amplifiers from Texas Instruments. Both devices exhibit rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The TLC227x family offers 2 MHz of bandwidth and 3 V/s of slew rate for higher speed applications. These devices offer comparable ac performance while having better noise, input offset voltage, and power dissipation than existing CMOS operational amplifiers. The TLC227x has a noise voltage of 9 nV/Hz, two times lower than competitive solutions.
12
IO = 50 A
10 IO = 500 A
The TLC227x, exhibiting high input impedance and low noise, is excellent for small-signal 6 conditioning for high-impedance sources, such as piezoelectric transducers. Because of the micro4 power dissipation levels, these devices work well 16 4 6 8 10 12 14 in hand-held monitoring and remote-sensing |VDD | Supply Voltage V applications. In addition, the rail-to-rail output feature, with single- or split-supplies, makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the TLC227xA family is available with a maximum input offset voltage of 950 V. This family is fully characterized at 5 V and 5 V. The TLC2272/4 also makes great upgrades to the TLC272/4 or TS272/4 in standard designs. They offer increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set allows them to be used in a wider range of applications. For applications that require higher output drive and wider input voltage range, see the TLV2432 and TLV2442 devices. If the design requires single amplifiers, see the TLV2211/21/31 family. These devices are single rail-to-rail operational amplifiers in the SOT-23 package. Their small size and low power consumption, make them ideal for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Advanced LinCMOS is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL PRF 38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
0C to 70C
55C to 125C
The D packages are available taped and reeled. Add R suffix to the device type (e.g., TLC2272CDR). The PW package is available taped and reeled. Add R suffix to the device type (e.g., TLC2272PWR). Chips are tested at 25C. TLC2274 AVAILABLE OPTIONS PACKAGED DEVICES TA VIOmax AT 25C 950 V 2.5 mV 950 V 2.5 mV 40C to 125C 950 V 2.5 mV 950 V 2.5 mV SMALL OUTLINE (D) TLC2274ACD TLC2274CD TLC2274AID TLC2274ID TLC2274AQD TLC2274QD TLC2274AMD TLC2274MD CERAMIC LCC (FK) TLC2274AMFK TLC2274MFK CERAMIC DIP (J) TLC2274AMJ TLC2274MJ PLASTIC DIP (N) TLC2274ACN TLC2274CN TLC2274AIN TLC2274IN TLC2274AMN TLC2274MN TSSOP (PW) TLC2274ACPW TLC2274CPW TLC2274AIPW TLC2274IPW CERAMIC FLAT PACK (W) TLC2274AMW TLC2274MW
0C to 70C
55C to 125C
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLC2274CDR). The PW package is available taped and reeled. Chips are tested at 25C.
1 2 3 4
8 7 6 5
1 2 3 4 5 6 7
14 13 12 11 10 9 8
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
1IN 1OUT NC 4OUT 4IN 4IN + NC VDD NC 3IN + 2IN 2OUT NC 3OUT 3IN
NC 1OUT NC VDD+ NC
NC 1 IN NC 1 IN+ NC
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
NC 2 OUT NC 2 IN NC
NC No internal connection
NC VDD/GND NC 2 IN+ NC
1 2 3 4 5
10 9 8 7 6
Q3
Q6
Q9
Q12
Q14
Q16
D1 Q2 R3 Q5 R4 Q7 Q8 Q10 Q11 R1 R2
VDD ACTUAL DEVICE COMPONENT COUNT COMPONENT Transistors Resistors Diodes TLC2272 38 26 9 TLC2274 76 52 18
Capacitors 3 6 Includes both amplifiers and all ESD, bias, and trim circuitry
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Supply voltage, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V Input voltage range, VI (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDD 0.3 V to VDD+ Input current, II (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total current into VDD + . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Total current out of VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Duration of short-circuit current at (or below) 25C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited Package thermal impedance, JA (see Notes 4 and 5): D package (8 pin) . . . . . . . . . . . . . . . . . . . . 97.1C/W D package (14 pin) . . . . . . . . . . . . . . . . . . . 86.2C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . 79.7C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . 84.6C/W PW package (8 pin) . . . . . . . . . . . . . . . . . . . 149C/W PW package (14 pin) . . . . . . . . . . . . . . . . . . 113C/W Package thermal impedance, JC (see Notes 4 and 5): FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6C/W J package . . . . . . . . . . . . . . . . . . . . . . . . . . 15.1C/W U package . . . . . . . . . . . . . . . . . . . . . . . . . . 14.7C/W Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C I, Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C to 125C M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to 125C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P or PW package . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or U package . . . . . . . . . . . . . . . . . 300C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD . 2. Differential voltages are at IN+ with respect to IN . Excessive current will flow if input is brought below VDD 0.3 V. 3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 4. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) TA)/JA. Operating at the absolute maximum TJ of 150C can affect reliability. 5. The package thermal impedance is calculated in accordance with JESD 51-7 (plastic) or MIL-STD-883 Method 1012 (ceramic).
0.002 0.5
pA pA
VICR
AVD
rid ri ci zo CMRR
kSVR
25C VDD = 4.4 V to 16 V,VIC = VDD /2, No load Full range 25C VO = 2.5 V, No load Full range
IDD
Full range is 0C to 70C. Referenced to 0 V NOTE 6: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
SR
Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product
Vn
VNPP In
fA/Hz
THD + N
RL = 10 k, AV = 1, CL = 100 pF To 0.1%
BOM
25C
MHz
ts
1.5 s s 2.6 50 10 dB
To 0.01%
CL = 100 pF
0.002 0.5
pA pA
4.99 4.93
4.99 4.93 V
AVD
VO = 4 V
Full range is 0C to 70C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
SR
Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion pulse duration Gain-bandwidth product
Vn
VNPP In
fA/Hz
THD + N
BOM
ts
CL = 100 pF
0.002 0.5
pA pA
VICR
AVD
Full range is 0C to 70C. Referenced to 0 V NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
10
Vn
VN(PP) In
fA /Hz
THD + N
25C
MHz
1.5
1.5 s s
ts
Settling time
CL = 100 pF
11
VICR
AVD
VO = 4 V
CMRR Common-mode rejection ratio kSVR IDD Supply-voltage rejection ratio (VDD /VIO) Supply current
mA
Full range is 0C to 70C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
12
SR
Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product
Vn
VN(PP) In
fA /Hz
THD + N
BOM
AV = 1, CL = 100 pF To 0.1%
25C
0.54
0.54
MHz
ts
1.5 s s 3.2 52 10 dB
To 0.01%
CL = 100 pF
13
VIO VIO
Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4)
VIC = 0 V, VO = 0 V,
VDD = 2.5 V RS = 50
0.002 0.5
IIO
VICR
AVD
rid ri ci zo CMRR
kSVR
Full range is 40C to 125C. Referenced to 0 V NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
14
Vn
VNPP In
fAHz
THD + N
ts
15
VIO VIO
Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4)
VIC = 0 V, RS = 50
VO = 0 V,
0.002 0.5 60 150 800 1 60 150 800 5 to 4 5 to 3.5 4.99 4.85 4.85 4.25 4.25 4.99 4.85 4.85 3.5 3.5 25 25 300 1012 1012 8 130 75 75 80 80 2.4 3 3 95 80 75 75 80 80 50 4.1 4.91 4.85 4.85 3.5 3.5 25 25 4.65 4.93 4.85 4.85 4.25 4.25 5.3 to 4.2 5 to 4 5 to 3.5
V/mo
IIO
pA
IIB
pA
VICR
25C RS = 50 , IO = 20 A |VIO | 5 mV Full range 25C 25C Full range 25C Full range IO = 50 A IO = 500 A IO = 5 mA RL = 10 k RL = 1 m 25C 25C Full range 25C Full range 25C Full range 25C 25C 25C f = 10 kHz, f = 1 MHz, P package AV = 10 25C 25C 25C Full range 25C Full range 25C
4.99 4.93 V 4.65 4.99 4.91 V 4.1 50 V/mV 300 1012 1012 8 130 80
VOM +
IO = 200 A IO = 1 mA VIC = 0 V,
VOM
VIC = 0 V, VIC = 0 V,
AVD
Large-signal differential voltage amplification Differential input resistance Common-mode input resistance Common-mode input capacitance Closed-loop output impedance Common-mode rejection ratio Supply-voltage rejection ratio (VDD /VIO) Supply current
VO = 4 V
rid ri ci zo CMRR
pF
dB
95 dB 2.4 3 3 mA
kSVR
IDD
Full range
Full range is 40C to 125C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
16
SR
Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product
Vn
VNPP In
fAHz
THD + N
BOM
AV = 1, CL = 100 pF To 0.1%
25C
0.54
0.54
MHz
ts
1.5 s s 3.2 52 10 dB
To 0.01%
CL = 100 pF
17
VIO VIO
Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4)
IIO
VICR
VOH
VOL
AVD
VIC = 2.5 V, VO = 1 V to 4 V
pF
dB
VIC = 0 V to 2.7 V, VO = 2.5 V, RS = 50 VDD = 4.4 V to 16 V, VIC = VDD /2, No load VO = 2.5 V, No load
kSVR IDD
dB
mA
Full range is 40C to 125C. Referenced to 0 V NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
18
Vn
VN(PP) In
fA /Hz
THD + N
25C
MHz
ts
1.5 s s 2.6 50 10 dB
To 0.01%
CL = 100 pF
19
VIO VIO
Input offset voltage Temperature coefficient of input offset voltage Input offset voltage long-term drift (see Note 4)
IIO
VICR
VOM +
VOM
AVD
VO = 4 V
pF
dB
kSVR IDD
dB
mA
Full range is 40C to 125C. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
20
SR
Slew rate at unity gain Equivalent input noise voltage Peak-to-peak equivalent input noise voltage Equivalent input noise current Total harmonic distortion plus noise Gain-bandwidth product
Vn
VN(PP) In
fA/Hz
THD + N
BOM
ts
CL = 100 pF
21
VICR
AVD
RL = 10 k VIC = 2.5 V, VO = 1 V to 4 V RL = 1 m
Full range is 40C to 125C for Q level part, 55C to 125C for M level part. Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
22
Vn
VNPP In
fA/Hz
THD + N
ts
Gain margin 25C Full range is 40C to 125C for Q level part, 55C to 125C for M level part. Referenced to 2.5 V
23
0.002 0.5
pA pA
VICR
AVD
VO = 4 V
Full range is 40C to 125C for Q level part, 55C to 125C for M level part. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
24
Vn
VNPP In
fA/Hz
THD + N
AV = 1, CL = 100 pF To 0.1%
25C
0.54
0.54
MHz
1.5 s s 3.2 52 10 dB
ts
To 0.01%
CL = 100 pF
Gain margin 25C Full range is 40C to 125C for Q level part, 55C to 125C for M level part.
25
0.002 0.5
pA pA
VICR
AVD
Full range is 40C to 125C for Q level part, 55C to 125C for M level part. Referenced to 2.5 V NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
26
Vn
VN(PP) In
fA /Hz
THD + N
25C
MHz
1.5
1.5 s s
ts
Gain margin 25C Full range is 40C to 125C for Q level part, 55C to 125C for M level part. Referenced to 2.5 V
27
VICR
Full range is 40C to 125C for Q level part, 55C to 125C for M level part. NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150C extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
28
Vn
VN(PP) In
fA /Hz
THD + N
AV = 1, CL = 100 pF
25C
0.54
0.54
MHz
ts
1.5 s s 3.2 52 10 dB
Gain margin 25C Full range is 40C to 125C for Q level part, 55C to 125C for M level part.
29
NOTE: For all graphs where VDD = 5 V, all loads are referenced to 2.5 V.
30
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC2272 INPUT OFFSET VOLTAGE
20 20 891 Amplifiers From 2 Wafer Lots VDD = 2.5 V TA = 25C
Percentage of Amplifiers %
Percentage of Amplifiers %
15
15
10
10
0.4
0.8
1.2
1.6
0.4
0.8
1.2
1.6
Figure 1
DISTRIBUTION OF TLC2274 INPUT OFFSET VOLTAGE
20 992 Amplifiers From 2 Wafer Lots VDD = 2.5 V Percentage of Amplifiers % Percentage of Amplifiers % 15 15 20
Figure 2
DISTRIBUTION OF TLC2274 INPUT OFFSET VOLTAGE
992 Amplifiers From 2 Wafer Lots VDD = 5 V
10
10
0.4
0.4
0.8
1.2
1.6
0.4
0.4
0.8
1.2
1.6
Figure 3
Figure 4
31
0.5
0.5
1 1
1 6 5 4 3 2
Figure 5
DISTRIBUTION OF TLC2272 vs INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
25 128 Amplifiers From 2 Wafer Lots VDD = 2.5 V P Package 25C to 125C 25
Figure 6
DISTRIBUTION OF TLC2272 vs INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
128 Amplifiers From 2 Wafer Lots VDD = 5 V P Package 25C to 125C
Percentage of Amplifiers %
Percentage of Amplifiers %
20
20
15
15
10
10
0 5 4
0 5 4
Figure 7
Figure 8
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
32
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC2274 vs INPUT OFFSET VOLTAGE TEMPERATURE COEFFICIENT
128 Amplifiers From 2 Wafer Lots VDD = 2.5 V N Package TA = 25C to 125C
25
Percentage of Amplifiers %
Percentage of Amplifiers %
20
20
15
15
10
10
0 5
Figure 9
INPUT BIAS AND INPUT OFFSET CURRENT vs FREE-AIR TEMPERATURE
35 30 25 V I Input Voltage V 20 IIB 15 IIO 10 5 0 25 45 65 85 105 125 TA Free-Air Temperature C VDD = 2.5 V VIC = 0 V VO = 0 V RS = 50 12 10 8 6 4 2 0 2 4 6 8 10 2 3 TA = 25C RS = 50
Figure 10
INPUT VOLTAGE vs SUPPLY VOLTAGE
IIB and IIO Input Bias and Input Offset Currents pA I IO IIB
|VIO| 5 mV
Figure 11
Figure 12
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
33
V I Input Voltage V
3 |VIO| 5 mV
1 75 50
Figure 13
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
1.2 VDD = 5 V TA = 25C VOL Low-Level Output Voltage V VOL 1 VIC = 0 V 0.8 VIC = 1.25 V 0.6 VOL Low-Level Output Voltage V VOL 1.4 1.2 1 0.8 0.6 TA = 55C 0.4 0.2 0 0 1 2 3 4 IOL Low-Level Output Current mA 5 0
Figure 14
LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT
VDD = 5 V VIC = 2.5 V
TA = 125C TA = 25C
0.4
VIC = 2.5 V
0.2
Figure 15
Figure 16
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
34
TYPICAL CHARACTERISTICS
MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE vs OUTPUT CURRENT
V OM + Maximum Positive Peak Output Voltage V V OM Maximum Negative Peak Output Voltage V 5 VDD = 5 V
4.8
5 0 1 2 3 4 5 6 IO Output Current mA
Figure 17
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE vs FREQUENCY
V(OPP) Maximum Peak-to-Peak Output Voltage V V O(PP) 10 IIOS Short-Circuit Output Current mA OS 9 8 7 6 5 4 3 2 1 0 VDD = 5 V RL = 10 k TA = 25C 16
Figure 18
SHORT-CIRCUIT OUTPUT CURRENT vs SUPPLY VOLTAGE
VID = 100 mV 12
VDD = 5 V
10 k
100 k
1M
10 M
f Frequency Hz
Figure 19
Figure 20
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
35
0 800
1200
Figure 21
Figure 22
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs LOAD RESISTANCE
1000 VO = 1 V TA = 25C AVD Large-Signal Differential AVD Voltage Amplification dB 100 VDD = 5 V 10
3 VO Output Voltage V
VDD = 5 V
5 0 250 500 750 1000 1000 750 500 250 VID Differential Input Voltage V
Figure 23
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
36
0.1 0.1
1 10 RL Load Resistance k
100
Figure 24
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY
80 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C 180
135
40
90
20
45
20
45
40 1k
10 k
100 k f Frequency Hz
1M
90 10 M
Figure 25
LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE MARGIN vs FREQUENCY
80 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C 180 135
40
90
20
45
20
45
40 1k 10 k 100 k 1M f Frequency Hz
90 10 M
Figure 26
m Phase Margin om
m Phase Margin om
37
RL = 1 M 100
100
RL = 10 k
RL = 10 k
10 75
50
125
Figure 27
OUTPUT IMPEDANCE vs FREQUENCY
1000 VDD = 5 V TA = 25C zo Output Impedance O zo zo Output Impedance O zo 100 AV = 100 10 AV = 10 100 AV = 100 10 AV = 10 1 AV = 1 1000 VDD = 5 V TA = 25C
AV = 1
0.1 100
1k
10 k
100 k
1M
f Frequency Hz
Figure 29
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
38
10 75
50
125
Figure 28
OUTPUT IMPEDANCE vs FREQUENCY
0.1 100
1k
10 k
100 k
1M
f Frequency Hz
Figure 30
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO vs FREQUENCY
100 CMRR Common-Mode Rejection Ratio dB VDD = 5 V 80 VDD = 5 V 60 CMRR Common-Mode Rejection Ratio dB TA = 25C 90
86
82 VIC = 5 V to 2.7 V 78
VDD = 5 V
40
20
70 75
50
25
25
50
75
100
125
TA Free-Air Temperature C
Figure 31
SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY
100 kSVR Supply-Voltage Rejection Ratio dB k SVR kSVR k SVR Supply-Voltage Rejection Ratio dB VDD = 5 V TA = 25C 80 100
Figure 32
SUPPLY-VOLTAGE REJECTION RATIO vs FREQUENCY
VDD = 5 V TA = 25C 80
60 kSVR+ 40 kSVR 20
60 kSVR+ 40 kSVR
20
20 10
100
1k
10 k
100 k
1M
10 M
20 10
100
1k
10 k
100 k
1M
10 M
f Frequency Hz
f Frequency Hz
Figure 33
Figure 34
39
105
100
1.8
TA = 25C TA = 55C
95
90
85 75
Figure 35
TLC2274 SUPPLY CURRENT vs SUPPLY VOLTAGE
6 VO = 0 V No Load 4.8 IIDD Supply Current mA DD IIDD Supply Current mA DD 2.4 3 VDD = 5 V VO = 0 V
Figure 36
TLC2272 SUPPLY CURRENT vs FREE-AIR TEMPERATURE
3.6
TA = 25C TA = 55C
1.8
VDD = 5 V VO = 2.5 V
1.2
0.6
0 75
50
25
25
50
75
100
125
TA Free-Air Temperature C
Figure 37
Figure 38
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
40
TYPICAL CHARACTERISTICS
TLC2274 SUPPLY CURRENT vs FREE-AIR TEMPERATURE
6 VDD = 5 V VO = 0 V 4.8 IIDD Supply Current mA DD SR Slew Rate V/ s VDD = 5 V VO = 2.5 V
SR 3
3.6
2 SR +
2.4
1.2
0 75
50
25
25
50
75
100
125
0 10
TA Free-Air Temperature C
10 k
Figure 39
SLEW RATE vs FREE-AIR TEMPERATURE
5 SR 4 SR + 3 VO VO Output Voltage mV SR Slew Rate V/ s 4
Figure 40
0 75
Figure 41
Figure 42
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
41
4 VO VO Output Voltage V
t Time s
Figure 43
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE
5 4 3 VO VO Output Voltage V 2 1 0 1 2 3 4 5 0 1 2 3 4 5 6 7 8 9 t Time s 2.4 0 0.5 1 1.5 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = 1
Figure 44
2.55
2.5
2.45
2 2.5 3
3.5 4
4.5
5 5.5
t Time s
Figure 45
Figure 46
42
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE
2.65 VDD = 5 V RL = 10 k CL = 100 pF TA = 25C AV = 1
VO VO Output Voltage mV
50
2.55
2.5
50
2.45
Figure 47
Figure 48
EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY
Vn Equivalent Input Noise Voltage nV/ Hz nV Hz Vn 60 VDD = 5 V TA = 25C RS = 20
50
VO VO Output Voltage mV
50
40
30
20
50
10
10
100 1k f Frequency Hz
10 k
Figure 49
Figure 50
43
50
30
20
10
100 1k f Frequency Hz
10 k
10
t Time s
Figure 51
INTEGRATED NOISE VOLTAGE vs FREQUENCY
THD + N Total Harmonic Distortion Plus Noise % 100 Calculated Using Ideal Pass-Band Filter Lower Frequency = 1 Hz TA= 25C 10
Figure 52
TOTAL HARMONIC DISTORTION PLUS NOISE vs FREQUENCY
1 VDD = 5 V TA = 25C RL = 10 k 0.1
AV = 100 0.01 AV = 10 AV = 1
0.001
0.0001 100
1k
10 k
100 k
f Frequency Hz
Figure 53
Figure 54
44
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT vs SUPPLY VOLTAGE
2.5 f = 10 kHz RL = 10 k CL = 100 pF TA = 25C 3 2.8 Gain-Bandwidth Product MHz 2.6 2.4 2.2 2 1.8 1.6 2 0 1 6 2 3 4 5 |VDD | Supply Voltage V 7 8 1.4 75 50 25 0 25 50 75 100 TA Free-Air Temperature C 125 VDD = 5 V f = 10 kHz RL = 10 k CL = 100 pF
2.4
2.3
2.2
2.1
Figure 55
Figure 56
60 m om Phase Margin
15
VI
10 k
VDD + Rnull CL
0 10
VDD
Figure 57
Figure 58
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
45
D D D D D D
Maximum positive output voltage swing Maximum negative output voltage swing Slew rate Quiescent power dissipation Input bias current Open-loop voltage amplification
D D D D D D
Unity gain frequency Common-mode rejection ratio Phase margin DC output resistance AC output resistance Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, Macromodeling of Integrated Circuit Operational Amplifiers, IEEE Journal of Solid-State Circuits, SC-9, 353 (1974). 99 VCC + RSS RP 2 IN DP IN + 1 11 RD1 VAD VCC + 4 C1 12 RD2 60 54 VE .SUBCKT TLC227x 1 2 3 4 5 C1 11 1214E12 C2 6 760.00E12 DC 5 53DX DE 54 5DX DLP 90 91DX DLN 92 90DX DP 4 3DX EGND 99 0POLY (2) (3,0) (4,) 0 .5 .5 FB 99 0POLY (5) VB VC VE VLP VLN 0 + 984.9E3 1E6 1E6 1E6 1E6 GA 6 011 12 377.0E6 GCM 0 6 10 99 134E9 ISS 3 10DC 216.OE6 HLIM 90 0VLIM 1K J1 11 210 JX J2 12 110 JX R2 6 9100.OE3 + OUT RD1 60 112.653E3 RD2 60 122.653E3 R01 8 550 R02 7 9950 RP 3 44.310E3 RSS 10 99925.9E3 VAD 60 4.5 VB 9 0DC 0 VC 3 53 DC .78 VE 54 4DC .78 VLIM 7 8DC 0 VLP 91 0DC 1.9 VLN 0 92DC 9.4 .MODEL DX D (IS=800.0E18) .MODEL JX PJF (IS=1.500E12BETA=1.316E-3 + VTO=.270) .ENDS DE 5 RO1 DC J1 10 J2 3 9 ISS + VC R2 53 6 GCM + VB C2 7 + GA VLIM 8 EGND + FB RO2 90 + DIP 91 + VIP DIN 92 VIN +
HLIM
46
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5-Sep-2011
PACKAGING INFORMATION
Orderable Device 5962-9318201M2A 5962-9318201MCA 5962-9318201QDA 5962-9318202Q2A 5962-9318202QCA 5962-9318202QDA 5962-9555201NXD 5962-9555201NXDR 5962-9555201Q2A 5962-9555201QHA 5962-9555201QPA 5962-9555202Q2A 5962-9555202QHA 5962-9555202QPA TLC2272ACD TLC2272ACDG4 TLC2272ACDR TLC2272ACDRG4 TLC2272ACP TLC2272ACPE4 TLC2272ACPW TLC2272ACPWG4 TLC2272ACPWLE Status
(1)
Package Type Package Drawing LCCC CDIP CFP LCCC CDIP CFP SOIC SOIC LCCC CFP CDIP LCCC CFP CDIP SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP FK J W FK J W D D FK U JG FK U JG D D D D P P PW PW PW
Pins 20 14 14 20 14 14 8 8 20 10 8 20 10 8 8 8 8 8 8 8 8 8 8
(2)
(3)
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD TBD TBD TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI Call TI
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM Call TI Call TI
Addendum-Page 1
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5-Sep-2011
Orderable Device TLC2272ACPWR TLC2272ACPWRG4 TLC2272AID TLC2272AIDG4 TLC2272AIDR TLC2272AIDRG4 TLC2272AIP TLC2272AIPE4 TLC2272AMD TLC2272AMDG4 TLC2272AMDR TLC2272AMDRG4 TLC2272AMFKB TLC2272AMJGB TLC2272AMP TLC2272AMUB TLC2272AQD TLC2272AQDG4 TLC2272AQDR TLC2272AQDRG4 TLC2272CD
Status
(1)
Package Type Package Drawing TSSOP TSSOP SOIC SOIC SOIC SOIC PDIP PDIP SOIC SOIC SOIC SOIC LCCC CDIP PDIP CFP SOIC SOIC SOIC SOIC SOIC PW PW D D D D P P D D D D FK JG P U D D D D D
Pins 8 8 8 8 8 8 8 8 8 8 8 8 20 8 8 10 8 8 8 8 8
Package Qty 2000 2000 75 75 2500 2500 50 50 75 75 2500 2500 1 1 1 75 75 2500 2500 75
Eco Plan
(2)
(3)
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) TBD Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM POST-PLATE N / A for Pkg Type A42 Call TI A42 N / A for Pkg Type Call TI N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 2
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5-Sep-2011
Orderable Device TLC2272CDG4 TLC2272CDR TLC2272CDRG4 TLC2272CP TLC2272CPE4 TLC2272CPSR TLC2272CPSRG4 TLC2272CPW TLC2272CPWG4 TLC2272CPWLE TLC2272CPWR TLC2272CPWRG4 TLC2272ID TLC2272IDG4 TLC2272IDR TLC2272IDRG4 TLC2272IP TLC2272IPE4 TLC2272IPW TLC2272IPWG4
Status
(1)
Package Type Package Drawing SOIC SOIC SOIC PDIP PDIP SO SO TSSOP TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP D D D P P PS PS PW PW PW PW PW D D D D P P PW PW
Pins 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8
Eco Plan
(2)
(3)
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM Call TI Call TI
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 3
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5-Sep-2011
Orderable Device TLC2272IPWLE TLC2272IPWR TLC2272IPWRG4 TLC2272MD TLC2272MDG4 TLC2272MDR TLC2272MDRG4 TLC2272MFKB TLC2272MJG TLC2272MJGB TLC2272MP TLC2272MUB TLC2272QD TLC2272QDG4 TLC2272QDR TLC2272QDRG4 TLC2272QPWRG4 TLC2274ACD TLC2274ACDG4 TLC2274ACDR TLC2274ACDRG4 TLC2274ACN
Status
(1)
Package Type Package Drawing TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC LCCC CDIP CDIP PDIP CFP SOIC SOIC SOIC SOIC TSSOP SOIC SOIC SOIC SOIC PDIP PW PW PW D D D D FK JG JG P U D D D D PW D D D D N
Pins 8 8 8 8 8 8 8 20 8 8 8 10 8 8 8 8 8 14 14 14 14 14
Package Qty
(2)
(3)
OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD TBD TBD TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS)
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM POST-PLATE N / A for Pkg Type A42 A42 Call TI A42 N / A for Pkg Type N / A for Pkg Type Call TI N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type
Addendum-Page 4
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5-Sep-2011
Orderable Device TLC2274ACNE4 TLC2274ACPW TLC2274ACPWG4 TLC2274ACPWR TLC2274ACPWRG4 TLC2274AID TLC2274AIDG4 TLC2274AIDR TLC2274AIDRG4 TLC2274AIN TLC2274AINE4 TLC2274AIPW TLC2274AIPWG4 TLC2274AIPWLE TLC2274AIPWR TLC2274AIPWRG4 TLC2274AMD TLC2274AMDG4 TLC2274AMDR TLC2274AMDRG4 TLC2274AMFKB
Status
(1)
Package Type Package Drawing PDIP TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC LCCC N PW PW PW PW D D D D N N PW PW PW PW PW D D D D FK
Pins 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 20
Eco Plan
(2)
(3)
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD
CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM Call TI Call TI
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM POST-PLATE N / A for Pkg Type
Addendum-Page 5
www.ti.com
5-Sep-2011
Orderable Device TLC2274AMJB TLC2274AMWB TLC2274AQD TLC2274AQDG4 TLC2274AQDR TLC2274AQDRG4 TLC2274CD TLC2274CDG4 TLC2274CDR TLC2274CDRG4 TLC2274CN TLC2274CNE4 TLC2274CNSR TLC2274CNSRG4 TLC2274CPW TLC2274CPWG4 TLC2274CPWLE TLC2274CPWR TLC2274CPWRG4 TLC2274ID TLC2274IDG4
Status
(1)
Package Type Package Drawing CDIP CFP SOIC SOIC SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP SO SO TSSOP TSSOP TSSOP TSSOP TSSOP SOIC SOIC J W D D D D D D D D N N NS NS PW PW PW PW PW D D
Pins 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14
(2)
(3)
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE
CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM Call TI Call TI
Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
2000 2000 50 50
Addendum-Page 6
www.ti.com
5-Sep-2011
Orderable Device TLC2274IDR TLC2274IDRG4 TLC2274IN TLC2274INE4 TLC2274IPW TLC2274IPWG4 TLC2274IPWLE TLC2274IPWR TLC2274IPWRG4 TLC2274MD TLC2274MDG4 TLC2274MDR TLC2274MDRG4 TLC2274MFKB TLC2274MJ TLC2274MJB TLC2274MN TLC2274MWB TLC2274QD TLC2274QDG4 TLC2274QDR TLC2274QDRG4 TLC2274Y
Status
(1)
Package Type Package Drawing SOIC SOIC PDIP PDIP TSSOP TSSOP TSSOP TSSOP TSSOP SOIC SOIC SOIC SOIC LCCC CDIP CDIP PDIP CFP SOIC SOIC SOIC SOIC DIESALE D D N N PW PW PW PW PW D D D D FK J J N W D D D D Y
Pins 14 14 14 14 14 14 14 14 14 14 14 14 14 20 14 14 14 14 14 14 14 14 0
Eco Plan
(2)
(3)
ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE PREVIEW
Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD TBD TBD Pb-Free (RoHS) TBD TBD Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) TBD
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM Call TI Call TI
CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM POST-PLATE N / A for Pkg Type A42 A42 A42 N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type
CU NIPDAU N / A for Pkg Type CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM CU NIPDAU Level-1-220C-UNLIM CU NIPDAU Level-1-260C-UNLIM Call TI Call TI
Addendum-Page 7
www.ti.com
5-Sep-2011
(1)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TLC2272, TLC2272A, TLC2272AM, TLC2272M, TLC2274, TLC2274A, TLC2274AM, TLC2274M :
Catalog: TLC2272A, TLC2272, TLC2274A, TLC2274 Automotive: TLC2272-Q1, TLC2272A-Q1, TLC2272A-Q1, TLC2272-Q1, TLC2274-Q1, TLC2274A-Q1, TLC2274A-Q1, TLC2274-Q1 Enhanced Product: TLC2272A-EP, TLC2272A-EP, TLC2274-EP, TLC2274A-EP, TLC2274A-EP, TLC2274-EP Military: TLC2272M, TLC2272AM, TLC2274M, TLC2274AM
NOTE: Qualified Version Definitions:
Addendum-Page 8
www.ti.com
5-Sep-2011
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Enhanced Product - Supports Defense, Aerospace and Medical Applications Military - QML certified for Military and Defense Applications
Addendum-Page 9
Device
Package Package Pins Type Drawing SOIC SOIC TSSOP SOIC SOIC SOIC SO TSSOP SOIC TSSOP SOIC SOIC TSSOP SOIC TSSOP SOIC SOIC SOIC D D PW D D D PS PW D PW D D PW D PW D D D 8 8 8 8 8 8 8 8 8 8 8 14 14 14 14 14 14 14
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 330.0 12.4 12.4 12.4 12.4 12.4 12.4 16.4 12.4 12.4 12.4 12.4 16.4 12.4 16.4 12.4 16.4 16.4 16.4 6.4 6.4 7.0 6.4 6.4 6.4 8.2 7.0 6.4 7.0 6.4 6.5 6.9 6.5 6.9 6.5 6.5 6.5
B0 (mm) 5.2 5.2 3.6 5.2 5.2 5.2 6.6 3.6 5.2 3.6 5.2 9.0 5.6 9.0 5.6 9.0 9.0 9.0
K0 (mm) 2.1 2.1 1.6 2.1 2.1 2.1 2.5 1.6 2.1 1.6 2.1 2.1 1.6 2.1 1.6 2.1 2.1 2.1
P1 (mm) 8.0 8.0 8.0 8.0 8.0 8.0 12.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0 8.0
W Pin1 (mm) Quadrant 12.0 12.0 12.0 12.0 12.0 12.0 16.0 12.0 12.0 12.0 12.0 16.0 12.0 16.0 12.0 16.0 16.0 16.0 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1
5962-9555201NXDR TLC2272ACDR TLC2272ACPWR TLC2272AIDR TLC2272AMDR TLC2272CDR TLC2272CPSR TLC2272CPWR TLC2272IDR TLC2272IPWR TLC2272MDR TLC2274ACDR TLC2274ACPWR TLC2274AIDR TLC2274AIPWR TLC2274AMDR TLC2274AQDR TLC2274CDR
2500 2500 2000 2500 2500 2500 2000 2000 2500 2000 2500 2500 2000 2500 2000 2500 2500 2500
Pack Materials-Page 1
Device
Package Package Pins Type Drawing SO TSSOP SOIC TSSOP SOIC SOIC NS PW D PW D D 14 14 14 14 14 14
SPQ
Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 330.0 330.0 330.0 330.0 330.0 16.4 12.4 16.4 12.4 16.4 16.4 8.2 6.9 6.5 6.9 6.5 6.5
Device 5962-9555201NXDR TLC2272ACDR TLC2272ACPWR TLC2272AIDR TLC2272AMDR TLC2272CDR TLC2272CPSR TLC2272CPWR TLC2272IDR TLC2272IPWR TLC2272MDR
Package Type SOIC SOIC TSSOP SOIC SOIC SOIC SO TSSOP SOIC TSSOP SOIC
Package Drawing D D PW D D D PS PW D PW D
Pins 8 8 8 8 8 8 8 8 8 8 8
SPQ 2500 2500 2000 2500 2500 2500 2000 2000 2500 2000 2500
Length (mm) 346.0 340.5 346.0 340.5 346.0 340.5 346.0 346.0 340.5 346.0 346.0
Width (mm) 346.0 338.1 346.0 338.1 346.0 338.1 346.0 346.0 338.1 346.0 346.0
Height (mm) 29.0 20.6 29.0 20.6 29.0 20.6 33.0 29.0 20.6 29.0 29.0
Pack Materials-Page 2
Device TLC2274ACDR TLC2274ACPWR TLC2274AIDR TLC2274AIPWR TLC2274AMDR TLC2274AQDR TLC2274CDR TLC2274CNSR TLC2274CPWR TLC2274IDR TLC2274IPWR TLC2274MDR TLC2274QDR
Package Type SOIC TSSOP SOIC TSSOP SOIC SOIC SOIC SO TSSOP SOIC TSSOP SOIC SOIC
Package Drawing D PW D PW D D D NS PW D PW D D
Pins 14 14 14 14 14 14 14 14 14 14 14 14 14
SPQ 2500 2000 2500 2000 2500 2500 2500 2000 2000 2500 2000 2500 2500
Length (mm) 333.2 346.0 333.2 346.0 346.0 346.0 333.2 346.0 346.0 333.2 346.0 346.0 346.0
Width (mm) 345.9 346.0 345.9 346.0 346.0 346.0 345.9 346.0 346.0 345.9 346.0 346.0 346.0
Height (mm) 28.6 29.0 28.6 29.0 33.0 33.0 28.6 33.0 29.0 28.6 29.0 33.0 33.0
Pack Materials-Page 3
MECHANICAL DATA
MCER001A JANUARY 1995 REVISED JANUARY 1997
JG (R-GDIP-T8)
0.400 (10,16) 0.355 (9,00) 8 5
CERAMIC DUAL-IN-LINE
0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0.014 (0,36) 0.008 (0,20)
015
4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8
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