BA01 Homework Assignment 1

Last Revision date: March 9, 2012

BA01 - Homework Assignment 1

Instructions
How to deliver this work:
1. This Homework must be delivered electronically as a Tag using SVN: (a) The path is: /tags/<ams or rf>/<name>/BA01/Hw1 (b) Remember to use the proper name syntax (BA01_HW1_<name>_V<XX>.pdf>). (c) It should be in PDF format. 2. The Homework must be delivered before 17:00h at Friday 16th of 2012. 3. You are free to do this HW using a text editor or handwritten. 4. In case of a handwritten document: (a) Scan and digitalize all the paper sheets. (b) Do not use pencil, use a blue or black pen, since it is easier to scan and read. (c) Write your Name in the top of each page and Make sure that it is Readable. (d) Make sure that all the pages are clear and neat, and your work is easy to follow and understand. (e) Underline or highlight the nal answer and the important steps. (f ) After summit the digital copy, leave the original handwritten document at the Instructor room (there is going to be an envelope with one of the instructors, where you can leave your paper). 5. In case of a document written in a text editor: (a) Remember to use the CT2 CI-Brasil template. (b) Do not forget to put your name in the front page. (c) Underline or highlight the nal answer and the important steps. (d) It is not necessary to print and deliver a hardcopy.

Note:

To summit the document:

Check-out the tag from repository to your working area:

> svn co svn://192.168.0.200/homeworks/tags

Copy the le in the proper folder Add the le to the svn repository

> svn add <name_of_the_le>.pdf

Commit to submit the le into the rep

>svn ci m  <write a message>

Goal
The goal of these problems is to explore the basic operation of the MOS device, as well as the use of the MOSFET in simple logic and switching applications

BA01 - Homework Assignment 1

Sedra and Smith Problem 4.105[2]

In this problem, you use the device characteristic equations to predict DC behavior of a digital logic inverter composed of NMOS and PMOS devices.

Figure 1: Exercise 4.105 of Sedra and Smith

Sedra and Smith Problem 4.112[2]

In this problem, you use the device characteristic equations to predict dynamic switching behavior of a digital logic inverter.

Figure 2: Exercise 4.105 of Sedra and Smith

Razavi Problem 2.2[1]

In this problem, you calculate the small signal parameters for transconductance gm and output resistance

ro .

The intrinsic gain,

gm ro , is the maximum gain available from a single stage, and is far less than required ro
through techniques such as use of a cascode device

for the open loop gain of an opamp. To increase the gain, you will eventually look at the following:

Increasing output resistance

Increasing eective transconductance mirrors

gm

in some types of opamps by scaling width ratios in current

Cascading multiple stages to multiply total gain

Figure 3: Exercise 4.105 of Sedra and Smith

BA01 - Homework Assignment 1

References
[1] Behzad Razavi.

Design of Analog CMOS Integrated Circuits.

McGraw-Hill Series in Electrical and

Computer Engineering. McGraw-Hill, 2001. [2] Adel Sedra and Kenneth Smith. edition, 2003.

Microelectronic Circuits, volume 1.

Oxford University Press, 5th