IRF740, SiHF740

Vishay Siliconix

Power MOSFET
PRODUCT SUMMARY
VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 63 9.0 32 Single
D

FEATURES
400 0.55

Dynamic dV/dt Rating Repetitive Avalanche Rated Fast Switching Ease of Paralleling Simple Drive Requirements Lead (Pb)-free Available
Available

RoHS*
COMPLIANT

TO-220

DESCRIPTION
Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.

S G D S N-Channel MOSFET

ORDERING INFORMATION
Package Lead (Pb)-free SnPb TO-220 IRF740PbF SiHF740-E3 IRF740 SiHF740

ABSOLUTE MAXIMUM RATINGS TC = 25 C, unless otherwise noted

PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb EAS IAR EAR TC = 25 C PD dV/dt TJ, Tstg for 10 s 6-32 or M3 screw Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque VGS at 10 V TC = 25 C TC = 100 C SYMBOL VDS VGS ID IDM LIMIT 400 20 10 6.3 40 1.0 520 10 13 125 4.0 - 55 to + 150 300d 10 1.1 W/C mJ A mJ W V/ns C lbf in Nm A UNIT V

Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 C, L = 9.1 mH, RG = 25 , IAS = 10 A (see fig. 12). c. ISD 10 A, dI/dt 120 A/s, VDD VDS, TJ 150 C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91054 S09-0267-Rev. B, 23-Feb-09 www.vishay.com 1

IRF740, SiHF740
Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.50 MAX. 62 1.0 C/W UNIT

SPECIFICATIONS TJ = 25 C, unless otherwise noted

PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode
D

SYMBOL

TEST CONDITIONS

MIN.

TYP.

MAX.

UNIT

VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs

VGS = 0 V, ID = 250 A Reference to 25 C, ID = 1 mA VDS = VGS, ID = 250 A VGS = 20 V VDS = 400 V, VGS = 0 V VDS = 320 V, VGS = 0 V, TJ = 125 C VGS = 10 V ID = 6.0 Ab VDS = 50 V, ID = 6.0 Ab VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 ID = 10 A, VDS = 320 V, see fig. 6 and 13b

400 2.0 5.8

0.49 -

4.0 100 25 250 0.55 -

V V/C V nA A S

Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS VGS = 10 V

1400 330 120 14 27 50 24 4.5 7.5

63 9.0 32 nH ns nC pF

VDD = 200 V, ID = 10 A RG = 9.1 , RD = 20 , see fig. 10b Between lead, 6 mm (0.25") from package and center of die contact

370 3.8

10 A 40 2.0 790 8.2 V ns C

TJ = 25 C, IS = 10 A, VGS = 0

Vb

TJ = 25 C, IF = 10 A, dI/dt = 100 A/sb

Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 s; duty cycle 2 %.

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Document Number: 91054 S09-0267-Rev. B, 23-Feb-09

IRF740, SiHF740
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 C, unless otherwise noted

ID, Drain Current (A)

ID, Drain Current (A)

101

VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top 4.5 V

101

150 C

25 C

100

100

20 s Pulse Width TC = 25 C 10-1

91054_01

20 s Pulse Width VDS = 50 V 10-1 4

91054_03

100

101

10

VDS, Drain-to-Source Voltage (V)

VGS, Gate-to-Source Voltage (V)

Fig. 3 - Typical Transfer Characteristics

Fig. 1 - Typical Output Characteristics, TC = 25 C

101

ID, Drain Current (A)

VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top

RDS(on), Drain-to-Source On Resistance (Normalized)

3.0 2.5 2.0 1.5 1.0 0.5

ID = 10 A VGS = 10 V

4.5 V

100

20 s Pulse Width TC = 150 C 10-1

91054_02

100

101
91054_04

0.0 - 60 - 40 - 20 0

20 40 60 80 100 120 140 160

VDS, Drain-to-Source Voltage (V)

TJ, Junction Temperature (C)

Fig. 2 - Typical Output Characteristics, TC = 150 C

Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91054 S09-0267-Rev. B, 23-Feb-09

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IRF740, SiHF740
Vishay Siliconix

2500

ISD, Reverse Drain Current (A)

2000

Capacitance (pF)

VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd Ciss

150 C 101 25 C

1500

1000 Coss 500 Crss 0 100 101

100

10-1 0.50
91054_07

VGS = 0 V 0.70 0.90 1.10 1.30 1.50

91054_05

VDS, Drain-to-Source Voltage (V)

VSD, Source-to-Drain Voltage (V)

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

20

VGS, Gate-to-Source Voltage (V)

ID = 10 A VDS = 320 V

103
5 2

16 VDS = 200 V 12 VDS = 80 V

ID, Drain Current (A)

Operation in this area limited by RDS(on) 10 s

102
5 2

10
5 2

100 s 1 ms 10 ms TC = 25 C TJ = 150 C Single Pulse 0.1

2 5

4
For test circuit see figure 13

1
5 2

0 0
91054_06

0.1 15 30 45 60 75
91054_08

10

102

103

QG, Total Gate Charge (nC)

VDS, Drain-to-Source Voltage (V)

Fig. 6 - Typical Gate Charge vs. Drain-to-Source Voltage

Fig. 8 - Maximum Safe Operating Area

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Document Number: 91054 S09-0267-Rev. B, 23-Feb-09

IRF740, SiHF740
Vishay Siliconix

10 VGS

VDS

RD

ID, Drain Current (A)

D.U.T. + - VDD

RG

10 V
Pulse width 1 s Duty factor 0.1 %

Fig. 10a - Switching Time Test Circuit

2 VDS 25 50 75 100 125 150 90 %

91054_09

TC, Case Temperature (C)

10 % VGS td(on) tr td(off) tf

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10b - Switching Time Waveforms

10

Thermal Response (ZthJC)

1
0 - 0.5

0.2 0.1 0.1 0.05 0.02 0.01 10-2 10-5 10-4 10-3 10-2 0.1 Single Pulse (Thermal Response)

PDM t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 1 10

91054_11

t1, Rectangular Pulse Duration (S)

Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

L Vary tp to obtain required IAS RG VDS

VDS tp VDD

D.U.T IAS

+ -

V DD

VDS

10 V tp 0.01

IAS
Fig. 12b - Unclamped Inductive Waveforms

Fig. 12a - Unclamped Inductive Test Circuit

Document Number: 91054 S09-0267-Rev. B, 23-Feb-09

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IRF740, SiHF740
Vishay Siliconix

1200

EAS, Single Pulse Energy (mJ)

1000 800 600 400 200 0 VDD = 50 V 25 50 75 100

ID 4.5 A 5.3 A Bottom 10 A Top

125

150

91054_12c

Starting TJ, Junction Temperature (C)

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Current regulator Same type as D.U.T.

50 k
12 V

10 V QGS

QG
0.2 F

0.3 F

QGD D.U.T.

+ -

VDS

VG

VGS
3 mA

Charge
IG ID Current sampling resistors

Fig. 13a - Basic Gate Charge Waveform

Fig. 13b - Gate Charge Test Circuit

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Document Number: 91054 S09-0267-Rev. B, 23-Feb-09

IRF740, SiHF740
Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

D.U.T.

Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer

+ +

RG

dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test

+ VDD

Driver gate drive P.W. Period D=

P.W. Period VGS = 10 V*

D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt

VDD

Re-applied voltage Inductor current

Body diode forward drop

Ripple 5 %

ISD

* VGS = 5 V for logic level devices

Fig. 14 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91054.

Document Number: 91054 S09-0267-Rev. B, 23-Feb-09

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Legal Disclaimer Notice

Vishay

Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, Vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishays terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.

Document Number: 91000 Revision: 18-Jul-08

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