STP10NK50Z STF10NK50Z

N-CHANNEL 500V - 0.55 - 9A TO-220 / TO-220FP Zener-Protected SuperMESHMOSFET

Table 1: General Features
TYPE STP10NK50Z STF10NK50Z

Figure 1: Package
ID 9A 9 A(*) Pw 125 W 30 W

VDSS 500 V 500 V

RDS(on) < 0.7 < 0.7

TYPICAL RDS(on) = 0.55 EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY

3 1 2

TO-220

TO-220FP

DESCRIPTION The SuperMESH series is obtained through an extreme optimization of STs well established strip-based PowerMESH layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh products.

Figure 2: Internal Schematic Diagram

APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC LIGHTING

Table 2: Order Codes

SALES TYPE STP10NK50Z STF10NK50Z MARKING P10NK50Z F10NK50Z PACKAGE TO-220 TO-220FP PACKAGING TUBE TUBE

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Table 3: Absolute Maximum ratings
Symbol VDS VDGR VGS ID ID IDM ( ) PTOT VESD(G-S) dv/dt (1) VISO Tj Tstg Parameter
TO-220

Value
TO-220FP

Unit V V V 9 (*) 5.7(*) 36(*) 30 0.24 A A A W W/C V V/ns 2500 V C

Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Gate source ESD(HBM-C=100pF, R=1.5K) Peak Diode Recovery voltage slope Insulation Withstand Voltage (DC) Operating Junction Temperature Storage Temperature -9 5.7 36 125 1

500 500 30

4000 4.5

-55 to 150

( ) Pulse width limited by safe operating area (1) ISD 9 A, di/dt 200A/s, VDD 400 (*) Limited only by maximum temperature allowed

Table 4: Thermal Data

TO-220 Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1 62.5 300 TO-220FP 4.2 C/W C/W C

Table 5: Avalanche Characteristics

Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, I D = IAR, VDD = 50 V) Max Value 9 230 Unit A mJ

Table 6: Gate-Source Zener Diode

Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs= 1mA (Open Drain) Min. 30 Typ. Max. Unit V

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the usage of external components.

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ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED) Table 7: On/Off
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on) Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Gate Threshold Voltage Static Drain-source On Resistance Test Conditions I D = 1 mA, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20 V VDS = VGS, I D = 100 A VGS = 10 V, I D = 4.5 A 3 3.75 0.55 Min. 500 1 50 10 4.5 0.7 Typ. Max. Unit V A A A V

Table 8: Dynamic
Symbol gfs (1) Ciss Coss Crss Coss eq. (3) td(on) tr td(off) tf Qg Qgs Qgd Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDS = 15 V, ID = 4.5 A VDS = 25 V, f = 1 MHz, VGS = 0 Min. 7 1219 159 40 806 19 17 43 15 39.2 7.42 20.7 Typ. Max. Unit S pF pF pF pF ns ns ns ns nC nC nC

VGS = 0V, VDS = 0V to 400 V VDD = 250 V, ID = 4.5 A RG = 4.7 VGS = 10 V (see Figure 19)

VDD = 400 V, ID = 9 A, VGS = 10 V (see Figure 22)

Table 9: Source Drain Diode

Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 9 A, VGS = 0 I SD = 9 A, di/dt = 100 A/s VDD = 35 V, T j = 25C (see Figure 20) I SD = 9 A, di/dt = 100 A/s VDD = 35 V, T j = 150C (see Figure 20) 268 1.83 13.7 343 2.6 15.15 Test Conditions Min. Typ. Max. 9 36 1.6 Unit A A V ns C A ns C A

Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

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Figure 3: Safe Operating Area For TO-220 Figure 6: Thermal Impedance For TO-220

Figure 4: Safe Operating Area For TO-220FP

Figure 7: Thermal Impedance For TO-220FP

Figure 5: Output Characteristics

Figure 8: Transfer Characteristics

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Figure 9: Transconductance Figure 12: Static Drain-source On Resistance

Figure 10: Gate Charge vs Gate-source Voltage

Figure 13: Capacitance Variations

Figure 11: Normalized Gate Threshold Voltage vs Temperature

Figure 14: Normalized On Resistance vs Temperature

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Figure 15: Source-Drain Forward Characteristics Figure 17: Normalized BVdss vs Temperature

Figure 16: Maximum Avalanche Energy vs Temperature

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Figure 18: Unclamped Inductive Load Test Circuit Figure 21: Unclamped Inductive Wafeform

Figure 19: Switching Times Test Circuit For Resistive Load

Figure 22: Gate Charge Test Circuit Unclamped Inductive Load Test Circuit

Figure 20: Test Circuit For Inductive Load Switching and Diode Recovery Times

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In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

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TO-220 MECHANICAL DATA

DIM. A b b1 c D E e e1 F H1 J1 L L1 L20 L30 mm. MIN. 4.40 0.61 1.15 0.49 15.25 10 2.40 4.95 1.23 6.20 2.40 13 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 TYP MAX. 4.60 0.88 1.70 0.70 15.75 10.40 2.70 5.15 1.32 6.60 2.72 14 3.93 MIN. 0.173 0.024 0.045 0.019 0.60 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 0.645 1.137 0.151 0.116 inch TYP. MAX. 0.181 0.034 0.066 0.027 0.620 0.409 0.106 0.202 0.052 0.256 0.107 0.551 0.154

P
Q

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TO-220FP MECHANICAL DATA

mm. MIN. 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 28.6 9.8 2.9 15.9 9 3 30.6 10.6 3.6 16.4 9.3 3.2 1.126 .0385 0.114 0.626 0.354 0.118 TYP MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.141 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409

DIM. A B D E F F1 F2 G G1 H L2 L3 L4 L5 L6 L7

L3 L6 L7
F1 F

G1 H
F2

L2

L5

1 2 3
L4

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Table 10: Revision History
Date 01-Jul-2005 08-Sep-2005 Revision 1 2 Description of Changes First Release. Inserted Ecopak indication

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com

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