Electric Power Systems Research 81 (2011) 830839

Contents lists available at ScienceDirect

Electric Power Systems Research

journal homepage: www.elsevier.com/locate/epsr

Direct power control of three-phase VSIs for the minimization of common-mode emissions in distributed generation systems
Maurizio Cirrincione a , Marcello Pucci b , Gianpaolo Vitale b,
a b

Universit de Technologie de Belfort-Montbliard (UTBM), Belfort, France I.S.S.I.A.-C.N.R. (Institute on Intelligent Systems for the Automation), Palermo, Italy

a r t i c l e

i n f o

a b s t r a c t
This paper presents two new direct power control (DPC) strategies of three-phase grid connected VSIs for distributed generation, devised for the minimization of common-mode emissions. These strategies have been called DPC-EMC 1 (electro magnetically compatible) and DPC-EMC 2. Both of them reduce the common-mode emissions of the VSI by using either even or odd voltage vectors in each of the six sectors in which the grid voltage lies, without using any null vector. DPC-EMC 2 outperforms DPC-EMC 1 in terms ripple of the active and reactive power waveforms. These approaches permit the common-mode emissions to be reduced in comparison with the classic DPC algorithm, at the expense of an increase of the harmonic content of the injected current waveform which can be further corrected by a proper power line lter. An experimental comparison among the classic DPC, DPC-EMC 1 and DPC-EMC 2 is presented in terms of dynamic performance, harmonic content of the injected current and harmonic content of the common-mode voltage. 2010 Published by Elsevier B.V.

Article history: Received 20 May 2010 Received in revised form 5 November 2010 Accepted 13 November 2010 Available online 3 January 2011 Keywords: Direct power control (DPC) Common-mode emissions Electromagnetic compatibility (EMC) Distributed generation systems

1. Introduction Recently, distributed generation (DG) systems, especially from renewable sources (photo-voltaic, wind, fuel-cells) and their related energy conversion systems have been of big interest. Many control techniques have been developed and updated from this point of view. The target of these control techniques is to inject active power into the grid with zero power factor, trying to limit also low and high frequency electromagnetic pollution. However, grid connected inverters present the advantage of bi-directional power ow, and thus all of the control techniques devised for active rectiers [15] are interesting candidates also for DG applications. A possible approach is based on the idea of controlling the active and reactive powers by choosing the proper switching patterns on the basis of the instantaneous position of the grid voltage space-vector [6]. This technique has been called DPC (direct power control). On the basis of a parallelism between the electrical grid and an electrical machine, both VOC (voltage oriented control) and DPC have been further improved in their virtual ux based versions, called respectively VFOC (virtual ux oriented control) and VF-DPC [7,8]. A comprehensive theoretical and experimental comparison of these techniques has been done in [9], which however focuses on the behaviour in case of a controlled load, in partic-

Corresponding author. E-mail addresses: m.cirrincione@ieee.org (M. Cirrincione), marcello.pucci@ieee.org (M. Pucci), gianpaolo.vitale@ieee.org (G. Vitale). 0378-7796/$ see front matter 2010 Published by Elsevier B.V. doi:10.1016/j.epsr.2010.11.007

ular an adjustable speed drive. Among other advantages, the DPC technique exibits the possibility to be implemented in a cheap hardware. Furthermore, the controlled variables are directly the active and reactive powers instead of current components from which the power themselves have to be calculated as in VOC. This last characteristic makes the DPC useful for droop-controlled microgrid where supplied active and reactive powers are used to control voltage and frequency [10]. The connection to the grid of a controlled inverter implies, however, the generation of high level common-mode voltage variations with resulting high frequency common-mode currents owing to the load through line connections and the ground. In case of DG connected to the grid, the propagation path is represented by the power lines, so the electromagnetic interference (EMI) involves a wide area from the main distribution transformer up to the customers. Compared to the line current, the common-mode current spectrum has a higher frequency content. As a consequence it can nd a path through the parasitic capacitance both of the lines and of the inverter heatsink to common-mode earth current return where resonances can occur [11]. Moreover, parasitic effects are difcult to be predicted a priori. Finally, these propagation loops increase the losses in the conductive parts they ow through, are sources of conducted EMI and can lead to the incorrect operation of ground devices. For the aforementioned reasons, common-mode currents are critical for the inverter performance as much as the line current harmonics. Both effects have to be lessened to cope with electromagnetic compatibility requirements. Passive ltering techniques

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839

831

cannot act jointly on line currents (seen as differential mode) or on common-mode currents and require separate solutions. DPC techniques are expected to cause different waveforms of the common-mode voltage with respect to those resulting from VOC techniques, and therefore different conducted emissions are generated [12,13]. In switching Table (ST) versions of DPC it appears that, by changing their control strategy, a corresponding variation of the conducted emissions should be expected, particularly the common-mode emissions. So far various kinds of solutions have been proposed to diminish the common-mode emissions, and most of them have been devised for inverter fed drives [1417]. Some of them are hardware solutions based on the application of either passive lters [15] or active cancellers where additional power devices are added to the converter structure [16]. Another idea is to employ modied converter structures, e.g. 4-leg inverters [17]. All of the above solutions imply, however, an increase of the overall cost of the drive and a reduction of its reliability. A different approach consists in limiting the cause of the common-mode disturbance by a proper selection of the switching pattern of the inverter. Such an approach is followed in [18,19], in case of PWM fed drives. In [20] a new ST-DTC strategy, called DTC EMC, has been developed for adjustable speed drives. This approach permits the common-mode emissions to be strongly reduced in comparison with the classical DTC algorithm. Compared to traditional passive common-mode lter that limits the common-mode current increasing the common-mode impedance, the proposed DPC methods reduce the cause, i.e. the common-mode voltage spectrum. In this way the high frequency components are abated and the possibility to have coupling paths through parasitic capacitance is consequently reduced. In addition even if a traditional passive common-mode lter is placed at the inverter output, a parasitic path involving the inverter heatsink, the ground and the source (such as a photovoltaic panel or a wind generator) can exist [21]. This paper presents two new ST-DPC strategies of three-phase grid connected VSIs for distributed generation, devised for the minimization of the common-mode emissions. These strategies have been called DPC-EMC 1 (electro magnetically compatible) and DPCEMC 2. Both DPC-EMC 1 and DPC-EMC 2 reduce the common-mode

Table 1 Inverter states and common voltages. State u0 u1 u2 u3 u4 u5 u6 u7 (0, 0, 0) (1, 0, 0) (1, 1, 0) (0, 1, 0) (0, 1, 1) (0, 0, 1) (1, 0, 1) (1, 1, 1) usA0 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 usB0 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 usC0 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 UDC /2 ucom UDC /2 UDC /6 UDC /6 UDC /6 UDC /6 UDC /6 UDC /6 UDC /2

emissions of the VSI by alternatively using only even or only odd voltage vectors in each of the six sectors in which the grid voltage lies, without using any null vector. This approach permits the common-mode emissions to be reduced in comparison with the classical DPC algorithm. Differently from the use of passive lters the DPC algorithm worsens the harmonic contents of line currents increasing the high frequency part of the spectrum; however these components can be further ltered to abate the THD. 2. The common mode emissions In a three-phase system with a supply and a load the commonmode voltage ucom is given by: ucom = usA0 + usB0 + usC0 3 (1)

where usA0 , usB0 , and usC0 are referred to ground. If the load is supplied by a symmetric sinusoidal three-phase voltage, ucom is instantaneously equal to zero. However, when the load is supplied by an inverter, the common-mode voltage is always different from zero and its instantaneous value can be computed on the basis of the DC link voltage (UDC ) and the switching pattern of the inverter, as shown in Table 1 (ui stands for the i-th stator voltage space vector). The common-mode path seen by the DG inverter is composed of the common-mode equivalent circuit of the power line and those of the loads, each presenting its own common-mode impedance.

Fig. 1. Amplitude of the common-mode voltage spectrum versus frequency for different values of the duty circle (1 ) in VOC.

832

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839 Table 2 Effect of the VSI voltage vectors on P and Q. u0 P Q A B uk A B uk+1 uk+2 uk+3 A B uk1 uk2

In case of a DPC-SVM strategy [12], the variations of the commonmode voltage are those typical of PWM inverter fed drives, where six steps of amplitude UDC /3 of the common mode voltage occur in each PWM period with resulting higher emissions than those obtained with the algorithms of this paper. In case of VOC, equal to that of DPC-SVM, the harmonic content of the common-mode voltage is basically in the fPWM = 1/TPWM frequency range, in particular a strong component at fPWM is present and its odd multiples, and its amplitude decreases with a sin(x)/x law with frequency. Fig. 1 shows the amplitude of the commonmode voltage spectrum versus frequency for different values of the duty cycle (1 ) and fPWM = 4 kHz obtained with VOC. It should be noted that the harmonics starting from the fPWM frequency can be found up to 100 kHz with signicant amplitude. 3. Direct power control 3.1. Classic ST DPC ST DPC [6] is based on the idea to control directly and in a decoupled way the active and reactive power exchanged by the VSI with the electrical grid, avoiding any current control. The optimal switching pattern is to be selected on the basis of the active and reactive power demands and depends on the instantaneous position of the grid voltage space-vector. It can be shown that if the grid voltage vector ug lies instantaneously in the sector k, the effect on the active and reactive power, P and Q, exchanged with the grid caused by the application of any VSI voltage vector can be summarized in Table 2, which takes also into consideration each sub-sector inside a sector (A is the rst and B the second subsector in the rotating sense of the grid voltage vector). This table, in which a low variation is indicated with a single array while a high one with a double array, can be inferred from Fig. 2, which shows the effects of the application of any active voltage vector

on the active and reactive power exchanged with the grid after a sampling time of the control system T (for the symbols see the list). This gure is drawn when the grid voltage vector ug (t) lies in the 1st sector and each inverter active voltage vector is applied. Under the assumption that the control system be correctly working and therefore the injected current is (t) in the time instant t be in phase with the grid voltage, the voltage drop on the series inductance L, neglecting its parasitic resistance, is the vector difference ug (t) us (t). The current vector is (t + T) after a sampling time of the control system T is thus obtained as the vector sum of is (t) and an additional term in phase with the inductance voltage drop. The active and reactive power for control feedback have been estimated instantaneously on the basis of the following equations: P = usA isA + usB isB + usC isC , 1 Q = ((usB usC )isA + (usC usA )isB + (usA usB )isC ) 3 (2a,b)

The entire control scheme is shown in Fig. 3. The DC generator UDC represents the renewable energy source (photovoltaic, wind, fuel cell, etc.). The VSI is connected to the electrical grid via a series inductance L. Both P and Q are controlled by 2-level hysteresis controllers. The sector and sub-sector in which the grid voltage vector instantaneously lies are computed by an algorithm for nding the sector and sub-sector with simple IF-THEN instructions.

Fig. 2. Effect of the application of any voltage vector on the active and reactive power exchanged with the grid.

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839

833

Fig. 3. Block diagram of the DPC scheme (up) and 4-level hysteresis controller (down).

3.2. DPC-EMC 1 Table 1 shows that, if only even or only odd active voltage vectors are used (uk , with k respectively even or odd), no common-mode voltage variation is generated. If a transition from an even voltage vector to an odd one (or vice versa) occurs, a common-mode variation of amplitude UDC /3 is generated. If a transition from an odd (even) voltage vector to the zero (seventh) voltage vector occurs, a common-mode variation of amplitude UDC /3 is generated. Finally, if a transition from an odd (even) voltage vector to the seventh (zero) voltage vector occurs, a common-mode variation of amplitude 2UDC /3 is generated. Therefore, from the point of view of common-mode emissions, the worst case is a transition from an odd (even) voltage vector to the seventh (zero) voltage vector. For this reason, whatever inverter control technique is devised, to minimize the generated common-mode emissions of the DG unit, the exploitation of both null voltage vectors (zero and seventh) should be avoided. If a DPC technique is used, this consideration is helpful also from the control point of view. As a matter of fact, the original DPC [6] has been devised so that the zero voltage vector is adopted when a P increase is needed when both a Q increase and decrease are needed (see Table 3). Actually, when the grid voltage vector lies in the kth sector, the application of the kth voltage vector produces a high decrease of the absorbed active power and a low increase (sub-sector A) or decrease (sub-sector B) of the reactive power.

On the contrary, the application of the uk+2 voltage vector produces a slight increase both of the active and reactive power while the uk2 voltage vector produces a slight decrease of the active power and an increase of the reactive power. On the basis of the above, the control strategy summarized in Table 4 can be inferred, which has been called DPC-EMC 1. This means that when the grid voltage vector lies in the odd (even) sector, only odd (even) voltage vectors are employed. In the end it is clear that, as long as the grid voltage vector lies in one sector, no common-mode voltage variation occurs. Each commutation of the common-mode voltage appears only when the grid voltage vector goes from one sector to the adjacent one. Moreover, at each sector crossing, the common-mode voltage variation is the minimum achievable, equal in magnitude to UDC /6. Therefore in steady-state only six variations of the common-mode voltage of amplitude UDC /6 appear theoretically in each period of the grid frequency. However, the benecial of a signicant reduction of the common-mode emissions of the inverter is paid back with higher ripples both in the active and reactive power waveforms and nally with higher harmonic contents of the injected currents. This drawback can however be mitigated by a proper hardware programming optimization, trying to increase the sampling frequency of the control system. It should be also remarked that the use of this DPC strategy is quite straightforward to apply, since the proper voltage space vector is created at every sampling time. This means that this strategy can be implemented just by using software commands.

Table 3 Optimal switching table of classic DPC. Sub A P P Q Q Q Q u0 uk1 uk uk1 Sub B u0 u0 uk+1 uk

Table 4 Optimal switching table of DPC-EMC 1. Sect. k P P Q Q Q Q uk+2 uk2 uk uk

834 Table 5 Optimal switching table of DPC-EMC 2.

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839

Sect. k P P P Q Q Q Q Q Q uk uk uk+1 uk1 uk+2 uk2

3.3. DPC-EMC 2 DPC-EMC 2 has been devised to improve some of the drawbacks of DPC-EMC 1, i.e. high harmonic content of the injected currents (which is particularly important for distributed generation from renewable sources) and the presence of a bias in the controlled reactive power in generating mode for low ratios DC link voltage/grid voltage. As a matter of fact, the poor control of the reactive power in generating mode is due to the fact that both the uk2 voltage vectors cause small variations of the reactive power. On the contrary, uk1 voltage vectors cause high variations of the reactive power (see Table 2). DPC-EMC 2 is therefore based on the idea to employ DPC-EMC 1 strategy as far as reactive power error is sufciently bounded and to use uk1 voltage vectors only when high reactive power variations are required. This is achieved by using a 4-level hysteresis controller (Fig. 3) for Q control, instead of a 2-level one. In this way, when the Q error is low, the output of the controller is 1 and thus vectors uk2 are used (the controller coincide with that of the DPC-EMC 1). On the contrary, when the Q error is high the output of the controller is 2 and thus vectors uk1 are used. The control strategy is summarized in Table 5. The result is a better capability to control the Q error to zero (no reactive power exchanged with the grid), lower ripple in the P and Q waveforms and lower harmonic content of the injected currents. With regard to the common-mode voltage, the result is a waveform which is the six-step one of DPC-EMC 1 with few additional spikes due to the rare application of vectors uk1 . However, the harmonic content of the common-mode voltage at frequencies about some kHz slightly increases with respect to that of DPC-EMC 1 but this deterioration is negligible (see Section 5 for

Fig. 4. Theoretical waveform of the common-mode voltage for DPC EMC1.

the comparison), and in any case much lower than that of classic DPC. 3.4. Spectrum of the common-mode voltage Among the above DPC strategies, the only predictable waveform of the common-mode voltage is that generated by DPC-EMC 1. In this case, the theoretical steady-state common-mode voltage ucom , neglecting all parasitic effects and the rise/fall time, is a periodic waveform, with a period equal to 1/3 of the period of the fundamental of the grid voltage. Fig. 4 shows the theoretical time domain waveform of the common-mode voltage obtainable with the DPC-EMC 1. Its harmonic spectrum can be analytically inferred by computing the coefcients of its Fourier series expansion as functions of the DC link voltage UDC and the fundamental pulsation of the grid voltage :

ucom =
n=1

UDC sin(3nt) 3 n

(3)

On this basis, the harmonic content of the common-mode voltage is basically in the low frequency region, in particular 3rd harmonic of the fundamental (150 Hz in Europe) and its odd multiples (3rd, 9th, 15th, 25th etc. of the fundamental), and its amplitude decreases with inverse proportionality with the frequency itself. Such a controlled generator, therefore, shows a common-mode harmonic content which is quite low. DPC-EMC 2 presents a harmonic content which is slightly higher in the frequency range of kHz, remaining however very close to that of DPC-EMC 1. On the

Fig. 5. Electrical scheme of the DG generation unit.

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839

835

it is always lower than VOC. In any case a sudden variation of the common-mode voltage at each sampling time of the control system should be expected. This means that the frequency content of the common-mode voltage of the classic DPC algorithm is much higher than that obtainable with the new DPC-EMC algorithms.

4. Test setup All DPC techniques have been tested experimentally on a properly devised test setup. The sampling frequency of all control strategies has been set to fc = 20 kHz. Figs. 5 and 6 show respectively the electrical scheme and the photograph of the test setup. The common-mode voltage has been measured with a capacitor divider (Cm = 1 nF in Fig. 5). The employed test set up consists of:
Fig. 6. Photograph of the test setup.

contrary, in the classic DPC, the switching pattern of the power devices of the inverter is commanded by the control law itself, and therefore the common-mode voltage variation is unpredictable but

A 7.5 kVA, three-phase VSI. An electronic card with voltage and current sensors (model LEM CV3-1000 and LEM LA-55P). A dSPACE card (DS1103) with a PowerPC 604e at 400 MHz and a oating-point DSP TMS320F240.

Fig. 7. Pref , P, Qref , Q, isA , isB , isC during a step Pref = 1000 W and Qref = 0 at Udc = 560 V with DPC-EMC 1.

Fig. 8. Pref , P, Qref , Q, isA , isB , isC during a step Pref = 1000 W and Qref = 0 at Udc = 560 V with DPC-EMC 2.

836

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839

Fig. 9. Pref , P, Qref , Q, isA , isB , isC during a step Pref = 1000 W and Qref = 0 at Udc = 560 V with classic DPC.

A DC voltage source of 560 V, emulating a voltage renewable source. A 100 V sinusoidal grid. An interconnection series inductance of 12 mH with a parasitic resistance of 0.9 . 5. Experimental results The experimental application of the proposed techniques has been made on the test setup described in Section 4. The DC supply conguration corresponds to Udc = 560 V. Figs. 79 show, respectively with DPC-EMC 1, DPC-EMC 2 and the classic DPC, the reference and estimated P, Q when a step Pref = 1000 W and Qref = 0 VAR are given and the corresponding time waveforms of the three injected currents. Experimental results are consistent with those obtained with the simulations (not shown here). Particularly, all DPC strategies present a good dynamic performance as for the P step command, with no appreciable differences. Between the DPCEMC 1 and the DPC-EMC 2 there is no appreciable difference in controlling the reactive power, according to simulation results, due to the high DC link voltage value of Udc = 560 V. It should be minded that, if the DC link voltage is below a certain threshold, the system starts to have a bias in the controlled Q when DPC-EMC 1 is used, which is not present with DPC-EMC 2. In the following, only tests with a higher DC link voltage value are shown for stability reasons of the control system. On the contrary, the classic DPC exhibits a signicant ripple with negative peaks on the estimated Q, which are present also in simulation. With regard to the harmonic content of the injected currents, results are summarized in Fig. 10, which shows the THD% versus the generated power with all DPC techniques including, for comparison, also the VOC results and the limit of 5% required by the international IEEE Standard [22]. As expected, VOC outperforms all the other techniques, always remaining below the prescribed limit, except at very low generated power. All of the DPC techniques present THDs decreasing for increasing generated power, with the DPC-EMC 1 and the DPC-EMC 2 with very similar results. In particular the DPC-EMC 1 is signicantly worse for low generated power levels (THD% almost equal to 70%) while it almost the same at increasing power. The classic DPC has a better behaviour among DPC techniques for low generated power almost complying with the standard for increasing value of generated power. It is evident that none of the DPC techniques fully complies with the Standard; however it should be borne in mind that the high value of THD is mainly caused by the presence in the current spectrum by

Fig. 10. THD% versus P with DPC-EMC 1, DPC-EMC 2, classic DPC and VOC calculated with unltered current.

Fig. 11. THD% versus P with DPC-EMC 1, DPC-EMC 2, classic DPC and VOC calculated with ltered current.

high frequency harmonics. Since the THD is computed considering up to 40th harmonics and all ST-DPC techniques present harmonics in the range from 20th to 40th this effect was to be expected. In a real word application, this limitation could be coped ltering the line currents by a low-pass power line lter at the output of the inverter. If a 2nd order low pass lter with cut-off frequency equal to 100 Hz is used, then the obtained THD is shown in Fig. 11. It should be noted that this lter makes all DPC techniques equivalent from the point of view of standard compliance; it means that the proposed DPC techniques can abate the common-mode spectrum content without worsening the THD in compliance with the standard.

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839

837

DPC EMC1
400 350

(V)
com

300 250 200 150 0 0.01 0.02 0.03 0.04 0.05 0.06

time (s)
150

Amplitude (V)

100

50

500

1000

1500

2000

2500

3000

3500

4000

4500

5000

frequency (Hz)
Fig. 12. Common-mode voltage and its spectrum obtained with FFT with DPC-EMC 1.

DPC EMC2
400 350

(V) u
com

300 250 200 150 100 0 0.01 0.02 0.03 0.04 0.05 0.06

time (s)
150

Amplitude (V)

100

50

500

1000

1500

2000

2500

3000

3500

4000

4500

5000

frequency (Hz)
Fig. 13. Common-mode voltage and its spectrum obtained with FFT with DPC-EMC 2.

Moreover, it is to be expected that increasing the sampling frequency of the control system by optimizing its program or the use of a more performing programmable hardware can further contribute to lessen the harmonic content of the line current. As a matter of fact, the current variation i at each sampling time of the system is proportional to the sampling time itself. The lower is the sampling time, the lower is i with ripple reduction and reduced harmonic content. In this case a sampling frequency of 20 kHz has been used but higher are expected to be implementable with more dedicated hardware structures like FPGAs. It should be noted that, even if the VOC has a better performance in terms of THD% of the inverter current, it presents the worst behaviour in terms of common-mode emissions. On the other hand, DPC techniques would be able to minimize the common-mode emissions and also have the well-known advantages of lower com-

plexity and computational demand. This is particularly interesting for the exploitation of renewable sources. Finally, Figs. 1214 show the steady-state common-mode voltage time waveforms and their FFT obtained, respectively with the DPC-EMC 1, the DPC-EMC 2 and the classic DPC. Experimental results are in agreement with the simulations and with the theory. In particular, it is to be expected that, the Fourier series expansion of the common-mode voltage obtained with DPC-EMC 1 shows harmonics basically in the low frequency region, in particular 3rd harmonic of the fundamental (150 Hz in Europe) and its odd multiples (3rd, 9th, 15th, 25th, etc. of the fundamental), with amplitudes decreasing with inverse proportionality with the frequency. DPCEMC 2 is expected to present a harmonic content which is slightly higher in the frequency range of kHz, remaining however very close to that of DPC-EMC 1. On the contrary, in the classic DPC, the switch-

838

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839

400 300

DPC

ucom (V)

200 100 0 -100 0 0.01 0.02 0.03 0.04 0.05 0.06

time (s)
50 40 30 20 10 0 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000

Amplitude (V)

frequency (Hz)
Fig. 14. Common-mode voltage and its spectrum obtained with FFT with classic DPC.

ing pattern of the power devices of the inverter is commanded by the control law itself, and therefore the common-mode voltage variation is unpredictable. The analysis of results show that the classic DPC presents the worst behaviour with spectral lines of high magnitude in a frequency range from 2 kHz to 10 kHz. On the contrary, the best behaviour is shown by the DPC-EMC 1, whose common-mode voltage waveform is a square wave with the fundamental frequency at 150 Hz and harmonics only at low frequency, followed by DPC-EMC 2 which is slightly worse.

Acknowledgment This work has been funded by the project MIUR n. 211. Appendix A. List of symbols This work has been funded by the project MIUR n. 211. usA , usB , usC inverter phase voltages isA , isB , isC inverter phase currents ugA , ugB , ugC grid phase voltages us inverter voltage space vector in the xed reference frame is inverter current space vector in the xed reference frame grid voltage space vector in the xed reference frame ug uL = ug us series inductance voltage drop L series inductance DC-link voltage UDC ucom , icom common-mode voltage and current References
[1] M.P. Kazmierkowski, R. Krishnan, F. Blaabjerg, Control in Power Electronics, London, UK, 2002. [2] M.P. Kazmierkowski, Current control techniques for three-phase voltagesource PWM converters: a survey, IEEE Trans. Ind. Electron. 45 (5) (1998) 691703. [3] M.P. Kazmierkowski, H. Tunia, Automatic Control of Converter-Fed Drives, Elsevier, The Netherlands, 1994. [4] S. Hansen, M. Malinowski, F. Blaabjerg, M.P. Kazmierkowski, Sensorless control strategies for PWM rectier, in: APEC 2000 (Applied Power Electronics Conference and Exposition), vol. 2, 610 February, 2000, pp. 832838. [5] M. Liserre, A. DellAquila, F. Blaabjerg, An overview of the three-phase voltage source active rectiers interfacing the utility, in: Powertech Conference, June 2326, Bologna, Italy, 2003. [6] T. Noguchi, H. Tomini, S. Kondo, Direct power control of PWM converter without power-source voltage sensor, IEEE Trans. Ind. Appl. 34 (3) (1998) 473479. [7] M. Malinowski, Sensorless Control Strategies for Three-Phase PWM Rectiers, PhD Thesis, University of Warsaw, Poland, 2001. [8] M. Malinowski, M.P. Kazmierkowski, S. Hansen, F. Blaabjerg, Virtual-ux-based direct power control of three-phase PWM rectiers, IEEE Trans. Ind. Appl. 37 (4) (2001) 10191027. [9] M. Malinowski, M.P. Kazmierkowski, M. Trzynadlowski, A comparative study of control techniques for PWM rectiers in AC adjustable speed drives, IEEE Trans. Power Electron. 18 (6) (2003) 13901396. [10] I.Y. Chung, W. Liu, D.A. Cartes, E.G. Collins, S.I. Moon, Control methods of inverter-interfaced distributed generators in a microgrid systems, IEEE Trans. Ind. Appl. 46 (3) (2010) 10781088.

6. Conclusions This paper presents two new direct power control (DPC) strategies of three-phase grid connected VSIs for distributed generation, devised for the minimization of the common-mode emissions. This effect, involving parasitic components, is difcult to be predicted a priori and is critical for the electromagnetic compatibility of the system. Both of these two strategies, called respectively DPC-EMC 1 and DPC-EMC 2, reduce the common-mode emissions of the VSI by alternatively using only even or only odd voltage vectors in each of the six sectors in which the grid voltage lies, without using any null vector. The reduction of common-voltage spectrum, instead of common mode current spectrum operated by passive lters, makes the proposed techniques suitable especially for distributed generation plants. The new techniques have been tested in numerical simulations and experimentally on a properly devised test setup, and compared with the classic DPC. Results show that these two new techniques highly reduce the harmonic content of the common-mode voltage, and consequently that of the common-mode current owing into the ground connection, in respect with the classic DPC, with DPCEMC 1 slightly better than DPC-EMC 2. On the contrary, DPC-EMC 2 outperforms DPC-EMC 1 in terms ripple of the active and reactive power waveforms, especially for lower DC link voltage/grid voltage ratios. Both of these new techniques are worse than the classic DPC as for the harmonic content of the injected currents; however, the introduced harmonics lie in the high frequency region and can be easily eliminated by a conventional lter achieving the compliance with the standard

M. Cirrincione et al. / Electric Power Systems Research 81 (2011) 830839 [11] T. Loix, K. Engelen, J. Driesen, R. Belmans, Common-mode voltage generation by grid-connected inverters: problems and solutions, OTTI, in: 4th European PV-Hybrid and Mini-Grid Conference, Glyfada, Athens, Greece, May 2930, 2008. [12] R.K. Jardan, J. Hamar, I. Nagy, P. Korondi, P. Gogos, Time domain analysis of common-mode EMI noise in the power lines at electronics production plants, in: 28th Annual Conference of the Industrial Electronic Society, IECON 02, vol. 2, 58 November, 2002, pp. 938943. [13] Directive EMC 89/336/EEC on the approximation of the laws of the Member States relating to electromagnetic compatibility. [14] M. Malinowski, M. Jasinski, M.P. Kazmierkowski, Simple direct power control of three-phase PWM rectier using space-vector modulation (DPC-SVM), IEEE Trans. Ind. Electron. 51 (2) (2004). [15] S. Ogasawara, H. Ayano, H. Akagi, Measurement and reduction of EMI radiated by a PWM inverter-fed AC motor drive system, IEEE Trans. Power Elec. 33 (4) (1997) 10191026. [16] S. Ogasawara, H. Ayano, H. Akagi, An active circuit for cancellation of commonmode voltage generated by a PWM inverter, IEEE Trans. Power Electron. 13 (5) (1998) 835841.

839

[17] A.L. Julian, G. Oriti, T.A. Lipo, Elimination of common-mode voltage in threephase sinusoidal power converters, IEEE Trans. Power Electron. 14 (5) (1999) 982989. [18] M. Cacciato, A. Consoli, G. Scarcella, A. Testa, Reduction of common-mode currents in PWM inverter motor drives, IEEE Trans. Ind. Appl. 35 (2) (1999) 469476. [19] A. Consoli, G. Oriti, A. Testa, A.J. Julian, Induction motor modelling for common mode and differential mode emission evaluation, in: Industry Applications Conference, IEEE Thirty-rst IAS Annual Meeting, IAS 96, vol. 1, 610 October, 1996, pp. 595599. [20] M. Cirrincione, M. Pucci, G. Cirrincione, G. Vitale, A new direct torque control strategy for the minimization of common-mode emissions, IEEE Trans. Ind. Appl. 42 (2) (2006) 504517. [21] T. Kerekes, R. Teodorescu, M. Liserre, Common mode voltage in case of transformerless PV inverters connected to the grid, in: IEEE International Symposium on Industrial Electronics, ISIE, 2008, pp. 23902395. [22] IEEE 1547-2003, Standard for Interconnecting Distributed Resources with Electric Power Systems.