Nonlinear Waveshaping using Diode Circuits

Text Book: Pulse, Digital and Switching Waveforms Jacob Millman, Herbert Taub McGraw-Hill Kogakusha Ltd (1965)
Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Diode
Practical Diode V-I Characteristic
Ideal Diode V-I Characteristic

V
Piece-wise linear approximation for large signals

I
V

slope = 1/Rf

slope = 1/Rr

Approximation of Diode Characteristics: Considerations a) Cut-in Voltage (V): 0.3V(Ge), 0.7V(Si) b) Reverse Saturation (Leakage) Current (Is ): few A c) Forward Resistance (Rf): few d) Reverse Resistance (Rr): many k e) Diode Capacitance: few pF f) Effect of Temperature
Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Diode Clipper Circuits (Positive)

R
assumptions: V 0, Is = 0, R f = 0, R r = VR +V vi

Positive Shunt Clipper

vi vo

D VR
VR +V

vo

D 'ON' vi D 'OFF' vi

VR +V ; vo VR +V ; vo

Transfer Characteristic

VR +V

vi

Exercise: Similarly analyse Positive Series vi Clipper

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

D R VR
3

vo

Diode Clipper Circuits (Negative)

R
assumptions: V 0, Is = 0, R f = 0, R r = V ; vo V ; vo VR vi V

Negative vi Shunt Clipper

Transfer Characteristic

D VR vo
VR - V

vo

D 'ON' vi D 'OFF' vi

VR VR

VR - V

vi

Exercise: Similarly analyse Negative Series vi Clipper

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

D R VR
4

vo

Diode Clippers with Rf 0 & Rr

R D VR
assumptions: V 0, Is = 0, R f 0, R r VR vi Rf Rf + R R R + Rr

vi

vo

D 'ON'

vi > VR ; v o = VR + v i

D 'OFF' vi < VR ; v o = vi + VR

Circuit analysis is done replacing diode with Rf when forward-biased and with Rr when reverse-biased. Rf In forward biased region, imperfect clipping slope 0 vo Rf R takes place since slope 0, and in reverse VR biased region waveform distortion occurs since Rr slope 1. Ex: Carry out similar analysis for the slope <1 R Rr other diode clippers. VR vi Choice of External Resistor R: For clipping operation to be close to ideal, we should choose R >> Rf ; but to minimize distortion of vi passed, R << Rr is to be chosen. An optimal choice is R = (Rf Rr)1/2

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Diode Clippers with Is = non-zero constant

R
assumptions: V 0, Is 0, R f 0, R r

vi

D VR

vo

D 'ON'

v i > VR + V ; v o = VR + V

D 'OFF' v i < VR + V ; v o = v i + Is R

For Is = non-zero constant, the output when diode is in OFF region gets modified. Exercise: Analyse the other three diode clippers similarly.

Effect of Diode Capacitance

Diode capacitance (in pF) shunts the diode, and acts as a short for any discontinuities in input voltage. High frequency components are passed even when diode is reverse biased. Depending on location of diode in the circuit, waveshape changes will occur. Portions of the waveform will be depend on charging/discharging process of the diode capacitance.

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Effect of Diode Capacitance: Example

C1 C1 Rf R C2
vo vi C1

vi

Rr R C2 vo vi R C2
vo

C1 = Diode capacitance (pF) C2 = Input capacitance (pF) Example: C1 = 5 pF, C2 = 20 pF, Rf = 100 , R = 1 M, Rr = . Find and sketch response to input square pulse 10V.

Equivalent Circuit for D ON

+5 V

Equivalent Circuit for D OFF

5V 1 = 2.5ns
2V

3V 2 = 25s

vi

0V

vo

-5 V

Exercise: Repeat the above problem with diode and R interchanged in the negative series clipper circuit shown.
Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Two-level Diode Clippers: Examples

R vi D1 VR1 D2 VR2
vi VR1
D1 D2 vo

ON OFF
OFF

OFF OFF
ON

VR1 vi
VR2

vo

VR1 vi VR2
vi VR2

Note: Two independent clipping levels. Above circuit can eliminate noise riding The peaks of a square wave. (Assumed VR2 > VR1)

vo
VR2
VR1

Zener diode-clipper
R vi Z1 Z2 Zener voltages VZ1 and VZ2
Z1

VR1

VR2
Z2
breakdown

vi
vo
VZ2 + V

vo

vi VZ2 + V

ON

vi -(VZ1 + V ) VZ2 + V vi -(VZ1 + V )

breakdown
OFF/ON

ON
ON/OFF

-(VZ1 + V )
vi

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Two-level Diode Clippers: Examples

D1

V 0
vi -V

D1 ON
OFF -V vi V

D2 OFF
OFF

vo v i + V
0

D2

vi

vo

v i V

OFF

ON

v i - V

Noise Clipper: Eliminates noise of small amplitudes. (Exercise: Sketch transfer characteristic.)
D1 D2 100K 25V 200K 100V

vi

vo

Solution: Assuming ideal diodes, vi 25 V v 0 = 50 V 25V vi 100 V v 0 = vi v 100 v 0 = 100 V

(Exercise: Sketch the transfer characteristic)

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

+ vc C

Clamping Circuit: Ideal Diode

+V
D

vi

vo

vi
t1

Analysis assuming ideal diode t < t1: D is forward biased. C charges instantaneously (with zero time-constant ) to input voltage. vC = vi ; vo = vi vC = 0 t = t1: vi reaches first peak = +V volts. vC = V t > t1: D is reverse biased. C has no discharge path. vC = constant = V; vo = vi V; output positive peaks are clamped to 0 volt level. Hence called Positive Clamper
Exercise: Analyze and verify that the circuit with diode reversed operates as a negative clamper.

-V +V vc 0V 0V vo = vi - vc
t t

-2V
10

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Clamping Circuit: Ideal Diode

Case of increasing amplitude Case of decreasing amplitude

vi

0V vo

Increased amplitude peaks are clamped by instantaneous charging of capacitor. However, since discharge path is not available, clamping is ineffective for decreasing amplitude waveforms.
Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

11

Clamping Circuit: Non-ideal Diode

With Rf 0 and Rr , the capacitor-diode circuit operates as a high-pass circuit switching between diode ON/OFF states with effective resistance alternating between Rf and Rr . Biasing condition of diode depends on polarity of vo = vi vC. Equivalent circuits for analysis
when diode forward biased C (ON if vo positive and OFF if negative) when diode v reverse i biased C

vi

D ON f = Rf C

Rf

vo

D OFF r = Rr C

Rr

vo

With finite Rf and Rr ,the capacitor at any instant is either charging or discharging, hence is vC is never constant. The dc (average) level of input waveform gets shifted by the dc (average) level of capacitor voltage. For effective clamping of increasing or decreasing amplitude waveform-peaks, both charging and discharging time-constants have to be reasonably small. For this purpose, the diode is shunted with an external resistance R such that Rf << R << Rr . Analysis at input discontinuities: If the discontinuity includes both forward and reverse-biased conditions, both the above circuits need to be used, using the principle that capacitor voltage does not change during the transition.
Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

12

Practical Clamping Circuit: with Rs 0

C Rs

vs

vo

Charging/ discharging time-constants Diode ON (vo > 0) : (Rf+Rs)C Diode OFF (vo < 0) : (R+Rs)C

Example: Rs = Rf = 100 , R = 10 K, C = 1 F. Find response (first two cycles) to a symmetric square wave input 0-10 V, frequency = 5 kHz. Capacitor uncharged at t = 0.

C
D ON f = (Rf +Rs)C

C Rs vs Rf vo
D OFF r = (R +Rs)C

Rs R vo

vs

10 5 vo 0 100 s 4 100 s 6.4 7.8

13

1.8

1.8

1.1 t

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Steady State Analysis: Clamping Circuit Theorem

The capacitor voltage varies continuously, as charging / discharging current is always present. The average (dc) level of input periodic waveform is biased by the average (dc) level of the capacitor voltage. Steady state is reached when average capacitor voltage reaches a steady value. Thus, at steady state, the net charge acquired by the capacitor over a cycle must be zero. This principle is the basis of Clamping Circuit Theorem.

As R r >> R >> R f , effective resistance = R f while charging and R while discharging. Let charging current = if (D "ON", v o > 0) & discharging current = i r (D"OFF",v o < 0) At steady state, net charge gained by C should = 0
D " ON "

i f dt
D " OFF "

ir dt

vs

ir

if

D R

if
vo

v0 f Rf

(with D "ON"), ir

v0 r (with D"OFF") R vor dt

vo 0

Define A f
vo 0

vof dt , and A r i f dt ir dt
D " OFF "

Then
D " ON "

Af Ar

Rf R
14

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

Steady State Response to Square Wave Input

V
vs

V T2

T1

V1
V V1 V1

V1 e V2 e

T1 Rf + Rs C T2 R + Rs C

(1) (2) R + Rs V2 R R + Rs V2 R (3) (4)

V V1 vo V1

V2 V=

Rf + Rs V1 Rf

V2

V2

V2

Rf + Rs V= V1 Rf
V2

Equations 3 and 4 are derived using the principle that capacitor voltage is unaffected during discontinuous changes at input.

From 3 & 4, and defining f V1 V1 and r V2 f Rf R + Rs R f +R s R r. If R s 0, f r

V2 , we get

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

15

Introducing Fixed VR
C
ir

C D R vo vs
ir

X
D R VR vo

if

if

vs VR

X
Positive peaks are clamped at VR Af Ar Rf R holds if A f and A r are computed

At x-x, dc level of waveform is zero (highpass effect). With the conditions that the amplitude is at least VR and R >> R f , and V Af 0, clamping theorem becomes VR +V T1 Ar = Rf R

with respect to dc level VR . If A f and A r are with respect to zero level, the relation becomes A f VR T1 R = f A r + VR T2 R

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

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Transmission (Attenuation) Factors

v o (R s 0) = Rf v o (R s Rf + Rs R v o (R s R + Rs 0) when diode is forward biased. 0) when diode is reverse biased.

Non-zero R s causes unequal attenuation to different parts of waveform and therefore causes distortion. (Note: This attenuation is on v o , not on vi )

Presented by APN Rao, Dept ECE, GRIET, Hyderabad. Jan 2012

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