SN54ALS534A, SN74ALS534A, SN74AS534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

SDAS168B APRIL 1982 REVISED JULY 1996

D D D

3-State Bus Driving Inverting Outputs Buffered Control Inputs Package Options Include Plastic Small-Outline (DW), Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs

SN54ALS534A . . . J PACKAGE SN74ALS534A, SN74AS534 . . . DW OR N PACKAGE (TOP VIEW)

description
These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively lowimpedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the complement of the logic states set up at the data (D) inputs. The ALS534A and SN74AS534 have inverted outputs, but otherwise are functionally equivalent to the ALS374A and SN74AS374. A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE 1Q 1D 2D 2Q 3Q 3D 4D 4Q GND

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12 11

VCC 8Q 8D 7D 7Q 6Q 6D 5D 5Q CLK

SN54ALS534A . . . FK PACKAGE (TOP VIEW)

OE VCC

1D 1Q

2D 2Q 3Q 3D 4D

3 4 5 6 7 8

2 1 20 19 18 17 16 15

8Q 8D 7D 7Q 6Q 6D

14 9 10 11 12 13

OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are off. The SN54ALS534A is characterized for operation over the full military temperature range of 55C to 125C. The SN74ALS534A and SN74AS534 are characterized for operation from 0C to 70C.
FUNCTION TABLE (each flip-flop) INPUTS OE L L L H CLK H or L X D H L X X OUTPUT Q L H Q0 Z

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1996, Texas Instruments Incorporated

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4Q GND CLK 5Q 5D

SN54ALS534A, SN74ALS534A, SN74AS534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS168B APRIL 1982 REVISED JULY 1996

logic symbol
1 OE CLK 11 EN C1 2 5 6 9 12 15 16 19

logic diagram (positive logic)

OE CLK 1 11 C1 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 3D 7 C1 1D 6 3Q 2D C1 4 1D 1D 3 1D 2

1D 2D 3D 4D 5D 6D 7D 8D

3 4 7 8 13 14 17 18

1D

1Q

2Q

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 4D

C1 8 1D

4Q

C1 5D 13 1D

12

5Q

C1 6D 14 1D

15

6Q

C1 17 7D 1D

16

7Q

C1 8D 18 1D

19

8Q

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SN54ALS534A, SN74ALS534A, SN74AS534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS168B APRIL 1982 REVISED JULY 1996

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN54ALS534A . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55C to 125C SN74ALS534A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

SN54ALS534A MIN VCC VIH VIL IOH IOL fclock tw tsu th TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Clock frequency Pulse duration, CLK high or low Setup time, data before CLK Hold time, data after CLK Operating free-air temperature 0 16.5 10 0 55 125 4.5 2 0.7 1 12 30 0 14 10 0 0 70 NOM 5 MAX 5.5 SN74ALS534A MIN 4.5 2 0.8 2.6 24 35 NOM 5 MAX 5.5 UNIT V V V mA mA MHz ns ns ns C

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4 5 V 4.5 VCC = 4 5 V 4.5 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, CLK, OE D VCC = 5 5 V 5.5 V, VCC = 5.5 V, VCC = 5.5 V II = 18 mA IOH = 0.4 mA IOH = 1 mA IOH = 2.6 mA IOL = 12 mA IOL = 24 mA VO = 2.7 V VO = 0.4 V VI = 7 V VI = 2.7 V VI = 0 4 V 0.4 VO = 2.25 V Outputs high Outputs low 20 11 19 SN54ALS534A MIN TYP MAX 1.5 VCC 2 2.4 VCC 2 3.3 2.4 0.25 0.4 20 20 0.1 20 0.1 0.2 112 19 28 30 11 19 3.2 0.25 0.35 0.4 0.5 20 20 0.1 20 0.1 0.2 112 19 28 mA V A A mA A mA mA V SN74ALS534A MIN TYP MAX 1.5 UNIT V

VOL IOZH IOZL II IIH IIL IO ICC

Outputs disabled 10 31 20 31 All typical values are at VCC = 5 V, TA = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

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SN54ALS534A, SN74ALS534A, SN74AS534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS168B APRIL 1982 REVISED JULY 1996

switching characteristics (see Figure 1)

VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX SN54ALS534A MIN fmax tPLH tPHL tPZH tPZL tPHZ 30 CLK 3 Any An Q Any An Q 4 3 OE 4 17 18 19 20 MAX SN74ALS534A MIN 35 3 4 3 4 12 16 17 18 10 14 MAX MHz ns ns ns

PARAMETER

FROM (INPUT)

TO (OUTPUT)

UNIT

1 12 1 OE Any Q tPLZ 1 25 2 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range, TA: SN74AS534 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C Storage temperature rang, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions

SN74AS534 MIN VCC VIH VIL IOH IOL fclock tw tsu th TA Supply voltage High-level input voltage Low-level input voltage High-level output current Low-level output current Clock frequency Pulse duration Setup time, data before CLK Hold time, data after CLK Operating free-air temperature CLK high CLK low 0 4 3 2 2 0 70 4.5 2 0.8 15 48 125 NOM 5 MAX 5.5 UNIT V V V mA mA MHz ns ns ns C

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SN54ALS534A, SN74ALS534A, SN74AS534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS168B APRIL 1982 REVISED JULY 1996

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH VOL IOZH IOZL II IIH IIL IO ICC OE, CLK D TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, VCC = 4.5 V, VCC = 4.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, VCC = 5 5 V 5.5 V, VCC = 5.5 V, VCC = 5.5 V II = 18 mA IOH = 2 mA IOH = 15 mA IOL = 48 mA VO = 2.7 V VI = 0.4 V VI = 7 V VI = 2.7 V VI = 0 4 V 0.4 VO = 2.25 V Outputs high Outputs low Outputs disabled 30 77 84 84 MIN SN74AS534 TYP MAX 1.2 VCC 2 2.4 3.3 0.34 0.5 50 50 0.1 20 0.5 2 112 120 128 128 mA UNIT V V V A A mA A mA mA

All typical values are at VCC = 5 V, TA = 25C. The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.

switching characteristics (see Figure 1)

VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 , R2 = 500 , TA = MIN to MAX SN74AS534 MIN fmax tPLH tPHL tPZH tPZL tPHZ 125 CLK 3 Any An Q Any An Q Any Q 4 2 OE OE 3 2 8 9 6 10 6 6 MAX MHz ns ns ns

PARAMETER

FROM (INPUT)

TO (OUTPUT)

UNIT

tPLZ 2 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

POST OFFICE BOX 655303

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SN54ALS534A, SN74ALS534A, SN74AS534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS168B APRIL 1982 REVISED JULY 1996

PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES

7V VCC S1 RL From Output Under Test CL (see Note A) RL Test Point R1 From Output Under Test CL (see Note A) Test Point From Output Under Test CL (see Note A) R2 Test Point RL = R1 = R2

LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS

LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS

LOAD CIRCUIT FOR 3-STATE OUTPUTS

Timing Input tsu Data Input 1.3 V

3.5 V 1.3 V 0.3 V th 3.5 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES

High-Level Pulse

3.5 V 1.3 V tw 1.3 V 0.3 V

Low-Level Pulse

3.5 V 1.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS PULSE DURATIONS

Output Control (low-level enabling) tPZL Waveform 1 S1 Closed (see Note B)

3.5 V 1.3 V 1.3 V 0.3 V tPLZ 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V 3.5 V Input tPLH In-Phase Output 1.3 V 1.3 V 1.3 V 0.3 V tPHL VOH 1.3 V VOL tPLH VOH 1.3 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.3 V VOL

[3.5 V

tPHZ tPZH Waveform 2 S1 Open (see Note B)

tPHL Out-of-Phase Output (see Note C)

[0 V

VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuits and Voltage Waveforms

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PACKAGE OPTION ADDENDUM

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18-Sep-2008

PACKAGING INFORMATION
Orderable Device SN54ALS534J SN74ALS534ADW SN74ALS534ADWE4 SN74ALS534ADWG4 SN74ALS534ADWR SN74ALS534ADWRE4 SN74ALS534ADWRG4 SN74ALS534AN SN74ALS534AN3 SN74ALS534ANE4 SN74ALS534ANSR SN74ALS534ANSRE4 SN74ALS534ANSRG4 SN74AS534DW SN74AS534DWR SN74AS534N SNJ54ALS534FK SNJ54ALS534J
(1)

Status (1) OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE OBSOLETE OBSOLETE OBSOLETE OBSOLETE

Package Type CDIP SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP PDIP SO SO SO SOIC SOIC PDIP LCCC CDIP

Package Drawing J DW DW DW DW DW DW N N N NS NS NS DW DW N FK J

Pins Package Eco Plan (2) Qty 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 25 25 25 TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)

Lead/Ball Finish Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI Call TI Call TI Call TI Call TI

MSL Peak Temp (3) Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type Call TI N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Call TI Call TI Call TI Call TI

2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 20 Pb-Free (RoHS) TBD Pb-Free (RoHS)

2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) TBD TBD TBD TBD TBD

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

18-Sep-2008

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74ALS534A : Military: SN54ALS534A NOTE: Qualified Version Definitions: Military - QML certified for Military and Defense Applications

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Aug-2008

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins Type Drawing SOIC SO DW NS 20 20

SPQ

Reel Reel Diameter Width (mm) W1 (mm) 330.0 330.0 24.4 24.4

A0 (mm)

B0 (mm)

K0 (mm)

P1 (mm) 12.0 12.0

W Pin1 (mm) Quadrant 24.0 24.0 Q1 Q1

SN74ALS534ADWR SN74ALS534ANSR

2000 2000

10.8 8.2

13.0 13.0

2.7 2.5

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Aug-2008

*All dimensions are nominal

Device SN74ALS534ADWR SN74ALS534ANSR

Package Type SOIC SO

Package Drawing DW NS

Pins 20 20

SPQ 2000 2000

Length (mm) 346.0 346.0

Width (mm) 346.0 346.0

Height (mm) 41.0 41.0

Pack Materials-Page 2

MECHANICAL DATA
MLCC006B OCTOBER 1996

FK (S-CQCC-N**)
28 TERMINAL SHOWN

LEADLESS CERAMIC CHIP CARRIER

18

17

16

15

14

13

12

NO. OF TERMINALS ** 11 10 28 9 8 7 6 68 5 84 44 52 20

A MIN 0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) MAX 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) MIN 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)

B MAX 0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)

19 20 21 B SQ 22 A SQ 23 24 25

26

27

28

4 0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)

0.020 (0,51) 0.010 (0,25)

0.055 (1,40) 0.045 (1,14)

0.045 (1,14) 0.035 (0,89)

0.028 (0,71) 0.022 (0,54) 0.050 (1,27)

0.045 (1,14) 0.035 (0,89)

4040140 / D 10/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a metal lid. The terminals are gold plated. Falls within JEDEC MS-004

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