Triple, 1.

5 GHz Op Amp AD8003

FEATURES
High speed 1650 MHz (G = +1) 730 MHz (G = +2, VO = 2 V p-p) 4300 V/s (G = +2, 4 V step) Settling time 12 ns to 0.1%, 2 V step Excellent for QXGA resolution video Gain flatness 0.1 dB to 190 MHz 0.05% differential gain error, RL = 150 0.01 differential phase error, RL = 150 Low voltage offset: 0.7 mV (typical) Low input bias current: 7 A (typical) Low noise: 1.8 nV/Hz Low distortion over wide bandwidth: SFDR 73 dBc @ 20 MHz High output drive: 100 mA output load drive Supply operation: +5 V to 5 V voltage supply Supply current: 9.5 mA/amplifier

CONNECTION DIAGRAM
POWER DOWN 2 FEEDBACK 2
20

+IN 2

IN 2

24 +VS1 FEEDBACK 1 IN 1 +IN 1 POWER DOWN 1 VS1 1 2 3 4 5 6 7

23

22

21

+VS2
19 18 17 16 15 14 13 +VS3 FEEDBACK 3 IN 3 +IN 3 POWER DOWN 3 VS3 12

VS2

OUT 1

OUT 2

APPLICATIONS
High resolution video graphics Professional video Consumer video High speed instrumentation Muxing

Figure 1. 24-Lead, 4 mm 4 mm LFCSP_VQ (CP-24)

GENERAL DESCRIPTION
The AD8003 is a triple ultrahigh speed current feedback amplifier. Using ADIs proprietary eXtra Fast Complementary Bipolar (XFCB) process, the AD8003 achieves a bandwidth of 1.5 GHz and a slew rate of 4300 V/s. Additionally, the amplifier provides excellent dc precision with an input bias current of 50 A maximum and a dc input voltage of 0.7 mV. The AD8003 has excellent video specifications with a frequency response that remains flat out to 190 MHz and 0.1% settling within 12 ns to ensure that even the most demanding video systems maintain excellent fidelity. For applications that use NTSC video, as well as high speed video, the amplifier provides a differential gain of 0.05% and a differential gain of 0.01. The AD8003 has very low spurious-free dynamic range (SFDR) (73 dBc @ 20 MHz) and noise (1.8 nV/Hz). With a supply range between 5 V and 11 V and ability to source 100 mA of output current, the AD8003 is ideal for a variety of applications.

The AD8003 operates on only 9.5 mA of supply current per amplifier. The independent power-down function of the AD8003 reduces the quiescent current even further to 1.6 mA. The AD8003 amplifier is available in a compact 4 mm 4 mm, 24-lead LFCSP_VQ. The AD8003 is rated to work over the industrial temperature range of 40C to +85C.
3 VS = 5V 2 G = +1, RF = 432 G = +2, +5, RF = 464 RL = 150 1 VOUT = 2V p-p 0 1 2 3 4 5 6 7 1 10 100 FREQUENCY (MHz) 1000
05721-009

NORMALIZED CLOSED-LOOP GAIN (dB)

OUT 3

G = +1 G = +2

G = +5

Figure 2. Large Signal Frequency Response for Various Gains

Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 20052008 Analog Devices, Inc. All rights reserved.

05721-001

10

11

NC

NC

NC

AD8003 TABLE OF CONTENTS

Features .............................................................................................. 1 Applications ....................................................................................... 1 Connection Diagram ....................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications with 5 V Supply ..................................................... 3 Specifications with +5 V Supply ..................................................... 4 Absolute Maximum Ratings............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Typical Performance Characteristics ............................................. 6 Applications Information .............................................................. 12 Gain Configurations .................................................................. 12 RGB Video Driver ...................................................................... 12 Printed Circuit Board Layout ....................................................... 13 Low Distortion Pinout ............................................................... 13 Signal Routing............................................................................. 13 Exposed Paddle........................................................................... 13 Power Supply Bypassing ............................................................ 13 Grounding ................................................................................... 14 Outline Dimensions ....................................................................... 15 Ordering Guide .......................................................................... 15

REVISION HISTORY
9/08Rev. A to Rev. B Changes Applications Section ......................................................... 1 Changes to Ordering Guide .......................................................... 15 2/06Rev. 0 to Rev. A Changes to Figure 34 ...................................................................... 11 10/05Revision 0: Initial Version

Rev. B | Page 2 of 16

AD8003 SPECIFICATIONS WITH 5 V SUPPLY

TA = 25C, VS = 5 V, RL = 150 , Gain = +2, RF = 464 , unless otherwise noted. Table 1.
Parameter DYNAMIC PERFORMANCE 3 dB Bandwidth Conditions G = +1, Vo = 0.2 V p-p, RF = 432 G = +2, Vo = 2 V p-p G = +10, Vo = 0.2 V p-p G = +5, Vo = 2 V p-p Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% Overload Recovery Input/Output NOISE/HARMONIC PERFORMANCE Second/Third Harmonic @ 5 MHz Second/Third Harmonic @ 20 MHz Input Voltage Noise Input Current Noise (I/I+) Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage Input Offset Voltage Drift Input Bias Current Input Offset Current Transimpedance INPUT CHARACTERISTICS Noninverting Input Impedance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Linear Output Current Capacitive Load Drive POWER DOWN PINS Power-Down Input Voltage Turn-Off Time Turn-On Time Input Current Enabled Power-Down POWER SUPPLY Operating Range Quiescent Current per Amplifier Quiescent Current per Amplifier Power Supply Rejection Ratio (+PSRR/PSRR) Vo = 2 V p-p G = +2, Vo = 2 V step, RL = 150 G = +2, Vo = 2 V step Min Typ 1650 730 290 330 190 3800 12 30/40 G = +1, Vo = 2 V p-p G = +1, Vo = 2 V p-p f = 1 MHz f = 1 MHz NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 150 9.3 TMIN TMAX +IB/IB TMIN TMAX (+IB/IB) Vo = 2.5 V 19/40 76/97 79/73 1.8 36/3 0.05 0.01 +0.7 1.08 7.4 7/7 3.8/+29.5 14.2 600 1.6/3 3.6 48 3.9 100 27 <VS 2.5 >VS 2.5 40 130 +9.3 Max Unit MHz MHz MHz MHz MHz V/s ns ns dBc dBc nV/Hz pA/Hz % Degree mV mV V/C A A A k M/pF V dB V mA pF V V ns ns

+4/+50

400

1100

VCM = 2.5 V RL = 150 VO = 2 V p-p, second harmonic < 50 dBc 40% over shoot Power down Enable 50% of power-down voltage to 10% of VOUT final, VIN = 0.5 V p-p 50% of power-down voltage to 90% of VOUT final, VIN = 0.5 V p-p

51 3.85

46 3.92

365 4.5 8.1 1.2 59/57

0.1 235

85 10 10.2 1.6 55/50

A A V mA mA dB

Enabled Power down

9.5 1.4 57/53

Rev. B | Page 3 of 16

AD8003 SPECIFICATIONS WITH +5 V SUPPLY

TA = 25C, VS = 5 V, RL = 150 , Gain = +2, RF = 464 , unless otherwise noted. Table 2.
Parameter DYNAMIC PERFORMANCE 3 dB Bandwidth Conditions G = +1, Vo = 0.2 V p-p, RF = 432 G = +2, Vo = 2 V p-p G = +10, Vo = 0.2 V p-p G = +5, Vo = 2 V p-p Bandwidth for 0.1 dB Flatness Slew Rate Settling Time to 0.1% Overload Recovery Input/Output NOISE/HARMONIC PERFORMANCE Second/Third Harmonic @ 5 MHz Second/Third Harmonic @ 20 MHz Input Voltage Noise Input Current Noise (I/I+) Differential Gain Error Differential Phase Error DC PERFORMANCE Input Offset Voltage Input Offset Voltage Drift Input Bias Current (+IB/IB) TMIN TMAX (+IB/IB) Input Offset Current Transimpedance INPUT CHARACTERISTICS Noninverting Input Impedance Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output Voltage Swing Linear Output Current Capacitive Load Drive POWER DOWN PINS Power-Down Input Voltage Turn-Off Time Turn-On Time Input Current Enabled Power-Down POWER SUPPLY Operating Range Quiescent Current per Amplifier Quiescent Current per Amplifier Power Supply Rejection Ratio (+PSRR/PSRR) 300 Vo = 2 V p-p G = +2, Vo = 2 V step, RL = 150 G = +2, Vo = 2 V step Min Typ 1050 590 290 310 83 2860 12 40/60 G = +1, Vo = 2 V p-p G = +1, Vo = 2 V p-p f = 1 MHz f = 1 MHz NTSC, G = +2, RL = 150 NTSC, G = +2, RL = 150 6.5 TMIN TMAX 21/50 75/78 66/61 1.8 36/3 0.04 0.01 +2.7 2.06 14.2 7.7/2.3 4/27.8 5.4 530 1.6/3 1.3 to 3.7 48 1.57 70 27 <VS 2.5 >VS 2.5 125 80 +11 Max Unit MHz MHz MHz MHz MHz V/s ns ns dBc dBc nV/Hz pA/Hz % Degree mV mV V/C A A A k M/pF V dB V mA pF V V ns ns

+5/+48

1500

50 RL = 150 VO = 2 V p-p, second harmonic < 50 dBc 45% over shoot Power down Enable 50% of power-down voltage to 10% of VOUT final, VIN = 0.5 V p-p 50% of power-down voltage to 90% of VOUT final, VIN = 0.5 V p-p 1.52

45 1.62

160 4.5 6.3 0.8 59/56

0.1 43

+80 10 9.4 1.1 55/50

A A V mA mA dB

Enabled Power down

7.9 0.9 57/53

Rev. B | Page 4 of 16

AD8003 ABSOLUTE MAXIMUM RATINGS

Table 3.
Parameter Supply Voltage Power Dissipation Common-Mode Input Voltage Differential Input Voltage Exposed Paddle Voltage Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering 10 sec) Junction Temperature Rating 11 V See Figure 3 VS 0.7 V to +VS + 0.7 V VS VS 65C to +125C 40C to +85C 300C 150C

RMS output voltages should be considered. If RL is referenced to VS, as in single-supply operation, the total drive power is VS IOUT. If the rms signal levels are indeterminate, consider the worst case, when VOUT = VS/4 for RL to midsupply.
PD = (VS I S ) +

(VS / 4 )2
RL

In single-supply operation with RL referenced to VS, worst case is VOUT = VS/2. Airflow increases heat dissipation, effectively reducing JA. In addition, more metal directly in contact with the package leads and exposed paddle from metal traces, through holes, ground, and power planes reduce JA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the exposed paddle, 4 mm 4 mm LFCSP_VQ (70C/W) package on a JEDEC standard 4-layer board. JA values are approximations.
3.0

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

THERMAL RESISTANCE
MAXIMUM POWER DISSIPATION (W)

JA is specified for the worst-case conditions, that is, JA is specified for device soldered in circuit board for surface-mount packages. Table 4. Thermal Resistance
Package Type 24-Lead LFCSP_VQ JA 70 Unit C/W

2.5

2.0

1.5

Maximum Power Dissipation

The maximum safe power dissipation for the AD8003 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8003. Exceeding a junction temperature of 175C for an extended period can result in changes in silicon devices, potentially causing degradation or loss of functionality. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the die due to the AD8003 drive at the output. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). PD = Quiescent Power + (Total Drive Power Load Power)

1.0

0.5
05721-037

55

35

15 5 25 45 65 85 AMBIENT TEMPERATURE (C)

105

125

Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board

ESD CAUTION

V V PD = (VS I S ) + S OUT 2 RL

VOUT 2 RL

Rev. B | Page 5 of 16

AD8003 TYPICAL PERFORMANCE CHARACTERISTICS

3
NORMALIZED CLOSED-LOOP GAIN (dB)
NORMALIZED CLOSED-LOOP GAIN (dB)

2 1 0 1 2 3 4 5 6 7 1

VS = 5V RF = 464 RL = 150 VOUT = 200mV p-p

3 2 1 0 1 2

VS = 5V G = +1, RF = 432 G = +2, +10, RF = 464 RL = 150 VOUT = 200mV p-p

G = +2 G = +1

G = +10

G = 1

3 4 5 6 7 1 10 100 FREQUENCY (MHz) 1000

05721-003

10

100

1000

FREQUENCY (MHz)

05721-002

G = 2

Figure 4. Small Signal Frequency Response for Various Gains

3
NORMALIZED CLOSED-LOOP GAIN (dB)

Figure 7. Small Signal Frequency Response for Various Gains

3
NORMALIZED CLOSED-LOOP GAIN (dB)

2 1 0 1 2 3 4 5 6 7 1

G = +2 RL = 150 VOUT = 200mV p-p

2 1 0 1 2 3 4 5 6 7 1

G = +2 VS = 5V RL = 150 VOUT = 200mV p-p

T = +105C

VS = 5V

VS = +5V
05721-004

T = +25C
05721-005

T = 40C

10

100 FREQUENCY (MHz)

1000

10

100 FREQUENCY (MHz)

1000

Figure 5. Small Signal Frequency Response for Various Supplies

3
NORMALIZED CLOSED-LOOP GAIN (dB)

Figure 8. Small Signal Frequency Response for Various Temperatures

3
NORMALIZED CLOSED-LOOP GAIN (dB)

2 1 0 1 2 3 4 5

G = +2 VS = 5V RL = 150 VOUT = 200mV p-p

2 1 0 1 2 3 4 5 6 7 1

RF = 392

RF = 357

G = +2 VS = 5V RL = 150 VOUT = 2V p-p

RF = 392

RF = 357

RF = 432 RF = 464

RF = 432 RF = 464

05721-007

6 7 1 10 100 FREQUENCY (MHz) 1000

10

100 FREQUENCY (MHz)

1000

Figure 6. Small Signal Feedback Resistor (RF) Optimization

Figure 9. Large Signal Feedback Resistor (RF) Optimization

Rev. B | Page 6 of 16

05721-008

AD8003
6
NORMALIZED CLOSED-LOOP GAIN (dB)
NORMALIZED CLOSED-LOOP GAIN (dB)

G = +1 VS = 5V RL = 150 3 VOUT = 200mV p-p

0.3

RS = 0
RS = 25

G = +2 0.2 RL = 150 VOUT = 2V p-p 0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 10 100 FREQUENCY (MHz)
VS = 5V

VS = +5V

0 RS = 50 3

9
05721-006

12

10

100 FREQUENCY (MHz)

1000

10000

1000

Figure 10. G = +1 Series Resistor (RS) Optimization

3
NORMALIZED CLOSED-LOOP GAIN (dB)
3

Figure 13. 0.1 dB Flatness Response

G = +1 G = +2

NORMALIZED CLOSED-LOOP GAIN (dB)

VS = 5V 2 G = +1, RF = 432 G = +2, +5, RF = 464 RL = 150 1 VOUT = 2V p-p 0 1 2 3 4 5

2 1 0 1 2 3 4 5 6 7 1

VS = 5V G = +2 RL = 150 VOUT = 2V p-p

T = +105C T = 40C T = +25C

G = +5

05721-009

6 7 1 10 100 FREQUENCY (MHz) 1000

10

100 FREQUENCY (MHz)

1000

Figure 11. Large Signal Frequency Response for Various Gains

30

Figure 14. Large Signal Frequency Response for Various Temperatures

30

G = +1 R = 100 40 V L = 2V p-p OUT 50

DISTORTION (dBc)

VS = 5V VS = +5V

G = +2 R = 150 40 V L = 2V p-p OUT 50

VS = 5V VS = +5V

60 SECOND 70 80 90 THIRD

DISTORTION (dBc)

60 70 80 90 THIRD SECOND

100
05721-017

100 110 120 0.1

120 0.1

1 10 FREQUENCY (MHz)

100

1 10 FREQUENCY (MHz)

100

Figure 12. Harmonic Distortion vs. Frequency for Various Supplies

Figure 15. Harmonic Distortion vs. Frequency for Various Supplies

Rev. B | Page 7 of 16

05721-018

110

05721-010

05721-016

AD8003
10 G = +2 VOUT = 2V p-p 20 f = 5MHz C 30
DISTORTION (dBc)

VS = 5V VS = +5V

0.20 0.15 0.10

VS = +5V VS = 5V

G = +2 RL = 150 VOUT = 200mV p-p

2.70 2.65 2.60 2.55 2.50 2.45 2.40 2.35

05721-011

OUTPUT VOLTAGE (V)

SECOND 40 50 60 THIRD 70
05721-019

0.05 0 0.05 0.10 0.15 0.20

80 90

10

12

14

16

18

20 RL ()

22

24

26

28

30

7 8 9 TIME (ns)

10 11 12 13 14 15

2.30

Figure 16. Harmonic Distortion vs. RL

2.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0
05721-012

Figure 19. Small Signal Pulse Response for Various Supplies

0.3

G = +2 RL = 150 1.5 VOUT = 2V p-p 1.0 0.5 0 0.5 1.0 1.5 2.0

VS = +5V VS = 5V

0.2

OUTPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

OUTPUT VOLTAGE (V)

0.1 CL = 15pF 0 CL = 0pF

0.1 G = +2 RL = 150 VS = 5V VOUT = 200mV p-p 0 5 10

0.2

7 8 9 TIME (ns)

0.5 10 11 12 13 14 15

0.3

15 20 TIME (ns)

25

30

35

Figure 17. Large Signal Pulse Response for Various Supplies

2.8

Figure 20. Small Signal Pulse Response for Various Capacitive Loads
1.5 0.3

2.7

1.0

G = +2 VS = 5V RL = 150

VOUT

VIN

0.2

OUTPUT VOLTAGE (V)

AMPLITUDE (V)

2.5 CL = 0pF 2.4 G = +2 RL = 150 VS = 5V VOUT = 200mV p-p 0 5 10

CL = 15pF

0 VSETTLE

0.5

0.1

2.3

05721-022

CL = 27pF

1.0

0.2

15 20 TIME (ns)

25

30

35

10

15

20 25 TIME (ns)

30

35

40

45

Figure 18. Small Signal Pulse Response for Various Capacitive Loads

Figure 21. Short-Term 0.1% Settling Time

Rev. B | Page 8 of 16

05721-021

2.2

1.5

0.3

SETTLING (%)

2.6

0.5

0.1

05721-020

CL = 27pF

OUTPUT VOLTAGE (V)

AD8003
6000 G = +2 RL = 150

VS = 5V

RISE FALL

5 4 3 OUTPUT 2

INPUT

5000

G = +1 VS = 5V RL = 150

SLEW RATE (V/s)

AMPLITUDE (V)

4000

1 0 1 2 3

3000

2000

VS = +5V

1000
05721-013

4 5 0 0.1 0.2 0.3 0.4 0.5 0.6 TIME (s) 0.7 0.8 0.9

3 4 VOUT p-p (V)

1.0

Figure 22. Slew Rate vs. Output Voltage

5 4 3 OUTPUT 2 1 0 1 2 3 4 5 0 0.1 0.2 0.3 0.4 0.5 0.6 TIME (s) 0.7 0.8 0.9
05721-024

Figure 25. Input Overdrive Recovery

1000

INPUT 2

G = +2 VS = 5V RL = 150

G = +1/+2 VS = 5V

100

IMPEDANCE ()

AMPLITUDE (V)

10

1
05721-027

1.0

0.1 0.1

10 FREQUENCY (MHz)

100

1000

Figure 23. Output Overdrive Recovery

0 0 10 20 30

Figure 26. Output Impedance vs. Frequency

20

30

POWER SUPPLY REJECTION (dB)

COMMON-MODE REJECTION (dB)

10

G=0 VS = 5V RL = 150

G = +2 VS = 5V RL = 150

PSR 40 50 PSR+
05721-025

40

50
05721-026

60 70 0.1

60 0.1

1 10 FREQUENCY (MHz)

100

10 FREQUENCY (MHz)

100

1000

Figure 24. Common-Mode Rejection vs. Frequency

Figure 27. Power Supply Rejection vs. Frequency

Rev. B | Page 9 of 16

05721-023

AD8003
80 60 VS = 5V 40 VS = +5V

20 15 10 5 VS = 5V VS = +5V

VOS (mV)

IB (A)
05721-031

20 0 20 40 60 5

0 5 10
05721-032

15 20 5

0 VCM (V)

0 VCM (V)

Figure 28. Offset Voltage vs. Input Common-Mode Range

10 8 6 4 2 VS = 5V VS = +5V

Figure 31. Noninverting Input Bias Current vs. Common-Mode Range

VDIS (VS = 5V)

5

G = +2 RL = 150 VIN = 0.5V dc

0 2 4 6 8 10 5 4 3 2 1 0 VOUT (V) 1 2 3 4 5
05721-033

AMPLITUDE (V)

IB (A)

VDIS (VS = +5V)

VOUT (VS = +5V) VOUT (VS = 5V) VOUT (VS = +5V)

05721-014

VOUT (VS = 5V)

0 0 0.1 0.2 0.3 0.4 0.5 0.6 TIME (s) 0.7 0.8 0.9

1.0

Figure 29. Inverting Input Bias Current Linearity

10 9 G = +2 RL = 150 VS = 5V 200 150
10 9

Figure 32. Disable Switching Time for Various Supplies

G = +2 RL = 150 VS = 5V 40 30 20

POSITIVE SUPPLY CURRENT (mA)

POWER DOWN PIN CURRENT (A)

POSITIVE SUPPLY CURRENT (mA)

8 7 6 5 4 3 2 1 0 5 4 3 2 1 0 1 2 3 POWER DOWN PIN VOLTAGE (VDIS (V)) 4 5

100 50

8 7 6 5 4 3 2 1

IDIS

0 50 100 150

ICC

IDIS

10 0 10 20 30 40 50

ICC

200 250

05721-028

0.5

1.0 1.5 2.0 2.5 3.0 3.5 4.0 POWER DOWN PIN VOLTAGE (VDIS (V))

4.5

5.0

Figure 30. POWER DOWN Pin Current and Supply Current vs. POWER DOWN Pin Voltage

Figure 33. POWER DOWN Pin Current and Supply Current vs. POWER DOWN Pin Voltage

Rev. B | Page 10 of 16

05721-029

300

60

POWER DOWN PIN CURRENT (A)

AD8003
1000 VS = 5V RF = 1k
INPUT CURRENT NOISE (pA/Hz) 10000 VS = 5V

INPUT VOLTAGE NOISE (nV/Hz)

1000

100

100 I

10

10
05721-035

I+

05721-034

1 10

100

1k

10k

100k

1M

10M

1 10

100

1k

10k

100k

1M

10M

FREQUENCY (Hz)

FREQUENCY (Hz)

Figure 34. Input Voltage Noise vs. Frequency

1M

Figure 36. Input Current Noise vs. Frequency

200 180 160 100k 140 120 10k 100 80 60 1k 40
05721-015 05721-030

NORMALIZED CLOSED-LOOP GAIN (dB)

G = +2 RL = 150 10 DRIVING: CH1 AND CH3 RECEIVING: CH2 20 30 40 50 60 70 80 90 1 10 FREQUENCY (MHz) 100

VS = 5V

VS = +5V

20 100 1k 10k 100k 1M 10M 100M 1G 0

100 0.1

1000

FREQUENCY (Hz)

Figure 35. Worst-Case Crosstalk

Figure 37. Transimpedance

Rev. B | Page 11 of 16

PHASE (Degrees)

MAGNITUDE ()

AD8003 APPLICATIONS INFORMATION

GAIN CONFIGURATIONS
Unlike conventional voltage feedback amplifiers, the feedback resistor has a direct impact on the closed-loop bandwidth and stability of the current feedback op amp circuit. Reducing the resistance below the recommended value can make the amplifier response peak and can even become unstable. Increasing the size of the feedback resistor reduces the closed-loop bandwidth. Table 5 provides a convenient reference for quickly determining the feedback and gain set resistor values, and the small and large signal bandwidths for common gain configurations. The feedback resistors in Table 5 have been optimized for 0.1 dB flatness frequency response. Table 5. Recommended Values and Frequency Response1
3 dB SS BW (MHz) 734 1650 761 567 446 Large Signal 3 dB BW 668 822 730 558 422 Large Signal 0.1 dB BW --190 165 170

RGB VIDEO DRIVER

Figure 40 shows a typical RGB driver application using bipolar supplies. The gain of the amplifier is set at +2, where RF = RG = 464 . The amplifier inputs are terminated with shunt 75 resistors, and the outputs have series 75 resistors for proper video matching. In Figure 40, the POWER DOWN pins are not shown connected to any signal source for simplicity. If the powerdown function is not used, it is recommended that the POWER DOWN pins be tied to the positive supply and not be left floating (not connected). In applications that require a fixed gain of +2, as previously mentioned, the designer may consider the ADA4862-3. The ADA4862-3 is another high performance triple current feedback amplifier. The ADA4862-3 has integrated feedback and gain set resistors that reduce board area and simplify designs.
PD3 PD2 PD1
5 23 14 1

Gain 1 +1 +2 +5 +10
1

RF () 300 432 464 300 300

RG () 300 N/A 464 75 33.2

RS () 0 24.9 0 0 0

+VS 10F 0.1F

RIN 75

RG 464 RF 464

75 VS 10F
6

ROUT

Conditions: VS = 5 V, TA = 25C, RL = 150 .

Figure 38 and Figure 39 show the typical noninverting and inverting configurations and recommended bypass capacitor values.
+VS 10F RF RG RS FB 0.1F +V VO VO RL

0.1F
2

+VS 10F

AD8003
GIN 75 RG 464 RF 464
21 22

19

0.1F 75 VS 10F
24

GOUT

AD8003
+ V 0.1F

VIN

0.1F
20

10F

+VS 10F
05721-038

VS

18

0.1F BIN 75 RG 464 RF 464

16 15

Figure 38. Noninverting Gain

+VS 10F RF FB 0.1F +V VO VO RL

75 VS 10F
13

BOUT

VIN

RG

17

AD8003
+ V 0.1F

Figure 40. RGB Video Driver

10F
05721-039

VS

Figure 39. Inverting Gain

Rev. B | Page 12 of 16

05721-036

0.1F

AD8003 PRINTED CIRCUIT BOARD LAYOUT

Printed circuit board (PCB) layout is usually one of the last steps in the design process and often proves to be one of the most critical. A high performance design can be rendered mediocre due to poor or sloppy layout. Because the AD8003 can operate into the RF frequency spectrum, high frequency board layout considerations must be taken into account. The PCB layout, signal routing, power supply bypassing, and grounding must all be addressed to ensure optimal performance.

POWER SUPPLY BYPASSING

Power supply bypassing is a critical aspect of the PCB design process. For best performance, the AD8003 power supply pins need to be properly bypassed. Each amplifier has its own supply pins brought out for the utmost flexibility. Supply pins can be commoned together or routed to a dedicated power plane. Commoned supply connections can also reduce the need for bypass capacitors on each supply line. The exact number and values of the bypass capacitors are dictated by the design specifications of the actual circuit. A parallel combination of different value capacitors from each of the power supply pins to ground tends to work the best. Paralleling different values and sizes of capacitors helps to ensure that the power supply pins see a low ac impedance across a wide band of frequencies. This is important for minimizing the coupling of noise into the amplifier. Starting directly at the power supply pins, the smallest value and physical-sized component should be placed on the same side of the board as the amplifier, and as close as possible to the amplifier, and connected to the ground plane. This process should be repeated for the next largest capacitor value. It is recommended that a 0.1 F ceramic 0508 case be used for the AD8003. The 0508 offers low series inductance and excellent high frequency performance. The 0.1 F case provides low impedance at high frequencies. A 10 F electrolytic capacitor should be placed in parallel with the 0.1 F. The 10 F capacitor provides low ac impedance at low frequencies. Smaller values of electrolytic capacitors can be used depending on the circuit requirements. Additional smaller value capacitors help provide a low impedance path for unwanted noise out to higher frequencies but are not always necessary. Placement of the capacitor returns (grounds), where the capacitors enter into the ground plane, is also important. Returning the capacitor grounds close to the amplifier load is critical for distortion performance. Keeping the capacitors distance short, but equal from the load, is optimal for performance. In some cases, bypassing between the two supplies can help improve PSRR and maintain distortion performance in crowded or difficult layouts. Designers should note this as another option for improving performance.

LOW DISTORTION PINOUT

The AD8003 LFCSP features ADIs low distortion pinout. The pinout lowers the second harmonic distortion and simplifies the circuit layout. The close proximity of the noninverting input and the negative supply pin creates a source of second harmonic distortion. Physical separation of the noninverting input pin and the negative power supply pin reduces this distortion. By providing an additional output pin, the feedback resistor can be connected directly between the feedback pin and the inverting input. This greatly simplifies the routing of the feedback resistor and allows a more compact circuit layout, which reduces its size and helps to minimize parasitics and increase stability.

SIGNAL ROUTING
To minimize parasitic inductances, ground planes should be used under high frequency signal traces. However, the ground plane should be removed from under the input and output pins to minimize the formation of parasitic capacitors, which degrades phase margin. Signals that are susceptible to noise pickup should be run on the internal layers of the PCB, which can provide maximum shielding.

EXPOSED PADDLE
The AD8003 features an exposed paddle, which lowers the thermal resistance by approximately 40% compared to a standard SOIC plastic package. The paddle can be soldered directly to the ground plane of the board. Thermal vias or heat pipes can also be incorporated into the design of the mounting pad for the exposed paddle. These additional vias improve the thermal transfer from the package to the PCB. Using a heavier weight copper also reduces the overall thermal resistance path to ground.

Rev. B | Page 13 of 16

AD8003
Minimizing the trace length and widening the trace from the capacitors to the amplifier reduces the trace inductance. A series inductance with the parallel capacitance can form a tank circuit, which can introduce high frequency ringing at the output. This additional inductance can also contribute to increased distortion due to high frequency compression at the output. The use of vias should be minimized in the direct path to the amplifier power supply pins because vias can introduce parasitic inductance, which can lead to instability. When required, use multiple large diameter vias because this lowers the equivalent parasitic inductance.

GROUNDING
The use of ground and power planes is encouraged as a method of proving low impedance returns for power supply and signal currents. Ground and power planes can also help to reduce stray trace inductance and provide a low thermal path for the amplifier. Ground and power planes should not be used under any of the pins of the AD8003. The mounting pads and the ground or power planes can form a parasitic capacitance at the amplifiers input. Stray capacitance on the inverting input and the feedback resistor form a pole, which degrades the phase margin, leading to instability. Excessive stray capacitance on the output also forms a pole, which degrades phase margin.

Rev. B | Page 14 of 16

AD8003 OUTLINE DIMENSIONS

4.00 BSC SQ 0.60 MAX 0.60 MAX 0.50 BSC 0.50 0.40 0.30 1.00 0.85 0.80 12 MAX 0.80 MAX 0.65 TYP
19 18 EXPOSED PAD
(BOTTOM VIEW)

PIN 1 INDICATOR
24 1

PIN 1 INDICATOR

TOP VIEW

3.75 BSC SQ

2.25 2.10 SQ 1.95

7 6

13 12

0.25 MIN 2.50 REF

0.05 MAX 0.02 NOM 0.20 REF COPLANARITY 0.08

SEATING PLANE

0.30 0.23 0.18

COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2

Figure 41. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm 4 mm Body, Very Thin Quad (CP-24-1) Dimensions shown in millimeters

ORDERING GUIDE
Model AD8003ACPZ-R2 1 AD8003ACPZ-REEL1 AD8003ACPZ-REEL71 EVAL-AD8003-3CPEZ1
1

Temperature Range 40C to +85C 40C to +85C 40C to +85C

Package Description 24-Lead LFCSP_VQ 24-Lead LFCSP_VQ 24-Lead LFCSP_VQ Evaluation Board

Package Option CP-24-1 CP-24-1 CP-24-1

Ordering Quantity 250 5,000 1,500

Z = RoHS Compliant Part.

Rev. B | Page 15 of 16

AD8003 NOTES

20052008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05721-0-9/08(B)

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