Electronics Laboratory C

ESE 324

Lecture 1

Emre Salman
Stony Brook University

1) Lecture: Thursdays 3:50 to 4:45 PM (Melville W4525)
2) L01: Tuesdays 5:20 pm to 8:20 pm (283 Light Engineering)
3) L02: Mondays 6:55 pm to 9:55 pm (283 Light Engineering)
4) We will use Blackboard https://blackboard.stonybrook.edu/
Visit frequently for updates and announcements
5) Prerequisites: ESE 211 and ESE 372
ESE 314 is highly helpful

General Information

1) Textbooks:
- Microelectronic Circuits by A. S. Sedra and K. C. Smith (required)

Handouts may be distributed during the class or on Blackboard

2) Grading:
- Lab work/reports: 45% Midterm: 20% Final: 30% Portfolio: 5%
- There may be unannounced 1-2 question quizzes at the beginning
of a lecture

3) Office Hours:

- Tuesdays, 10:00 am -12:00 pm and Thursdays, 4:50 pm - 6:50 pm
- Light Engineering Building RM 257


General Information

1) Teaching Assistants: Check Blackboard for office hours
- Peirong Ji
- Yunlong Wang
- Oong Lee
- Dongsoo Choung
2) Lab Sessions:
- No labs in the first two weeks
- First lab will be on the 6
th
and 7
th
of February
- Select a partner in the first laboratory session and let the TA know
- No more than two students per group are permitted
- Obtained data should be approved by the TA before leaving the lab
- Report of a current lab session must be submitted to the TA during the
following lab session at the latest
- Every student should submit a report (repot guidelines will be posted)
- Reports of two students in the same group can only share the common
data
- If you did not take ESE 314 yet, you should see Tony (283 Light Eng.) to
get your kit after class today


General Information
Illustrates and expands upon advanced concepts presented in
ESE 372. Experiments include analog circuits such as oscillators
and voltage regulators; mixed-signal circuits such as analog to
digital and digital to analog data converters and phase-locked
loops, and several experiments emphasizing the analog design
issues in digital circuits such as transmission gates, registers, and
dynamic logic. Weekly lectures cover the minimum required theory
for these experiments..

- A mix of analog, digital, and mixed-signal circuits
- Emphasis is on learning analog way of thinking
- Very exciting and extremely useful circuits

Summary of Class Topics
Tentative Laboratory Experiments
Date Experiment
February 6, 7 Transmission gate design and characterization
February 13, 14 Phase detector design and characterization
February 20, March 21 Register design and characterization (possibly
two lab sessions)
March 5, 6 Design of a variable duty cycle oscillator
March 15 (Thursday) Midterm, no labs
March 19, 20 Design of a DC-DC switching converter
March 26, 27 Design of an A/D and D/A converter (possibly
two lab sessions)
April 2, 8 Spring break
April 16, 17 Design of a phase-locked loop (possibly two lab
sessions)
April 30, May 1 Make up lab
May 8 15 Finals
Analog versus Digital
This distinction is rather old fashioned
High Speed Digital Design Analog Design ~
Distinction between analog and digital is now blurry
Eye Diagram
What is Analog Way of Thinking?
Digital
A = 0, B = 0, out = 1
A = 0, B = 1, out = 1
A = 1, B = 0, out = 1
A = 1, B = 1, out = 0
Analog
- What is the propagation delay
from A to out?
- Is the delay the same from B to
out?
- Are low-to-high and high-to-
low delays the same?
- Does the circuit work under a
noisy environment?
- What is the noise margin?
- Do we have any leakage
current?

Mixed-Signal Circuits
- Has both analog and digital circuits within the same
system
- Data converters: ADC and DAC
- A signal sensed from the environment is naturally in analog
form
- For digital processing, an ADC is required to convert the
continuous signal into digital domain
- DAC converts the digital code to an analog signal
- Required to play digital audio (mp3, CD) through a speaker
- Phase locked loops
- Used to synthesize the clock signal: hearth of any
synchronous system
- Both of these circuits are widely used in almost any
electronic system
- Highly critical for the overall performance
- Very useful to learn for industrial job positions


Review of MOS Transistors
Logic Gates and Circuit Families
Logic gates and analog blocks
- AND, OR, INV, diff amplifier, current mirror
Circuit families

- TTL: Transistor-transistor logic
- ECL: Emitter coupled logic
- MOS: Metal oxide semiconductor
- CMOS: Complementary metal oxide semiconductor
- BiCMOS: Bipolar complementary metal oxide semiconductor
CMOS Market Share
CMOS Properties
Low power dissipation since static current consumption is minimized

High noise margins due to full rail-to-rail swing

Low output impedance

Very high input resistance (minimum input current)

Logic level not dependent on transistor sizes

MOS Transistor
MOS: Metal-Oxide-Semiconductor
N-MOS
Channel is n-type
Semiconductor is doped by holes
P-MOS
Channel is p-type
Semiconductor is doped by electrons
Gate

Source

Drain

Channel
(n- type)

p-type

Gate
Drain
Source
Gate

Source

Drain

Channel
(p- type)

n-type

Gate
Source
Drain
Bulk Bulk
NMOS Transistor
NMOS Transistor Cross-section
MOS: Minority carrier based transport
BJT: Majority carrier based transport
CMOS Technology
Terminal Voltages
Gate
Drain
Source
V
GS
V
DS
V
TH
Threshold voltage of the transistor

Gate to source voltage has to be greater than
threshold voltage for the inversion layer to form

Bulk
V
BS
Operation of a MOS Transistor
Cut off

Operation of a MOS Transistor
Operation of a MOS Transistor
Linear or triode region

Operation of a MOS Transistor
Saturation region
I
DS
remains approximately constant

Three Regions of Operation
I
DS
linear
V
DS
saturation
Increasing V
GS
V
GS
- V
TH
= V
DS

1) Cutoff V
GS
< V
TH
2) Linear
3) Saturation

MOS Transistor


Three regions of operation


1) Cutoff: V
GS
< V
TH

Just S/D leakage
I
DS
~ 0

2) Linear: weak inversion V
DS
V
GS
- V
TH

I
DS
current flow increases linearly with V
DS


3) Saturation: strong inversion V
DS
V
GS
V
TH

I
DS
is weakly dependent on V
DS



( ) | |
2
ox
2
L
W
2
C
) (
DS DS TH GS
V V V V lin = I

DS
operation linear Good
I
DS
linear
V
DS
saturation
V
GS
- V
TH
= V
DS

) 1 (
2
C
) (
ox
DS
2
TH GS DS
V ) V (V I

+ =
L
W
sat
Definitions
Intrinsic transconductance
Channel Length Modulation



= channel length modulation parameter



Not very important in digital circuits but very important in analog MOS


0.01to0.1
1
volts
) 1 (
2
C
) (
ox
DS
2
TH GS DS
V ) V (V I

+ =
L
W
sat
I
DS
linear
V
DS
saturation
V
GS
- V
TH
= V
DS

Summary: Voltage-Current Equations
I
DS
~ 0
N-MOS P-MOS
V
GS
< V
TH
V
GS
> V
TH
( ) | |
2
ox
2
L
W
2
C
) (
DS DS TH GS
V V V V lin = I

DS
V
DS
V
GS
- V
TH
V
DS
V
GS
- V
TH

) 1 (
2
C
) (
ox
DS
2
TH GS DS
V ) V (V I

+ =
L
W
sat
V
DS
V
GS
- V
TH

V
DS
V
GS
- V
TH

V
GS
V
TH
V
GS
V
TH
V
GS
V
TH
V
GS
V
TH
device) a for (constant
L
W
C
ox
= K