Bibliography _______________________________________________________________________________

[1]

G.D. Wilk, R.M. Wallace, J.M. Anthony, High-k gate dielectrics: current status and materials properties considerations, Journal of Applied Physics, Vol. 89 No. 10, pag. 5243-5275, (2001)

[2]
[3]

The International Technology Roadmap of Semiconductors http://www.itrs.net/Links/2009ITRS/Home2009.htm

ITRS

2009

A.A. Demkov, O.F. Sankey, Growth Study and Theoretical Investigation of the Ultrathin Oxide SiO2-Si Heterojunction, Physical Review Letters, Vol. 83 No. 10, pp. 2038-2041, (1999) Y.C. Yeo, T.J. King, C. Hu, MOSFET Gate Leakage Modeling and Selection Guide for Alternative Gate Dielectrics Based on Leakage Considerations, IEEE Transaction on Electron Devices, Vol. 50 No. 4, pp.1027-1035, 2003 K.A. Ellis, R. A. Buhrman, Time-dependent diffusivity of boron in silicon oxide and oxynitride, Applied Physics Letters, Vol.74 No. 7, pag.967-971, (1999) H. Yang, G. Lucovsky, Integration of Ultrathin (1.6~2.0 nm) RPECVD oxynitride gate dielectrics into dual poly-Si gate submicron CMOS-FET, IEEE IEDM 1999, pp. 245-248, (1999) F. Chirico, F. Della Sala, A. Di Carlo, P. Lugli, Quantum effects in nanometer MOS structures, Physica B: Condensed Matter, Vol.272 No. 1-4, pp. 546-549 (1999) J. Robertson, High dielectric constant oxides, Journal of Applied Physics, Vol. 95 No. 1, pp.265-291 (2004) H-W. Chen, T-Y. Huang, D. Landheer, X. Wu, S. Moisa, G.I. Sproule, T-S Chao, Physical and electrical characterization of ZrO2 gate insulators deposited on Si(110) using Zr(OiPr)2(thd)2 and O2, Journal of Electrochemical Society, Vol. 149 No.6, pp. F49-F55, (2002)

[4]

[5]
[6]

[7] [8] [9]

[10] J.P. Chang, Y-S. Lin, Ultra-thin zirconium oxide films deposited by rapid thermal chemical vapour deposition (RT-CVD) as alternative gate dielectric, Proceeding of the Gate Stack and Silicide Issues in Si Processing II Symposium, Vol. 670, pp. K1-k44, Materials Research Society (2001) [11] H. Yamada, T. Shimizu, E. Suzuki, Interface reaction of a silicon substrate and lanthanum oxide films deposited my metalorganic chemical vapour deposition, Japanese Journal of Applied Physics, Vol.41 No.4A, pp.L368-L370, (2002) [12] J. Robertson, Band offsets of wide-band-gap oxides and implications for future electronic deives, Journal of Vacuum Science and Technology B, Vol. 18 No. 3, pp. 1785-1792, (2000) [13] J. Robertson, B. Falabretti, Band offsets of high K gate oxides on III-V semiconductors, Journal of Applied Physics, Vol. 100, pp. 014111, (2006)

251

Bibliography _______________________________________________________________________________ [14] M. Lannoo and J. N. Dccarpigny, Simple Tight-Binding Calculation of the Transverse Effective Charges in III-V, II-VI, and IV-IV Compound Semiconductors, Physical Review B, Vol. 8 No 12, pp. 5704-5710, (1973) [15] P. Perlin, T. Suski, J. W. Ager, G. Conti, A. Polian, N. E. Christensen, I. Gorczyca, I. Grzegory, E. R. Weber, E. E. Haller, Transverse effective charge and its pressure dependence in GaN single crystals, Physical Review B., Vol. 60 No. 3, pp. 1480-1483, (1999) [16] G. Puzzilli, Innovative Concepts for Flash Memory Devices, Ph.D. dissertations, 2007 [17] S. Stemmer, Y. Li, B. Foran, P.S. Lysaght, S.K. Streiffer, P. Fuoss, S. Seifert, Grazingincidence small angle x-ray scattering studies of phase separation in hafnium silicate lms, Applied Physics Letters, Vol.83 No.15, pp.3141-3143, (2003) [18] L.A. Ragnarsson, Z. Li, J. Tseng1, T. Schram, E. Rohr, M. J. Cho, T. Kauerauf, T. Conard, Y. Okuno2, B. Parvais, P. Absil, S. Biesemans, T.Y. Hoffmann, "Ultralow-EOT (5 ) GateFirst and Gate-Last High Performance CMOS Achieved by Gate-Electrode Optimization", IEEE IEDM 2009, pp. 663-666, 2009. [19] F.Arnaud, J.Liu, Y.M.Lee, K.Y.Lim, S.Kohler, J.Chen, B.K.Moon, C.W. Lai, M.Lipinski, L.Sang, F.Guarin, C.Hobbs, P.Ferreira, K.Ohuchi, J.Li, H.Zhuang, P.Mora, Q. Zhang, D.R.Nair, D.H. Lee, K.K.Chan, S.Satadru, S.Yang, J.Koshy, W.Hayter, M.Zaleski, D.V.Coolbaugh, H.W.Kim, Y.C. Ee, J.Sudijono, A.Thean, M.Sherony, S.Samavedam, M.Khare, C.Goldberg, A.Steegen, "32nm General Purpose Bulk CMOS Technology for High Performance Applications at Low Voltage", IEEE IEDM 2008, pp. 633-636, 2008 [20] T. Tomimatsu, Y. Goto, H. Kato, M. Amma, M. Igarashi, Y. Kusakabe, M. Takeuchi, S.Ohbayashi, S.Sakashita, T. Kawahara, M. Mizutani, M. Inoue, M. Sawada, Y. Kawasaki, S. Yamanari, Y. Miyagawa, Y. Takeshima, Y. Yamamoto, S. Endo, T. Hayashi, Y. Nishida, K. Horita, T. Yamashita, H. Oda, K. Tsukamoto, Y. Inoue, H. Fujimoto, Y. Sato, K. Yamashita, R. Mitsuhashi, S. Matsuyama, Y. Moriyama, K. Nakanishi, T. Noda, Y. Sahara, N. Koike, J. Hirase, T. Yamada, H. Ogawa, M. Ogura, "Cost-effective 28nm LSTP CMOS Using Gate-First Metal Gate/High-k Technology", IEEE VLSI Tech. Dig., pp. 36-37, 2009. [21] K. Choi, H. Jagannathan, C. Choi, L. Edge, T. Ando, M. Frank, P. Jamison, M. Wang, E. Cartier, S. Zafar, J. Bruley, A. Kerber, B. Linder, A. Callegari, Q. Yang, S. Brown, J. Stathis, J. Iacoponi, V. Paruchuri, V. Narayanan, "Extremely Scaled Gate-First High-k/Metal Gate Stack with EOT of 0.55nm Using Novel Interfacial Layer Scavenging Techniques for 22nm Technology Node and Beyond", IEEE VLSI Tech. Dig., pp. 138-139, 2009. [22] S. Stemmer, Y. Li, B. Foran, S. Lysaght, S.K. Streiffer, P. Fuoss, S. Seifert, A. Baldereschi, S. Baroni, R. Resta, Band offsets in Lattice-Matched Heterojunctions: A Model and FirstPrinciples Calculatins for GaAs/AlAs, Physical Review Letters, Vol. 61 No. 6, pp. 734-737, (1988) [23] C. G. Van de Walle, Band lineups and deformation potentials in the model-solid theory, Physical Review B., Vol. 39 No. 3, pp. 1871-1883, (1989) [24] R. T. Tung, Chemical Bonding and Fermi Level Pinning at Metal-Semiconductor Interfaces, Physical Review Letters, Vol. 84 No 26, pp. 6078-6081, (2000)

252

Bibliography _______________________________________________________________________________ [25] W. Mnch, Role of Virtual Gap States and Defects in Metal-Semiconductor Contacts, Physical Review Letters, Vol. 58 No 12, pp. 1260-1263, (1987) [26] J. Tersoff, Theory of semiconductor heterojunctions: The role of quantum dipoles, Physical Review B., Vol. 30 No. 8, pp. 4874-4877, (1984) [27] J. Tersoff, Schottky barriers and semiconductor band structures, Physical Review B., Vol. 32 No. 10, pp. 6968-6971, (1985). [28] V. Narayanan, S. Guha, M. Copel, N. A. Bojarczuk, P. L. Flaitz, M. Gribelvuk, Intefacial oxide formation and oxygen diffusion in rare eart oxide-silicon epitaxial heterostructures, Applied Physic Letters, Vol. 81 No. 22, pp. 4183-4187, (2002) [29] M. Kiguchi, K. Saiki, Metal-induced gap states at insulator/metal interfaces, e-Journal of Surface Science and Nanotechnology, Vol. 2, pp. 191-199, (2004) [30] V. Narayanan, S. Guha, M. Copel, N.A. Bojarczuk, P.L. Flaitz, M. Gribelyuk, Interfacial oxide formation and oxygen diffusion in rare earth oxidesilicon epitaxial heterostructures, Applied Physics Letters, Vol. 81 No. 22, pp.4183-4185, (2002) [31] G. Lucovsky, Transition from thermally grown gate dielectrics to deposited gate dielectrics for advanced silicon devices: A classification scheme based on bond iconicity, Journal of Vacuum Science and Technology A, Vol. 19 No.4, pp. 1553-1561, (2001) [32] L. Pauling, The nature of the chemical bond, 3rd ed. (Cornell University, Ithaca, NY, 1948) [33] M. V. Fischetti, D. A. Neumayer, E. A. Cartier, Effective electron mobility in Si inversion layers in metal-oxide-semiconductor systems with a high-k insulator: The role of remote phonon scattering, Journal of Applied Physics, Vol. 90 No. 9, pp. 4587-4608, (2001) [34] S. Takagi, A. Toriumi, M. Iwase, H. Tango, On the Universality of Inversion Layer Mobility in Si MOSFETs: Part I-Effects of Subtrate Impurity Concentration, IEEE Transactions on Electron Devices, Vol. 41 No. 12, pp. 2357-2362, (1994) [35] C. C. Hobbs, L. R. C. Fonseca, A. Knizhnik, V. Dhandapani, S. B. Samavedam, W. J. Taylor, J. M. Grant, Fermi-Level Pinning at the polysilicon/Metal Oxide Interface-Part II, IEEE Transactions on Electron Devices, Vol.51 No. 6, pp. 978-984, (2004) [36] R. Chau, S. Datta, M. Doczy, B. Doyle, J. Kavalieros, M. Metz, High-k/Metal-Gate and its MOSFET Characteristics, IEEE Electron Device Letters, Vol. 25 No. 6, pp. 408-411, (2004) [37] A. Lelis, T. Oldham, H. Boesch, and F. McLean, The nature of the trapped hole annealing process, IEEE Transactions on Nuclear Science, Vol. 36 No. 6, pp. 18081815, (1989). [38] A. Lelis, and T. Oldham, Time dependence of switching oxide traps, IEEE Transactions on Nuclear Science, Vol. 41 No. 6, pp. 18351843, (1994) [39] P. Bunson, M. D. Ventra, S. Pantelides, D. Fleetwood, and R. Schrimpf, Hydrogen-related defects in irradiated SiO2, IEEE Transaction on Nuclear Science, Vol. 47 No. 6, pp. 2289 2296, (2000). 253

Bibliography _______________________________________________________________________________ [40] R. V. Ginhoven, H. Hjalmarson, A. Edwards, and B. Tuttle, Hydrogen release in SiO2: Source sites and release mechanisms, Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms, Vol. 250 No.1, pp. 274 278, (2006) [41] V. Afanasev, A. Stesmans, Proton nature of radiation-induced positive charge in SiO2 layers on Si, European Physics Letters, Vol. 53 No. 2, pp. 233239, (2001) [42] J. Conley, and P. Lenahan, Room temperature reactions involving silicon dangling bond centers and molecular hydrogen in amorphous SiO2 thin films on silicon, IEEE Transactions on Nuclear Science, Vol. 39 No. 6, pp. 21862191, (1992) [43] J. Conley, and P. Lenahan, Room temperature reactions involving silicon dangling bond centers and molecular hydrogen in amorphous SiO2 thin films on silicon, Applied Physics Letters, Vol. 62 No.1, pp. 4042, (1993) [44] P. Lenahan, and J. Conley, What can electron paramagnetic resonance tell us about the Si/SiO2 system?, Journal of Vacuum Science and Technology B, Vol. 16 No. 4, pp. 2134 2153, (1998) [45] P. Blochl, J. Stathis, Hydrogen Electrochemistry and Stress-Induced Leakage Current in Silica, Physical Review Letters, Vol. 83 No. 2, pp. 372375, (1999) [46] A. Alkauskas, and A. Pasquarello, Alignment of hydrogen-related defect levels at the Si SiO2 interface, Physica B Condensed Matter, Vol. 401, pp. 546-549, (2007) [47] W. Goes, and T. Grasser, "First-Principles Investigation on Oxide Trapping", IEEE SISPAD 2007, pp. 157160, (2007) [48] W. Goes, and T. Grasser, Charging and Discharging of Oxide Defects in Reliability Issues, IEEE IIRW 2007, pp. 2732, (2007) [49] T. Yang, C. Shen, M.-F. Li, C. Ang, C. Zhu, Y.-C. Yeo, G. Samudra, S. Rustagi, M. Yu, and D.-L. Kwong, Fast DNBTI components in p-MOSFET with SiON dielectric, IEEE Electron Device Letters, Vol. 26 No. 11, pp. 826828, (2005) [50] T. Grasser, B. Kaczer, T. Aichinger, W. Goes, M. Nelhiebel, Defect Creation Stimulated by Thermally Activated Hole Trapping as the Driving Force Behind Negative Bias Temperature Instability in SiO2, SiON, and High-k Gate Stacks, IEEE IIRW 2008, pp. 91-95, 2008 [51] M. Kirton, M. Uren, Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/) noise, Adv.Phys., Vol. 38 No. 4, pp. 367 486, (1989) [52] K. Ralls, W. Skocpol, L. Jackel, R. Howard, L. Fetter, R. Epworth, D. Tennant, Discrete Resistance Switching in Submicrometer Silicon Inversion Layers: Individual Interface Traps and Low-Frequency (1/f) Noise, Physical Review Letters, Vol. 52 No. 2, pp. 228231, (1984) [53] S. Ganichev, W. Prettl, I. Yassievich, Deep impurity-center ionization by far-infrared radiation, Physics of the Solid State Vol. 39 No. 11, pp. 17031726, (1997)

254

Bibliography _______________________________________________________________________________ [54] T.rasser, B. Kaczer, W. Goes, Th. Aichinger, Ph- Hehenberger, M. Nellhiebel, A Two-Stage model for negative bias temperature instability, IEEE IRPS, pp.33-44, (2009) [55] M. Rosmeulen, E. Sleeckxa, K. De Meyer, Electrical Characterisation of Silicon-RichOxide Based Memory Cells Using Pulsed Current-Voltage Techniques, IEEE ESSDERC 2002, pp.471-474, (2002) [56] M.Denais, V.Huard, C.Parthasarathya, G.Ribes, F.Perrier, N.Revil, A.Bravaix, New methodologies of NBTI characterization eliminating recovery effects, IEEE ESSDERC 2004, pp.265-268, (2004) [57] M. Denais, A. Bravaix, V. Huard, C. Parthasarathy, G. Ribes, F. Perrier, Y. Rey-Tauriac, N.Revil, On-the-fly characterization of NBTI in ultra-thin gate oxide PMOSFET's, IEEE IEDM 2004, pp. 5.2.1-5.2.4, (2004) [58] C. Leroux, J. Mitard, G. Ghibaudo, X. Garros, G. Reimbold, B. Guillaumot, F. Martin, Characterization and modeling of hysteresis phenomena in high-k dielectrics, IEEE IEDM 2004, pp. 737-740, (2004) [59] B.H.Lee, C.D.Young, R.Choi, J.H.Sim, G.Bersuker, C.Y.Kang, R.Hams, G.A.Brown, K.Matthews, S.C.Song, N.Moumen, J.Bamett, P.Lysaght, K.S.Choi, H.C.Wen, C.Huffman, H.Alshareef, P.Majhi, S. Gopalan, J.Peterson, P.Kirsh, H.-J. Li, J.Gutt, M.Gardner, H.R.Huff, P.Zeitzoff, R.W.Murto, L.Larson, C.Ramiller, Intrinsic Characteristics of Highk devices and Implications of Fast Transient Charging Effects (FTCE), IEEE IEDM 2004, pp. 859-862, (2004) [60] J. Mitard, X. Garros, L.P. Nguyen, C. Leroux, G. Ghibaudo, F. Martin, G. Reimbold, Large-scale time characterization and analysis of PBTI in HfO2/Metal gate stacks, IEEE IRPS 2006, pp. 174-178, (2006) [61] C.D. Young, R. Choi, J.H. Sim, B.H. Lee, P. Zeitzoff, Y. Zhao, K. Matthews, G.A. Brown, G. Bersuker, Interfacial layer dependence of HfSixOy gate stacks on Vt instability and charge trapping using ultra-short pulse I-V characterization, IEEE IRPS 2005, pp. 75-79, (2005) [62] B.H. Lee, C. Young, R. Choi, J.H. Sim, G. Bersuker, Transient Charging and Relaxation in High-k Gate Dielectrics and Their Implications, Japanese Journal of Applied Physics, Vol. 44 No. 4B, pp. 24152419, (2005) [63] C. Y. Kanga, J. C. Lee, R. Choi, S. C. Song, C. D. Young, G. Bersuker, B. H. Lee, Transient bicarrier response in high-k dielectrics and its impact on transient charge effects in high-k complementary metal oxide semiconductor devices, Applied Physics Letters vol. 88, pp. 1629051-3, (2006) [64] K. Martens, M. Rosmeulen, B. Kaczer, G. Grownwken, H.E. Maes, Electrical Characterization of leaky charge trapping high k MOS devices using pulsed Q-V, IEEE Electron Device Letters, Vol. 28 No. 5, pp. 436-439, (2007) L. Trojman, L. Ragnarsson, B. J. OSullivan, M. Rosmeulen, V. S. Kaushik, G.V. Groeseneken, H.E. Maes, High-k metal gate mosfets: Impact of extrinsic process condition on the gate-stack quality-a mobility study, IEEE Tran. , Vol. 54. No.3, pp. 497503, (2007) 255

[65]

Bibliography _______________________________________________________________________________ [66] G. Puzzilli, B. Govoreanu, F. Irrera, M. Rosmeulen, J. Van Houdt, Characterization of charge trapping in SiO2/Al2O3 dielectric stacks by pulsed CV technique, Microelectronics Reliability, Vol. 47, No. 4/5, pp. 508512, 2007 FEMTO DLPCA-200 data sheet: http://www.femto.de/datasheet/DE-DLPCA-200_R17.pdf J. S. Brugler and P. G. A. Jespers, Charge Pumping in MOS Devices, IEEE Transactions on Electron Devices,Vol. 16, No. 3, pp. 297-302, 1969

[67] [68] [69]

A. B. M. Elliot, The Use of Charge Pumping Currents to Measure Surface State Densities in MOS Transistors, Solid-State Electronics, Vol. 19, pp. 241-247, (1976) U. Cilingiroglu, A General Model for Interface Trap Charge Pumping Effects in MOS-Devices, Solid-State Electronics, Vol. 28, No. 11, pp. 1127-1141, (1985)
G. Groeseneken, H.E. Maes, N. Beltran, F. R. De Keersmaecker, A Reliable Approach to Charge-Pumping Measurements in MOS Transistors, IEEE Transactions on Electron Devices, Vol. 31 No. 1, pp. 4253, (1984) C.Y. Lu, K.S. Chang-Liao, P.H. Tsai, T.K. Wang, Depth Proling of Border Traps in MOSFET With High- Gate Dielectric by Charge-Pumping Technique, IEEE Transactions on Electron Devices, Vol. 27 No. 10, pp. 859-562, (2006) F. Zhang, K.P. Cheung, J.P. Campbell, J. Suehle, Frequency-Dependent ChargePumping: The Depth Question Revisited, IEEE IRPS 2006, pp. 804-806, (2006) J.G. Simmons, L.S. Wei, Theory of dynamic charge current and capacitance characteristics in MIS systems containing distributed surface traps, Solid-State Electronics, Vol. 16 No.1, pp. 53-66, (1973) E.H. Nicollian, A. Goetzberger, The Si-SiO2 Interface Properties by Means of Very Low Frequency MOS Capacitance Measurements, Surface Science, Vol. 28, pp.157-165, (1967) E.H. Nicollian, J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, John Wiley & Sons Inc., pp.212-221, (1981) S.M. Sze, K.K NG, Physics of semiconductor devices, 3nd ed. John Wiley & Sons Inc., pp.219-223, (1981) F.P. Heiman, G. Warfield, The Effects of Oxide Traps on the MOS Capacitance, IEEE Transaction on electron device, Vol. 12 No. 4, pp. 167-178, (1965) P. Rossel, H. Martinot, D. Esteve, Instabilites Temporelles Des Transistor MOS-II, Le Comportement Dissymetrique, Solid State Electronics, Vol. 13, pp. 425-438, (1970) D.J. Breed, Non-ionic Room Temperature Instabilities in MOS devices, Solid State Electronics, Vol. 17 No. 12, pp.1229-1243, (1974) P. Solomon, High-field electron trapping in SiO2, Journal of Applied Physics, Vol. 48 No. 9, pp. 3843-3849, (1977)

[70] [71]

[72]

[73] [74]

[75]

[76] [77] [78] [79] [80] [81]

256

Bibliography _______________________________________________________________________________ [82] D.J. DiMaria, R. Ghez, D.W. Dong, Charge trapping studies in SiO2 using high current injection from Si-rich SiO2 films, Journal of Applied Physics, Vol. 51 No. 9, pp. 48304841, (1980) S. Zafar, A. Callegari, E. Gusev, M. Fischetti, Charge trapping related threshold voltage instabilities in high permittivity gate dielectric stacks, Journal of Applied Physics, Vol. 93 No. 11, pp. 9298-9303, (2003) A. Shanware, M.R. Visokay, J.J. Chambers, P. Rotondaro, H. Bu, M.J. Khamankar, S. Aur, J. McPherson, L. Colombo, Evaluation of the positive biased temperature stress stability in HfSiON gate dielectrics, IEEE IRPS 2003, pp. 208-213, (2003) C. Ma, B. Li, L. Zhang, J. He, X. Zhang, X. Lin, Modeling of dynamics threshold voltage in high-k gate stack and the application in finfet reliability, IEEE EDSSC 2008, pp. 1-4, (2008) H. Jin, M. Chenyue, Z. Lining, Z. Jian, Z. Xing, A semi-empirical analytic model for threshold voltage instability in MOSFETs with high-k gate stack, Journal of Semiconductors, Vol. 30 No.8, pp.084003.1-4, (2009) S.M. Sze, Physics of semiconductor devices, 2nd ed. John Wiley & Sons Inc., pp.520531, (1981) M. Cho, R. Degraeve, P. Roussel, B. Govoreanu, B. Kaczer, M.B. Zahid, E. Simoen, A. Arreghini, M. Jurczak, J. Van Houdt, G. Groeseneken, A consistent model for oxide trap profiling with the trap spectroscopy by charge injection and sensing (TSCIS) technique, Solid State Electronics, Vol. 54 No. 11, pp. 1384-1391, (2010) F. Irrera, P. Lorenzi, R. Rao, R. Simoncini, G. Ghidini, H.D.B. Gottlob, M. Schmidt, Advanced characterization of Metal/high-k interface, IEEE ULIS 2010, pp. 169-172, (2010) R. Rao, P. Lorenzi, G. Ghidini, F. Palma, F. Irrera, Electron-Related Phenomena at the TaN/Al2O3 interface, IEEE Transactions on Electron Devices, Vol. 57 No. 3 , pp. 637643, (2010) R. Rao, R. Simoncini, H.D.B. Gottlob, M. Schmidt, F. Irrera, Trapping in GdSiO high-k films, Journal of vacuum science and technology B, Vol. 29 No. 1, pp. 1-4, (2011) R. Rao, R. Simoncini, F. Irrera, Trapping in high-k dielectrics, Applyed Physics Letters, Vol. 97 No. 16, pp. 163502.1-3, (2010) H.D.B. Gottlob, T.J. Echtermeyer, M. Schmidt, T. Mollenhauer, T. Wahlbrink, M.C. Lemme, and H. Kurz, Leakage Current Mechanisms in Epitaxial Gd2O3 High-k Gate Dielectrics, Electrochemical and Solid-State Letters, Vol. 11 No. 3, pp. G12-G14, (2008) H.D.B. Gottlob, T. Echtermeyer, T. Mollenhauer, J.K. Efavi, M. Schmidt, T. Wahlbrink, M.C. Lemme, H. Kurz, Investigation of high-K gate stacks with epitaxial Gd2O3 and FUSI NiSi metal gates down to CET=0.86 nm, Materials Science in Semiconductor Processing, Vol. 9, pp. 904908, (2006) H.D.B. Gottlob, M. Schmidt, A. Stefani, M.C. Lemme, H. Kurz, I.Z. Mitrovic, W.M. Davey, S. Hall, M. Werner, P.R. Chalker, K. Cherkaoui, P.K. Hurley, J. Piscator, O. Engstrm and S.B. Newcomb, Scaling potential and MOSFET integration of thermally stable Gd silicate dielectrics, Microelectronic Engineering, Vol. 86, pp. 1642-1645, (2009) 257

[83]

[84]

[85]

[86]

[87] [88]

[89]

[90]

[91] [92] [93]

[94]

[95]

Bibliography _______________________________________________________________________________ [96] H.D.B. Gottlob, T. Echtermeyer, T. Mollenhauer, J.K. Efavi, M. Schmidt, T. Wahlbrink, M.C. Lemme, H. Kurz, M. Czernohorsky, E. Bugiel, H.J. Osten, A. Fissel, CMOS integration of epitaxial Gd2O3 high-k gate dielectrics, Solid-State Electronics Vol. 50, pp. 979985, (2006) H.D.B. Gottlob, M. Schmidt, A. Stefani, M.C. Lemme, H. Kurz, I.Z. Mitrovic, W.M. Davey, S. Hall, M. Werner, P.R. Chalker, K. Cherkaoui, P.K. Hurley, J. Piscator, O. Engstrm and S.B. Newcomb, Gd silicate: A high-k dielectric compatible with high temperature annealing, Journal of Vacuum Science & Technology B: Micr. and Nano. Structures, Vol. 27 No. 1, pp. 249-252, (2009) M. Leskela, M. Ritala, Rare-earth oxide thin lms as gate oxides in MOSFET transistors, Journal of Solid State Chemistry, Vol. 171, pp. 170174, (2003) A. Fissel1, M. Czernohorsky, H.J. Osten, Characterization of crystalline rare-earth oxide high-K dielectrics grown by molecular beam epitaxy on silicon carbide, journal of Vacuum Science and Technology B, Vol. 21 No. 4, pp. 2115-2119, (2006) E.K. Evangeloua, G. Mavroub, A. Dimoulasb, N. Konofaos, Rare earth oxides as high-k dielectrics for Ge based MOS devices: An electrical study of Pt/Gd2O3/Ge capacitors, Solid-State Electronics, Vol. 51 No. 1, pp. 164-169, (2007) E.D. zben, J.M.J. Lopes, A. Nichau, R. Luptk, S. Lenk, A. Besmehn, K.K. Bourdelle, Q.T. Zhao, J. Schubert, S. Mantl, Rare-earth oxide/TiN gate stacks on high mobility strained silicon on insulator for fully depleted metal-oxide-semiconductor field-effect transistors, Journal Of Vacuum Science and Technology B, Vol. 29 No. 1, pp. 903-908, (2011) C. Zhao, T. Witters, B. Brijs, H. Bender, O. Richard, M. Caymax, T. Heeg, J. Schubert, V.V. Afanasev, A. Stesmans, D.G. Schlom, Ternary rare-earth metal oxide high-k layers on silicon oxide, Applied Physics Letters, Vol. 86 No. 13, pp. 132903.1-3, (2005) E.D. zben, J.M.J. Lopes, A. Nichau, R. Luptk, S. Lenk, A. Besmehn, K.K. Bourdelle, Q.T. Zhao, J. Schubert, S. Mantl, Rare-Earth Scandate/TiN Gate Stacks in SOI MOSFETs Fabricated With aFull Replacement Gate Process, IEEE Transactions on Electron Devices, Vol. 58 No. 3, pp. 617-622, (2011) M.S. Rahman, E.K. Evangelou, A. Dimoulas, G. Mavrou, S. Galata, Current instabilities in rare-earth oxides-HfO2 gate stacks grown on germanium based metal-oxidesemiconductor devices due to MaxwellWagner instabilities and dielectrics relaxation, Journal Of Vacuum Science and Technology B, Vol. 29 No. 1, pp. 1116-1123, (2011) K. Xiong, J. Robertson, Oxygen vacancies in high dielectric constant oxides La2O3, LuO3, LaLuO3, Applied Physics Letters, Vol.95 No.2, pp.022903, (2009) E. D. zben, J. M. J. Lopes, A. Nichau, M. Schnee, S. Lenk, A. Besmehn, K.K. Bourdelle, Q.T. Zhao, J. Schubert, S. Mantl, Integration of LaLuO3 (30) as High- Dielectric on Strained and Unstrained SOI MOSFETs With a Replacement Gate Process, IEEE Electron Device Letters, Vol.32 No.1, pp. 15-17, (2011) V.V. Afanasev, A. Stesmans, C. Zhao, M. Caymax, T. Heeg, J. Schubert, Y. Jia, D.G. Schlom, G. Lucovsky, Band alignment between (100)Si and complex rare earthtransition metal oxides, Applied Physics Letters, Vol. 85 No. 24, pp. 5917-5919, (2004)

[97]

[98] [99]

[100]

[101]

[102]

[103]

[104]

[105] [106]

[107]

258

Bibliography _______________________________________________________________________________ [108] Y.Y. Gomeniuk, Y.V. Gomeniuk, A.N. Nazarov, P.K. Hurley, Karim Cherkaoui, Scott Monaghan, P.E. Hellstrm, H.D.B. Gottlob, J. Schubert, J.M.J. Lopes, Electrical Properties of High-K LaLuO3 Gate Oxide for SOI MOSFETs, Advanced Materials Research, Vol. 276, pp. 87-93, (2011) J. Schubert, O. Trithaveesak, W. Zander, M. Roeckerath, T. Heeg, H.Y. Chen, C.L. Jia, P. Meuffels, Y. Jia, D.G. Schlom, Characterization of epitaxial lanthanum lutetium oxide thin lms prepared by pulsed-laser deposition, Applied Physics A, Vol. 90, pp. 577-579, (2008) S. Yang, S. Huang, H. Chen, M. Schnee, Q.T. Zhao, J. Schubert, K.J. Chen, Characterization of high- LaLuO3 thin film grown on AlGaN/GaN heterostructure by molecular beam deposition, Applied Physics Letters, Vol. 99 No. 8, pp. 182103.1-3, (2011) P. Wilson, The Diffusion of Boron in the Si-SiO2 System", Solid State Electronics, Vol. 15, pp. 961- , (1972) C. Wong and F. Lai, Ambient and dopant effects on boron diffusion in oxides, Applied Physics Letters, Vol. 48, pp. 1658- , (1986) K. Shimakura, T. Suzuki, and Y. Yadoiwa, Boron and Phosphorus Diffusion through an SiO2 layer from a Doped Polycrystalline Si Source under Various Drive-in Ambients, Solid State Electronics, Vol. 18, pp. 991- , (1975) G. Sjblom, J. Westlinder, J. Olsson, Investigation of the Thermal Stability of Reactively Sputter-Deposited TiN MOS Gate Electrodes, IEEE Transactions on Electron Devices Vol. 52 No. 10, pp. , (2005) R.G. Southwick III, W.B. Knowlton, Stacked Dual Oxide MOS Energy Band Diagram Visual Representation Program, IEEE Transactions on Device and Materials Reliability, Vol. 6 No. 2, pp. 136-145, (2006) R. Jiang, E. Xie, Z. Chen, Z. Zhang, Electrical property of HfOxNyHfO2HfOxNy sandwich-stack films, Applied Surface Science, Vol. 253 No. 5, pp. 2421-2424, (2006) Y. Lai, S. Monaghan, K. Cherkaoui, H. D. B. Gottlob, M. Schmidt, J. Schubert, J. M. J. Lopes, and P. K. Hurley The onset of electrical stress in 3nm and 6nm molecular beam deposited LaLuO3 MOSCAPs on n-Si(100) substrates using a TiN metal gate and an Al back contact, Proc. Of the 16th Workshop on Dielectrics in Microelectronics (WoDiM) 2010. J.M.J. Lopes, M. Roeckerath, T. Heeg, E. Rije, J. Schubert,S. Mantl, V.V. Afanasev, Y. Jia, D.G. Schlom, Amorphous lanthanum lutetium oxide thin lms as an alternative highgate dielectric, Applied Physics Letter, Vol. 89 No. 22, pp. 222902.1-3, (2006) J. Schubert, O. Trithaveesak, W. Zander, M. Roeckerath, T. Heeg, H.Y. Chen, C.L. Jia, P. Meuffels, Y. Jia, D.G. Schlom, Characterization of epitaxial lanthanum lutetium oxide thin lms prepared by pulsed-laser deposition, Applied Physics A, Vol. 90 No. 8, pp. 577-579, (2008) Y. Saad, M. Ciappa, P. Pfaffli, L. Bomholt, W. Fichtner, Modeling of Cross-Talk Effects in Floating-Gate Devices Using TCAD Simulations, IEEE SISPAD 2006, pp. 224-227

[109]

[110]

[111] [112] [113]

[114]

[115]

[116] [117]

[118]

[119]

[120]

259

Bibliography _______________________________________________________________________________ [121] J.D. Lee, S.H. Hur, J.D. Choi, Effects of Floating-Gate Interference on NAND Flash Memory Cell Operation, IEEE Electron Device Letters, Vol. 23 No.5, pp. 264-266, (2002) S.G. Jung, J.H. Lee, Flash Memory Device with I Shape Floating Gate for Sub-70 nm NAND Flash Memory, Japanese Journal of Applied Physics, Vol. 45 No. 45, pp. 1200 1202, (2006) S.G. Jung, K.W. Lee, K.S. Kim, S.W. Shin, S.S. Lee, J.C. Om, G.H. Bae, J.H. Lee, Modeling of Vth Shift in NAND Flash-Memory Cell Device Considering Crosstalk and Short-Channel Effects, IEEE Transactions on Electron Devices, Vol. 55 No. 4, pp. 10201026, (2008) J.R. Power, Y. Gong, G. Tempel, E.O. Andersen, W. Langheinrich, D. Shum, R. Strenz, L. Pescini, R. Kakoschke, K. van der Zanden, R. Allinger, Improved Reliability of a High-k IPD Flash Cell through use of a Top-oxide, IEEE NVSMW 2007, pp. 27-29 J. De Vos, L. Haspeslagh, M. Demand, K. Devriendt, D. Wellekens, S. Beckx, J. Van Houdt, A scalable Stacked Gate NOR/NAND Flash Technology compatible with high-k and metal gates for sub 45nm generations, IEEE ICICDT 2006, pp. 1-4 S. Jayanti, X. Yang, V. Misra, Investigation of Thermal Stability of High-k Interpoly Dielectrics in TaN Metal Floating Gate Memory Structures, IEEE IMW 2011, pp. 1-4 P. Blomme, M. Rosmeulen, A. Cacciato, M. Kostermans, C. Vrancken, S. Van Aerde, T. Schram, I. Debusschere, M. Jurczak, J. Van Houdt, Novel Dual Layer Floating Gate Structure as Enabler of Fully Planar Flash memory, IEEE VLSIIT 2010, pp. 129-130 L. Zhang, W. He, D.S.H. Chan, B.J. Cho, Multi-layer high-j interpoly dielectric for floating gate ash memory devices, Solid State Electronics Vol. 52 No. 4, pp. 564-570, (2008) D. Wellekens, J. Van Houdt, The future of flash memory: is floating gate technology doomed to lose the race? IEEE ICICDT. 2008. pp.189-194 D. Wellekens, J. De Vos, J. Van Houdt, K. van der Zanden, Optimization of Al2O3 interpoly dielectric for embedded flash memory applications IEEE NVSMW-ICMTD 2008. pp.12-15 D. Ruiz Aguado, B. Govoreanu, P. Favia, K. De Meyer, J. Van Houdt, Impact of the hightemperature process steps on the HfAIO interpoly dielectric stacks for nonvolatile memory applications Materials Science and Technology for Nonvolatile Memories, Vol 10 No 71, pp.1071-1075, (2008) R. Waser, R. Dittmann, G. Staikov, K. Szot, Redox-Based Resistive Switching Memories Nanoionic Mechanisms, Prospects, and Challenges, Advanced Materials, Vol. 21 No. 2526, pp. 26322663, (2009) D. Ielmini, R. Bruchhaus, R. Waser, Thermochemical resistive switching: materials, mechanisms, and scaling projections, Phase Transitions, Vol. 84 No. 7, pp. 570-602, (2011) H. Akinaga, H. Shima, Resistive Random Access Memory (ReRAM) Based on Metal Oxides, Proceedings of the IEEE, Vol. 98 No. 12, pp. 2237-2251, (2010)

[122]

[123]

[124]

[125]

[126] [127]

[128]

[129] [130]

[131]

[132]

[133]

[134]

260

Bibliography _______________________________________________________________________________ [135] C.H. Lee, K.C. Park,K. Kim, Charge-trapping memory cell of SiO2/SiN/high-k dielectric Al2O3 with TaN metal gate for suppressing backward-tunneling effect, Applied Physics Letters, vol. 87 No. 7, p. 073510,( 2005) G. Van den Bosch, A. Furnmont, M. B. Zahid, R. Degraeve, L. Breuil, A. Cacciato, A. Rothschild, C. Olsen, U. Ganguly, J. Van Houdt, Nitride engineering for improved erase performance and retention of TANOS NAND Flash memory, IEEE NVSMW/ICMTD, 2008, pp. 128129. T. Melde, M. F. Beug, L. Bach, S. Riedel, C. Ludwig, and T. Mikolaijck, Nitride thickness scaling limitations in TANOS charge trapping devices, IEEE NVSMW/ICMTD 2008, pp. 130132 C. Sandhya, U. Ganguly, K. K. Singh, C. Olsen, S. M. Seutter, G. Conti, K. Ahmed, N. Krishna, J. Vasi, and S. Mahapatra, The effect of band gap engineering of the nitride storage node on performance and reliability of charge trap Flash, IEEE IPFA 2008, pp. 17. Y.N. Tan, H.C. Wen, C. Park, D.C. Gilmer, C.D. Young, D. Heh, P. Sivasubramani, J. Huang, P. Majhi, P.D. Kirsch, B. H. Lee, H. H. Tseng, R. Jammy, Tunnel oxide dipole engineering in TANOS Flash memory for fast programming with good retention and endurance, IEEE VLSI-TSA 2008, pp. 5455

[136]

[137]

[138]

[139]

[140] K. Kim, Technology for sub-50nm DRAM and NAND Flash Manufacturing, IEEE IEDM 200, pp. 323-326, 2005 [141] Y. Shin, J. Choi, C. Kang, C. Lee, K.-T. Park, J.-S. Lee, J. Sel,V. Kim, B. Choi, J. Sim, D. Kim, H.-j. Cho and K. Kim, A Novel NAND-type MONOS Memory using 63nm Process Technology for Multi-Gigabit Flash EEPRPOMs, IEEE IEDM 2005, pp. 337-340, 2005. [142] Y. Park, Jungdal J. Choi, C. Kang, C. Lee, Y. Shin, B. Choi, J. Kim, S. Jeon, J. Sel, J. Park, K. Choi, T. Yoo, J. Sim, and K. Kim, Highly Manufacturable 32Gb Multi Level NAND Flash Memory with 0.0098 m2 Cell Size using TANOS (Si -OxideAl2O3-TaN) Cell Technology, IEEE IEDM 2006, pp. 29 31, 2006. [143] C.-H. Lee, J. Choi, C. Kang, Y. Shin, J.-S. Lee, J. Sel, J. Sim, S. Jeon, B.-I. Choe, D. Bae1, K. Park, and K. Kim Multi-Level NAND Flash Memory with 63 nm-node TANOS (Si-Oxide-SiN-Al2O3-TaN) Cell Structure, IEEE VLSI Symposium 2006 , pp.21 22, 2006. [144] Z. Huo, J. Yang, S. Lim, S. Baik, J. Lee, J. Han, I.-S. Yeo, U-I. Chung, J. T. Moon, B.-I. Ryu, Band Engineered Charge Trap Layer for highly Reliable MLC Flash Memory, IEEE VLSI Symposium 2007, pp. 138-139, 2007 [145] D. Kwak, J. Park, K. Kim, Y. Yim, S. Ahn, Y. Park, J. Kim, W. Jeong, J. Kim, M. Park, B. Yoo, S. Song, H. Kim, J. Sim, S. Kwon, B. Hwang, H. Park, S. Kim, Y. Lee, H. Shin, N. Yim, K. Lee, M. Kim, Y. Lee, J. Park, S. Park, J. Jung, K. Kim Integration Technology of 30nm Generation Multi-Level NAND Flash for 64Gb NAND Flash Memory, IEEE VLSI Symposium 2007, pp. 12-13, 2007

261

Bibliography _______________________________________________________________________________

[146] C.-H. Lee, C. Kang, J. Sim, J.-S. Lee, J. Kim, Y. Shin, K.-T. Park, S. Jeon, J. Sel, Y. Jeong, B. Choi, V. Kim, W. Jung, C.-I. Hyun, J. Choi and K. Kim, Charge Trapping Memory Cell of TANOS (Si-Oxide-SiN-Al2O3-TaN) Structure Compatible to Conventional NAND Flash Memory, IEEE NVSMW 2006, pp. 54-55, 2006 [147] R. Rao, F. Irrera, Detrapping dynamics in Al2O3 metal-oxide-semiconductor, Journal of Applied Physics, Vol. 107 No. 10, pp.103708.1-6, 2010 [148] R.Rao, F. Irrera, Threshold voltage instability in high-k based ash memories, Microelectronics Reliability, Vol. 50 No. 1, pp. 1273-1277, 2010 [149] R.Rao, F. Irrera, Fast Detrapping Transitens in High-k Dielectric Films, ECS Transactions, Vol. 25 No. 7, pp. 259-268, 2009 [150] P. Lorenzi, R. Rao, G. Ghidini, F. Palma, F. Irrera, Charge Trapping Non Volatile Memory, ECS Transactions, Vol. 25 No. 7, pp. 269-276, 2009 [151] H.T. Lue, S.C. Lai, T.H. Hsu, Y.H. Hsiao, P.Y. Du, S.Y. Wang, K.Y. Hsieh, R. Liu, C.Y. Lu, "A critical review of charge-trapping NAND flash devices", Solid-State and Integrated-Circuit Technology, 2008. ICSICT 2008. 9th International Conference on, pp.807-810, 2008 [152] Y.S.J. Choi, C. Kang, C. Lee, K.T. Park, J.S. Lee, J.S. Kim, V.B. Choi, J.S. Dongchan, K.H.J. Cho, K. Kim, A novel NAND-type MONOS memory using 63nm process technology for multi-gigabit flash EEPROMs, IEEE IEDM 2005, pp. 327330,2005. [153] S.C. Lai, H.T. Lue, J.Y. Hsieh, M.J. Yang, Y.K. Chiou, C.W. Wu, T.B. Wu, G.L. Luo, C.H. Chien, E.K. Lai, K.Y. Hsieh, R. Liu, C.Y. Lu, Study of the Erase Mechanism of MANOS ( Metal/Al2O3/SiN/SiO2/Si) Device, IEEE Electron Device Letters, Vol. 28 No. 7, pp. 643-645, 2007 [154] N. Goel, D.C. Gilmer, H. Park, V. Diaz, Y. Sun, J. Price, C. Park, P. Pianetta, P.D. Kirsch, R. Jammy, "Erase and Retention Improvements in Charge Trap Flash Through Engineered Charge Storage Layer", IEEE Electron Device Letters, Vol.30 No.3, pp.216-218, 2009. [155] J.G. Simmons, R.R. Verderber, New Conduction and Reversible Memory phenomena in Thin Insulating Films, Proceeding of the Royal Society London A, Vol. 301 No. 1464, pp. 77-102, 1967 [156] A. Sawa, T. Fujii, M. Kawasaki, Y. Tokura, Interface resistance switching at a few nanometer thick perovskite manganite active layers, Applied Physics Letters, Vol. 88 No. 23, pp. 232112.1-3, 2006 [157] T. Fujii, M. Kawasaki, A. Sawa, H. Akoh, Y. Kawazoe, Y. Tokura, Hysteretic currentvoltage characteristics and resistance switching at an epitaxial oxide Schottky junction SrRuO3/SrTi0.99Nb0.01O3, Applied Physics Letters, Vol. 86 No. 1, pp. 12107.1-3, 2005

262

Bibliography _______________________________________________________________________________

[158] P.K. Herring, K.A. Campbell, Resistance switching in Snx/Mny/Tez based devices, Workshop on Microelectronics and Electron Devices 2006 WMED '06, pp. 2-22, 2006 [159] R. Fors, S.I. Khartsev, A.M. Grishin, Giant resistance switching in metalinsulator-manganite junctions: Evidence for Mott transition, Physical Review B., Vol. 71 No. 4, pp. 45305.1-4, 2005 [160] D.S. Kim, Y.H. Kim, C.E. Lee, Y.T. Kim, Colossal electroresistance mechanism in a Au/Pr0.7Ca0.3MnO3 /Pt sandwich structure: Evidence for a Mott transition, Physical Review B., Vol. 74 No. 17, pp. 174430.1-6, 2006 [161] G.I. Meijer, U. Staub, M. Janousch, S.L. Johnson, B. Delley, T. Neisius, Valence states of Cr and the insulator-to-metal transition in Cr-doped SrTiO3 , Physical Review B., Vol. 72 No. 15, pp. 155102.1-5, 2005 [162] Y.S. Chen, H.Y. Lee, P.S. Chen, P.Y. Gu, C.W. Chen, W.P. Lin, W.H. Liu, Y.Y. Hsu, S.S. Sheu, P.C. Chiang, W.S. Chen, F.T. Chen, C.H. Lien, M.J. Tsai, Highly scalable hafnium oxide memory with improvements of resistive distribution and read disturb immunity, IEEE IEDM 2009, pp. 105108 [163] Y.B. Nian, J. Strozier, N.J. Wu, X. Chen, A. Ignatiev, Evidence for anOxygen DiffusionModel for the Electric Pulse Induced Resistance Change Effect in Transition-Metal Oxides, Physical Review Letters, Vol. 98 No. 14, pp. 146403.14, 2007 [164] Y.M. Kim, J.S. Lee, Reproducible resistance switching characteristics of hafnium oxide-based nonvolatile memory devices, Applied Physics Letters, Vol. 104 No. 11, pp. 114115.1-3, 2008 [165] W.Y. Chang, Y.C. Lai, T.B. Wu, S.F. Wang, F. Chen, M.J. Tsai, Unipolar resistive switching characteristics of ZnO thin lms for nonvolatile memory applications, Applied Physics Letters, Vol. 92 No. 2, pp. 22110.1-3, 2008 [166] F. Pan, S. Yin, V. Subramanian, A Detailed Study of the Forming Stage of an Electrochemical Resistive Switching Memory by KMC Simulation, Electron Device Letters, Vol. 32 No. 7, pp. 949-951, 2011 [167] Q. Liu, C. Dou, Y. Wang, S. Long, W. Wang, M. Liu, M. Zhang, J. Chen, Formation of multiple conductive laments in the Cu/ZrO2 :Cu/Pt device, Applied Physics Letter, Vol.95 No.1, pp. 23501.1-3, 2009 [168] W. Guan, M. Liu, S. Long, Q. Liu, W. Wang, On the resistive switching mechanisms of Cu/ZrO2 :Cu/Pt, Applied Physics Letters, Vol. 93 No. 10, pp. 223506.1-3, 2008 [169] D. Lee, D.J Seong, I. Jo, F. Xiang, R. Dong, S. Oh, H. Hwang, Resistance switching of copper doped MoOx lms for nonvolatile memory applications, Applied Physics Letters, Vol. 90 No. 6, pp. 122104.1-3, 2007

263

Bibliography _______________________________________________________________________________

[170] N. Banno, T. Sakamoto, N. Iguchi, H. Sunamura, K. Terabe, T. Hasegawa, M. Aono, Diffusivity of Cu Ions in Solid Electrolyte and Its Effect on the Performance of Nanometer-Scale Switch, IEEE Transactions on Electron Devices, Vol. 55 No. 11, pp. 3283-3287, 2008 [171] C. Cagli, D. Lelmini, F. Nardi, A. Lacaita, Evidence for threshold switching in the set process of NiO-based RRAM and physical modeling for set, reset, retention and disturb prediction, IEEE IEDM 2008, pp. 301-304 [172] S.B. Long, C. Cagli, D. Ielmini, M. Liu, J. Sune, Reset Statistics of NiO-Based Resistive Switching Memories, IEEE Electron Device Letters, Vol. 32 No. 11, pp. 1570-1572, 2011 [173] F. Nardi, D. Ielmini, C. Cagli, S. Spiga, M. Fanciulli, L. Goux, D.J. Wouters, Control of filament size and reduction of reset current below 10 mu A in NiO resistance switching memories, Solid State Electronics, Vol. 58 No. 1, pp. 42-47, 2011 [174] D. Fugazza, D. Ielmini, G. Montemurro, A. Lacaita, Temperature- and timedependent conduction controlled by activation energy in PCM, IEEE IEDM 2010, pp. 1-3 [175] D. Fugazza, D. Ielmini, S. Lavizzari, A. Lacaita, Distributed-Poole-Frenkel modeling of anomalous resistance scaling and fluctuations in phase-change memory (PCM) devices, IEEE IEDM 2009, pp. 1-3 [176] A. Lacaita, D. Ielmini, D. Mantegazza, Status and challenges of phase change memory modeling, Solid State Electronics, Vol. 52 No. 9, pp. 1443-1451 [177] A. Redaelli, A. Pirovano, A. Benvenuti, A.L. Lacaita, Threshold switching and phase transition numerical models for phase change memory simulations, Journal of Applied Physics, Vol. 103 No. 11, pp. 111101.1-6, 2008 [178] D. Mantegazza, D. Ielmini, A. Pirovano, A.L. Lacaita, E. Varesi, F. Pellizzer, R. Bez, Explanation of programming distributions in phase-change memory arrays based on crystallization time statistics, Solid State Electronics, Vol. 52 No. 4 , pp. 584-590, 2008 [179] C.Y. Lin, D.Y. Lee, S.Y. Wang, C.C. Lin, T.Y. Tseng, Effect of thermal treatment on resistive switching characteristics in Pt/Ti/Al2O3/Pt devices, Surface Coatings Technololgy, Vol. 203, pp. 628631, 2008 [180] H. Shima, F. Takano, H. Akinaga, Y. Tamai, I.H. Inoue, H. Takagi, Resistance switching in the metal deficient-type oxides: NiO and CoO, Applied Physiscs Letters, Vol. 91, pp. 012901.1-3, 2007. [181] H. Shima, F. Takano, H. Muramatsu, H. Akinaga, Y. Tamai, I.H. Inque, H. Takagi, Voltage polarity dependent low-power and high-speed resistance switching in CoO resistance random access memory with Ta electrode, Applied Physics Letters, Vol. 93, pp. 113504.1-3, 2008
264

Bibliography _______________________________________________________________________________

[182] H. Lv, M. Wang, H. Wan, Y. Song, W. Luo, P. Zhou, T. Tang, Y. Lin, R. Huang, S. Song, J.G. Wu, H.M. Wu, M. H. Chi, Endurance enhancement of Cu-oxide based resistive switching memory with Al top electrode, Applied Physics Letters, Vol. 94, pp. 213502.1-3, 2009 [183] T.N. Fang, S. Kaza, S. Haddad, A. Chen, Y.C. Wu, Z. Lan, S. Avanzino, D. Liao, C. Gopalan, S. Choi, S. Mahdavi, M. Buynoski, Y. Lin, C. Marrian, C. Bill, M. VanBuskirk, M. Taguchi, Erase mechanism for copper oxide resistive switching memory cells with nickel electrode, IEEE IEDM 2006, pp. 789792 [184] S. Muraoka, K. Osano, Y. Kanzawa, S. Mitani, S. Fujii, K. Katayama, Y. Katoh, Z. Wei, T.Mikawa, K. Arita, Y. Kawashima, R. Azuma, K. Kawai, K. Shimakawa, A. Odagawa, T. Takagi, Fast switching and long retention Fe-O ReRAM and its switching mechanism, IEEE IEDM 2007, pp. 779782 [185] I.S. Park, K.R. Kim, S. Lee, J. Ahn, Resistance switching characteristics for nonvolatile memory operation of binary metal oxides, Japanese Journal of Applied Physics, Vol. 46, pp. 21722174, 2007 [186] C. Yoshida, M. Kurasawa, Y.M. Lee, M. Aoki, Y. Sugiyama, Unipolar resistive switching in CoFeB/MgO/CoFeB magnetic tunnel junction, Applied Physics Letters, Vol. 92, pp. 113508.1-3, 2008 [187] M.K. Yang, J.W. Park, T.K. Ko, J.K. Lee, Bipolar resistive switching behavior in Ti/MnO2/Pt structure for nonvolatile memory devices, Applied Physics Letters, Vol. 95, pp. 042105.1-3, 2009 [188] M.J. Lee, S. Han, S.H. Jeon, B.H. Park, B.S. Kang, S.E. Ahn, K.H. Kim, C.B. Lee, C.J. Kim, I.K. Yoo, D.H. Seo, X.S. Li, J.B. Park, J.H. Lee, Y. Park, Electrical manipulation of nanofilaments in transition-metal oxides for resistance-based memory, Nano Letters, Vol. 9, pp. 14761481, 2009 [189] L. Goux, J.G. Lisoni, X.P. Wang, M. Jurczak, D. J.Wouters, Optimized Ni oxidation in 80-nm contact holes for integration of forming-free and low-power Ni/NiO/Ni memory cells, IEEE Transactions on Electron Devices, Vol. 56, No. 10, pp. 23632368, 2009 [190] M. Terai, Y. Sakotsubo, Y. Saito, S. Kotsuji, H. Hada, Effect of bottom electrode of ReRAM with Ta2O5/TiO2 stack on RTN and retention, IEEE IEDM 2009, pp. 775778 [191] Y. Hosoi, Y. Tamai, T. Ohnishi, K. Ishihara, T. Shibuya, Y. Inoue, S. Yamazaki, T. Nakano, S. Ohnishi, N. Awaya, I.H. Inoue, H. Shima, H. Akinaga, H. Takagi, H. Akoh, Y. Tokura, High speed unipolar switching resistance RAM (RRAM) technology, IEEE IEDM 2006, pp. 793796 [192] Y.W. Chang, Y.C. Lai, T.B. Wu, S.F. Wang, F. Chen, M.J. Tsai, Unipolar resistive switching characteristics of ZnO thin films for nonvolatile memory applications, Applied Physics Letters, Vol. 92, pp. 022110.1-3, 2008

265

Bibliography _______________________________________________________________________________

[193] N. Xu, L. Liu, X. Sun, X. Liu, D. Han, Y.Wang, R. Han, J. Kang, B. Yu, Characteristics and mechanism of conduction/set process in TiN/ZnO/Pt resistance switching random-access memories, Applied Physics Letters, Vol. 92, pp. 232112.1-3, 2008 [194] B. Sun, Y.X. Liu, L.F. Liu, N. Xu, Y. Wang, X.Y. Liu, R.Q. Han, J.F. Kang, Highly uniform resistive switching characteristics of TiN/ZrO2/Pt memory devices, Journal of Applied Physics, Vol. 105, pp. 061630.1-3, 2009 [195] Y. Sato, K. Tsunoda, K. Kinoshita, H. Noshiro, M. Aoki, Y. Sugiyama, Sub100A Reset Current of Nickel Oxide Resistive Memory Threough Control of Filamentary Conductance by Current Limit of MOSFET, IEEE Transactions on Electron Devices, Vol. 55 No. 5, pp. 1185-1191, 2008 [196] X. Zhao, D. Vanderbilt, Phonons and lattice dielectric properties of zirconia, Physical Review B, Vol. 65, pp. 75105.1-5, 2002 [197] D. Sangalli and A. Debernardi, Exchangecorrelation effects in the monoclinic to tetragonal phase stabilization of Yttriumdoped ZrO2: a firstprinciples approach, arXiv:1111.1147v2 [198] D. Tsoutsou, L. Lamagna, S. N. Volkos, A. Molle, S. Baldovino, S. Schamm, P. E. Coulon, M. Fanciulli, "Atomic layer deposition of LaxZr1xO2 (x=0.25) high-k dielectrics for advanced gate stacks", Applied Physics Letters, Vol. 94, pp. 53504.1-3, 2009 [199] P. Tsipas, S. N. Volkos, A. Sotiropoulos, S. F. Galata, G. Mavrou, D. Tsoutsou, Y. Panayiotatos, A. Dimoulas, C. Marchiori, J. Fompeyrine, Germanium-induced stabilization of a very high-k zirconia phase in ZrO2/GeO2 gate stacks, Applied Physics Letters, Vol. 93 No. 8, 82904.1-3, 2008 [200] Y.H. Wu, M.L. Wu, J.R. Wu, L.L. Chen, Ge-stabilized tetragonal ZrO2 as gate dielectric for Ge metal-oxide-semiconductor capacitors fabricated on Si substrate, Applied Physics Letters, Vol. 97, pp. 43503.1-3, 2010 [201] A. Paskaleva, M. Lemberger, A. J. Bauer, W. Weinreich, J. Heitmann, E. Erben, U. Schrder, and L. Oberbeck, Influence of the amorphous/crystalline phase of Zr1xAlxO2 high-k layers on the capacitance performance of metal insulator metal stacks, Journal of Applied Physics, Vol. 106, pp. 54107.1-6, 2009 [202] G. Congedo, A. Lamperti, L. Lamagna, S. Spiga , "Stack engineering of TANOS charge-trap flash memory cell using high- ZrO2 grown by ALD as charge trapping layer ", Microelectronic Engineering, Vol. 88 No. 7, pp. 1174-1177, 2011 [203] Y.-H. Wu, L.-L. Chen, J.-R. Wu, M.-L. Wu, C.-C. Lin, C.-H. Chang, Nonvolatile Memory with Nitrogen-stabilized cubic-phase as charge-trapping layer, IEEE Electron Device Letters, Vol. 31, pp. 1008-1011, 2010

266

Bibliography _______________________________________________________________________________

[204] G. Zhang, W. Hwang, S.H.S. Lee, B.J. Cho, W.J. Yoo, Endurance Reliability of Multilevel-Cell Flash Memory Using a ZrO2/Si3N4 Dual Charge Storage Layer, IEEE Transactions on Electron Devices, Vol. 55 No. 9, pp. 23612369, 2008 [205] D. Zhou, U. Schroeder, J. Xu, J. Heitmann, G. Jegert, W. Weinreich, M. Kerber, S. Knebel, E. Erben, T. Mikolajick, Reliability of Al2O3-doped ZrO2 high-k dielectrics in three-dimensional stacked metal-insulator-metal capacitors, Journal of Applied Physics, Vol. 108, pp. 124104.1-6, 2010 [206] Q. Zuo, S. Long, S. Yan, Q. Liu, L. Shao, Q. Wang, S. Zhang, Y. Li Wang, M. Li, ZrO2-Based Memory Cell With a Self-Rectifying Effect for Crossbar WORM Memory Application, IEEE Electron Device Letters, Vol. 31 No. 4, pp. 344346, 2010 [207] Q. Liu, W. Guan, S. Long, M. Liu, S. Zhang, Q. Wang, J. Chen, Resistance switching of Au-implanted-ZrO2 lm for nonvolatile memory application, Journal of Applied Physics, Vol. 104, pp. 114514.1-6, 2008 [208] X. Wu, P. Zhou, J. Li, L. Y. Chen, H. B. Lv, Y. Y. Li, and T. A. Tang, Reproducible unipolar resistance switching in stoichiometric ZrO2 films, Applied Physics Letters, Vol. 90, pp. 183507.1-3, 2007 [209] H. Zhang, B. Gao, B. Sun, G. Chen, L. Zeng, L. Liu, X. Liu, J. Liu, R. Han, J. Kang, B. Yu, Ionic doping effect in ZrO2 resistive switching memory, Applied Physics Letters, Vol. 96, pp. 123502.1-3, 2010 [210] G. Apostolopoulos, G. Vellianitis, A. Dimoulas, J.C. Hooker, T. Conard, Complex admittance analysis for La2Hf2O7/SiO2 high- dielectric stacks, Applied Physics Letters, Vol. 84 No. 2, pp. 260-263, 2004 [211] L. Kornblum, J. A. Rothschild, Y. Kauffmann, R. Brener, m. Eizenberg, Band offsets and Fermi level pinning at metal-Al2O3 interfaces, Physical Review B, Vol. 84, pp. 155317.1-3, 2011 [212] J. Kwon and Y. J. Chabal, Thermal stability of TaN on HfO2 and Al2O3, Applied Physics Letters, Vol. 96, pp. 151907.1-3, 2010 [213] H. Kim, P. C. McIntyre, C. O. Chui, K. C. Sarawat, S. Stemmer, Engineering chemically abrupt high-k metal oxide/silicon interfaces using an oxygen-gettering metal overlayer, Journal of Applied Physics, Vol. 96, pp. 3467-3473, 2004 [214] C. Cagli, J. Buckley, V. Jousseaume, T. Cabout, A. Salaun, H. Grampeix, J.F. Nodin, H. Feldis, A. Persico, J. Cluzel, P. Lorenzi, L. Massari, R. Rao, F. Irrera, F. Aussenac, C. Carabasse, M. Coue, P. Calka, E. Martinez, L. Perniola, P. Blaise, Z.Fang, Y.H. Yu, G. Ghibaudo, D. Deleruyelle, M. Bocquet, C. Mller, A. Padovani, O. Pirrotta, L. Vandelli, L. Larcher, G. Reimbold, B. de Salvo, Experimental and Theoretical Study of Electrode Effects in HfO2 based RRAM, IEEE IEDM 2011, pp. 28.7.1-28.7.4

267

Bibliography _______________________________________________________________________________

[215] V. Jousseaumea, A. Fantinia, J.F. Nodina, C. Guedja, A. Persicoa, J. Buckleya, S. Tiranoa, P. Lorenzi, R. Vignona, H. Feldisa, S. Minoreta, H. Grampeixa, A. Roulea, S. Faviera, E. Martineza, P. Calkaa, N. Rochata, G. Auverta, J.P. Barnesa, P. Gonona, C. Vallea, L. Perniola, B. De Salvo, Comparative study of non-polar switching behaviors of NiO- and HfO2-based oxide resistive-RAMs, Solid State Electronics, Vol. 58, pp. 62-67, 2011 [216] Y.B. Kim, S.R. Lee, D. Lee, C.B. Lee, M. Chang, J.H. Hur, M.J. Lee, G.S. Park, C.J. Kim, U.I. Chung, I.K. Yoo, K. Kim, Bi-layered RRAM with unlimited endurance and extremely uniform switching, IEEE VLSI Technology Symposium 2011, pp. 52-53 [217] G. Bersuker, D.C. Gilmer, D. Veksler, J. Yum, H. Park, S. Lian, L. Vandelli, A. Padovani, L. Larcher, K. McKenna, A. Shluger, V. Iglesias, M. Porti, M. Nafra, W. Taylor, P.D. Kirsch, R. Jammy, Metal Oxide RRAM Switching Mechanism Based on Conductive Filament Microscopic Properties, IEEE IEDM 2010, pp. 19.6.1-19.6.4 [218] F. Nardi, C. Cagli, D Ielmini, "Physical models of size-dependent nanofilament formation and rupture in NiO resistive", Nanotechnology , Vol. 22, No. 25, pp. 4022 , 2011 [219] L. Vandelli, A. Padovani, L. Larcher, G. Bersuker, D. Gilmer, P. Pavan, Modeling of the Forming Operation in HfO2-Based Resistive Switching Memories, IEEE IMW 2011, pp.1-4 [220] J.W. McPherson, J.Y. Kim, A. Shanware, H. Mogul, Termochemical description of dielectric breakdown in high dielectric constant materials, Applied Physics Letters, Vol. 82 No.13, pp. 2121-23, 2003 [221] D. Ielmini, R. Bruchhaus, R. Waser, Termochemical Resistive Switching: material, mechanism and scaling projection, in Phase Transistions, Taylor&Francis, 2011, London. ISSN 0141-1594 (Print), 1029-0338 [222] J. W. McPherson, R.B. Khamankar, A. Shanware, Complementary model for intrinsic time dependent dielectric breakdown in SiO2 dielectrics, Journal of Applied Physics, Vol. 88, pp. 5351-5357, 2000

268