BluespecSystemVerilogReferenceCard

Revision:11/07 bold italic {} [] asis useridentifierbeingdeclared repeated optional

interfaceifc_name; methoddeclarations subinterfacedeclarations endinterface[:ifc_name] interfaceifc_name#({typeType_name}); methoddeclarations subinterfacedeclarations endinterface[:ifc_name] example: interfaceMyIfc#(t); methodActiontick(); interfaceFIFO#(t)inbuffer; endinterface:MyIfc

InterfaceDeclaration

methodActionmethod_name({parameter}) [if(method_predicate)]; methodbodystatements endmethod[:method_name]

ActionMethodDefinition

methodActionValuemethod_name({parameter}) [if(method_predicate)]; methodbodystatements returnstatement endmethod[:method_name]

ActionValueMethodDefinition

Capitalization
Foo:Typenames,Typeclassnames,Interfacenames,Enumlabels, Taggedunionlabels,Packagenames foo:bit[..],int,modulenames,instancenames,allvariables, alltypevariables,rulenames packagePackage_name; typedefstatements importstatements interfacedeclarations moduledeclarations endpackage[:Package_name]

VariableDeclarationandInitialization
Type{variable_name[=expression]}; example: Integerx=16,y=32; inta[20],b[40]; Int#(5)xs[2][4]={{1,2,3,4}, {5,6,7,8}};

methodTypemethod_name[(Typeargument)];

MethodDeclaration ModuleDefinition

Package

modulemodule_name[#({parameter})] ({Ifc_typeifc_name*})[provisos]; moduleinstantiations variabledeclarationandinitializations rules interface/methoddefinitions endmodule[:module_name] *ifc_nameoptionalifonlyoneifc

VariableAssignment
variable_name=expression; example: x=23; b=foo.bar(x);

importPackage_name::*;

ImportStatement

ModuleInstantiation
Ifc_typeifc_name<module_name({parameter}); Ifc_typeifc_name<module_name([{parameter,} clocked_byclock_name, reset_byreset_name]); example: Reg#(Time32)state<mkReg(0);

ActionValueAssignmentStatement
Special<notationusedtoperformtheactionandreturnthe value typeidentifier<expression; identifier<expression;

Bit#(n) Int#(n) //signed Uint#(n) //unsigned Integer //staticelaborationonly Bool String Action ActionValue#(t) Rules Tuple2#(t1,t2)...Tuple7#(t1,...,t7) int //Int#(32) Nat //Bit#(32) Maybe#(t)

PredefinedDataTypes

rulerule_name[rule_predicate]; actionstatements endrule[:rule_name] rules[:rules_name] rule variabledeclarationorvariableassignment endrules[:rules_name]

Rules

letidentifier=expression;

ImplicitTypeDeclarationandInitialization
ifexpressionisactionvaluemethod

letidentifier<expression; example: letn=valueof(Buffsize); letz<rndm.get;

RegisterReadandWrite
register_name<=expression; example: state<=state+1;//sameas:state._write(state.read()+1)

Type_name Type_name#(type_variable)

TypeDefinition
//polymorphictype

action[:action_name]; actionstatements endaction[:action_name]

ActionBlock

typedeftypeType_name[#({typetype_var})]; example: typedefBit#(8)Byte; typedefTuple3#(a,a,a)Triple#(typea);

TypeSynonym

methodTypemethod_name({parameter}) [if(method_predicate)]; methodbodystatements returnstatement endmethod[:method_name]

ValueMethodDefinition

typedefenum{{Elements}}Type_name [deriving(Typeclass)]; example: typedefenum{Red,White,Blue}Color deriving(Eq,Bits);

Enumeration

(structvaluecontainsmember1andmember2,etc.) typedefstruct{Typemember1;...;TypememberN} Type_name[#{[numeric]typetype_variable}] [deriving(Typeclass)]; example: typedefstruct{Intx;Inty;}Coord deriving(Eq,Bits); Declarationandinitializationofastructurevariable Typevariable_name=Type{member:expression} Coordc1=Coord{x:1,y:foo}; Updateofastructurevariable c1.x=c1.x+5; Structurememberselection xposition=c1.x; TaggedUnion (unionvaluecontainsmember1ormember2) typedefuniontagged{typeMember1;...; typeMemberN;}Type_name[#...[numeric] typetype_variable]; example: typedefuniontagged{ voidInvalid; intValid;}MaybeInt;

Structure

(*{attribute[=expression]}*) synthesize RST_N=string CLK=string always_ready[=interface_method] always_enabled[=interface_method] descendingurgency={rule_names} preempts={rule_names,(list_rule_names)]} doc=string always_ready[=interface_method] always_enabled[=interface_method] ready=string enable=string result=string prefix=string port=string always_ready[=interface_method] always_enabled[=interface_method] noinline

Attributes

ModuleAttributes(toplevelonly)

MethodAttributes

InterfaceAttributes

Declarationandinitializationofataggedunion

FunctionAttributes(toplevelonly) RuleAttributes

parameterparameter_name=expression; portport_name=expression; default_clockclock_name [(port_name,port_name)][=expression]; input_clockclock_name[(port_name, port_name)]=expression; output_clockclock_name (port_name[,port_name]); no_reset; default_resetclock_name([port_name]) [=expression]; input_resetclock_name ([port_name])=expression; output_resetclock_name(port_name); ancestor(clock1,clock2); same_family(clock1,clock2); method[output_port]method_name ({input_ports})[enableenable_port] [readyready_port][clocked_by clock_name] [reset_byclock_name]; schedule({method_name})operator ({method_name}); operatorsareCF,SB,SBR,andC path(port_name1,port_name2);

importBVIStatements

Typevariable_name=Memberexpression; MaybeIntx=taggedValid5;

PatternMatching
taggedMember[pattern]

TaggedUnion Structure Tuple

fire_when_enabled no_implicit_conditions descending_urgency={rule_names} preempts{rule_names,[(list_rule_names)]}

DefinedInterfaces
interfaceReg#(typea_type); methodAction_write(a_typex1); methoda_type_read(); endinterface:Reg interfacePulseWire; methodActionsend(); methodBool_read(); endinterface

Reg

taggedType[member:pattern] tagged{pattern,pattern}

Patternmatchinginacasestatement case(f(a))matches taggedValid.x:returnx; taggedInvalid:return0; endcase Patternmatchinginanifstatement if(xmatchestaggedValid.n&&&n>5...) matchpattern=expression; example: Tuple2#(Bits(32)x,Booly)a_tuple; match{.a,.b}=a_tuple;

PatternMatchingExamples

$display $write $fopen $fdisplay $fwrite $fgetc $fflush $fclose $ungetc

SystemTasksandFunctions
$finish $stop $dumpon $dumpoff $dumpvars $test$plusargs $time $stime

PulseWire

typedefReg#(a_type)Wire#(typea_type);

Wire

DefinedModules ImportingCFunctions
modulemkReg#(a_typeresetval) (Reg#(a_type)); modulemkRegU(Reg#(a_type)); modulemkRegA#(a_type resetval)(Reg#(a_type)); modulemkWire(Wire#(a_type)); modulemkBypassWire(Wire#(a_type)); modulemkDWire#(a_typedefaultval) (Wire#(a_type)); modulemkPulseWire(PulseWire);

Reg

PatternMatchingAssignmentStatement

importBDPI[c_function_name=]function Return_typefunction_name[{argument}]) [provisos];

ImportingVerilogModules
importBVI[verilog_module_name]= module[[Type]]module_name[#({parameter})] ({Ifc_typeifc_name})[provisos]; modulestatements importBVIstatements endmodule[:module_name]

Wire

BypassWire DWire

functiontypefunction_name([{arguments}]) [provisos]; functionbodystatements returnstatement endfunction[:function_name]

FunctionDefinition

PulseWire

FIFOFs(importFIFOF::*;)
seeLRMforadditionalFIFOs

LibraryPackages

BSVExample
packageCounter; interfaceCounter#(typecount_t); methodcount_tread(); methodActionload(count_tnewval); methodActionincrement(); methodActiondecrement(); endinterface modulemkCounter(Counter#(count_t)) provisos(Arith#(count_t),Bits#(count_t, count_t_sz)); Reg#(count_t)value<mkReg(0); PulseWireincrement_called<mkPulseWire(); PulseWiredecrement_called<mkPulseWire(); ruledo_increment(increment_called&&! decrement_called); value<=value+1; endrule ruledo_decrement(!increment_called&& decrement_called); value<=value1; endrule methodcount_tread(); returnvalue; endmethod methodActionload(count_tnewval); value<=newval; endmethod methodActionincrement(); increment_called.send(); endmethod methodActiondecrement(); decrement_called.send(); endmethod endmodule endpackage:Counter

Interface

interfaceFIFOF#(typea_type); methodActionenq(a_typex1); methodActiondeq(); methoda_typefirst(); methodBoolnotFull(); methodBoolnotEmpty(); methodActionclear(); endinterface:FIFOF

Modules

modulemkFIFOF#(FIFO#(a_type)); modulemkFIFOF1#(FIFO#(a_type)); modulemkSizedFIFOF#(Integern)(FIFO#(a_type)); modulemkLFIFOF#(FIFO#(a_type));

interfaceGet#(typea_type); methodActionValue#(a_type)get(); endinterface:Get interfacePut#(typea_type); methodActionput(a_typex1); endinterface:Put typedefTuple2#(Get#(a_type),Put#(a_type)) GetPut#(typea_type);

Interfaces

Get/Put(importGetPut::*;)

Type

Connectable(importConnectable::*;) Typeclass
typeclassConnectable#(typea,typeb);

Module
mkConnection#(ax1,bx2);

Client/Server(importClientServer::*;) Interfaces
interfaceClient#(typereq_type,type resp_type); interfaceGet#(req_type)request; interfacePut#(resp_type)response; endinterface:Client interfaceServer#(typereq_type,type resp_type); interfacePut#(req_type)request; interfaceGet#(resp_type)response; endinterface:Server typedefTuple2#(Client#(req_type,resp_type), Server#(req_type,resp_type)) ClientServer#(typereq_type,typeresp_type);

Type