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1. Objectives
The objective of this program is to develop first-of-a-kind MPEG-4 architectures, optimised for high performance
and low power. The main output of the program are system-on-chip MPEG-4 architectures, system-level
implementation methodologies and tools supporting the design flow of this family of applications.
2. Background
Advanced multimedia image compression applications are characterised by media diversity and dynamic
resource availability, making the use of first generation image compression techniques not appropriate. To
overcome these inefficiencies, new image compression algorithms have been developed, and are being
standardised within the ISO/IEC MPEG-4 context.
MPEG-4 can indeed be considered as the first true multimedia standard, because it includes concepts such as
objects, scalability, scene composition, etc. As such, it will be the select standard for a variety of applications
ranging from mobile multimedia terminals to game applications and set-top boxes.
A MPEG-4 system no longer compresses images as a whole, but allows for 3-D scene composition of multiple
heterogeneous objects, e.g. video sequences of arbitrary shapes, face and body animated mannequins, wavelet-
based still images and wavelet-based textures. Mechanisms are provided to adapt to changing communication
bandwidth and bit error rate as well as to different (possibly changing in time) terminal resources. These
mechanisms include advanced error resilience, spatial-, SNR-, and temporal-based scalability and graceful
degradation operation modes. Additionally, MPEG-4 provides the necessary hooks for user interaction with the
3-D scene.
The challenges for designing a MPEG-4 architecture are being able to 1) cope with the high system complexity, 2)
to efficiently design the new functionality (e.g. wavelets), and 3) combine the flexibility requirements resulting
from the heterogeneous nature of MPEG-4 and from the user interaction, with the efficiency of application
specific architectures. Current research proves that the main bottlenecks for a MPEG-4 system are with the
memory requirements (memory size and bandwidth).
IMEC is consequently currently focusing on the development of methodologies and CAD tools for supporting
the implementation of MPEG-4 like systems, on the implementation of MPEG-4 scalability functionality, and on
the design of specific memory architectures for MPEG-4 systems.
IMEC has investigated for several years the use of microelectronics for complex digital signal processing
systems. In the field of multimedia image compression, the DESICS division has several realisations including the
design of a hardware motion estimator for a H.261 video-conferencing encoder, the development of a low power
architecture for a H.263 video-conferencing decoder and a colour transformation chip for region-oriented coding,
the development of a low-power architecture for a MPEG-4 video encoding, and the world first silicon for MPEG-
4 specific functionality (Ozone).
4. Program Outline
The program consists out of 6 work packages:
In this work program, it is assumed that the partner will define a limited set of MPEG-4 application scenarios at
the start of the project. Quantitative characteristics of the data streams, data sources and user interaction in this
application will be needed.
Every six months there will be a meeting to review this work plan and update it, if necessary.
The main cost factors under consideration are performance and power consumption.
The ATOMIUM system level design methods and optimisation tools which are developed at IMEC will be used
to dimension and optimise the memory architecture and interconnections. Together with the definition of the
architecture, also the mapping of the functionality of MPEG-4 onto the architecture has to be performed.
In this work package, we will first define complexity metrics and complexity prediction. Consequently, graceful
degradation strategies will be worked out. To this end, graceful degradation will be considered both at the
system level and the object decoder level. The developed techniques will mainly focus on 3D rendering, where
the expected impact is the greatest. These techniques shall be based on the information found in the MPEG-4
normative bitstream and on optional MPEG-4 meta-information.
WP6: Demonstration
In this last work package, a demonstration will be built for the results of this project. A possible implementation
would consist of a PC with a plug in card for the hardware accelerators, connected via a cable to a handheld
personal organiser on which the received information is displayed.
The demo will show the relevance of the architectural refinements (e.g. memory optimisations, graceful
degradation, etc.).
5. Deliverables
Participating in this program offers the following results to the industrial partner:
• assessment of specific memory architectures for MPEG-4,
• transfer of IMEC’s system-level implementation methodologies,
• access to ATOMIUM CAD for the design of MPEG-4 systems,
• insight in MPEG-4 graceful degradation techniques,
• assessment of low power techniques,
• insight in issues concerning integration of MPEG-4 systems with other state-of-the-art developments where
IMEC has an important research activity (e.g. broadband modems and wireless communications systems),
• up-to-date information on the MPEG-4 standardisation,
• access to implementation know-how for state-of-the-art wavelet compression,
• evaluation of the performances and feasibility of next-generation multimedia algorithms (e.g. wavelet-based
coding of video sequences).