AFDX - Real-Time Ethernet

O:\40-Teams\05-CS Architectures\cs-arch-engineering\administrative groups\schons-randy\AFDX Real-time Ethernet
AFDX Real-time Ethernet

By Mark Bobbin
Copyright 2008 Rockwell Collins, Inc. All rights reserved.
Proprietary Information For Training Purposes Onlly
Definition of a Real-time System
[2]
A real-time system is the combination of hardware and software elements interacting with their environment to produce functionally correct results before a specific deadline Classifications of real-time systems There are 3 classifications of real time systems based on their type of deadline:
Hard real-time system can produce catastrophic consequences if it fails to meet its deadline The results of a firm real-time system cease to be useful as soon as the deadline expires, but the consequences of not meeting the deadline are not severe Soft real-time systems are real-time systems that are neither hard nor firm. The utility of results produced by a task with a soft deadline decrease over time after the deadline expires
Proprietary Information For Training Purposes Only
The Needs for AFDX

Prior to AFDX systems were interconnected using dedicated cables that had a single origin and multiple destinations As system complexity increased the size and complexity of the interconnections grew quickly The complexity of systems increases the amount of information that must be exchanged A local area network technology had been used reduce the complexity of the cable plant and to increase the amount of information exchanged in industrial control applications To be widely adopted the network technology must be cheap, widely available, scalable, extensible, and opened to multiple vendors of network equipment To ensure interoperation of equipment interconnected by the network, the network protocol must support verification testing and validation of interoperation
Copyright 2008 Rockwell Collins, Inc. All rights reserved. Proprietary Information For Training Purposes Only
Ethernet Began As a Shared Media

Ethernet Ethernet began as a shared bus protocol using CSMA/CD to access the shared bus.
It used the Binary Exponential Back-off algorithm to access the bus. Transmit and listen for a collision When a collision occurs wait a random number If another collision occurs wait another random number After 16 consecutive collisions give up Indeterminate performance
4
Poor performance when applied to heavily loaded networks

Evolution From the Shared Media Began with the Hub

Physical connections were replaced with logical connections Hub The hub became the collision domain Network is half-duplex
Switch Behavior
Switches break up the network collision domains into each of the switch interfaces Switch When multiple stations are transmitting simultaneously, frames can be delivered without collision[3] The switch is a fullduplex interconnection. There are no collisions D using full duplex Ethernet
Fundamental Elements Within an Ethernet Switch[5]

Frames are forwarded
Frames Depart
Frames are queued for transmission

Steps to Switch a Frame

1. Receive Frame 2. Verify computed FCS and received FCS match 3. Identify destination interface(s) by comparing Destination MAC address to entries in forwarding table 4. Enqueue Frame into destination interface(s) queues 5. Transmit frame from switch
Multiple Frames To the Same Destination
Switch
Frames Ready to Transmit From the Leftmost Switch Interface

Frames are sent from the interface at the link speed (100 Mb/s) The queue is a finite depth, when to many frames arrive for a specific switch interface they are dropped The queuing delay through the switch contributes to the overall end-to-end delay
10
The Need for Admission Control

In order to guarantee that all packets accepted in the system will arrive before their maximum delay, an admission control algorithm must be used to only accept tasks whose requirements can be satisfied
11
The Goals of AFDX

Satisfying the customer needs for a common data bus and overcoming the problems of commercial switched Ethernet Provide high network availability Permit logical interconnection using a network of end systems and switches Guarantee the maximum network delay and jitter will never be exceeded Permit creation of single producer, multiple consumers of information with minimal network overhead Permit interoperation with internet protocols The AFDX network is an Ethernet network modified to the environmental constraints of Aeronautical customers
12
AFDX End System and Switch
13
AFDX Switch
Static routing through the switch Path can go to one or many destination ports Buffers exist at the output ports
14
Host-to-Host Connections
1 2 3 4 5 6 7
007 006 005 004 003
24 23 22
Police
21 20 19 18 17
007 006
Store
8 SWITCH
Host
002 001
Rate Regulation and Frame Construction
9 10 11 12
Forward
16 15 14 13
005 004 003 002 001
Host
24
Redundancy Management
Timestamping and Frame Decomposition
Integrity Checking Integrity Checking
2 3 4 5 6 7 8 SWITCH 9 10 11 12
23 22
Police
21 20 19 18 17
Store
Forward
16 15 14 13
15
Ethernet Frame
16
AFDX Frame Principals

INCOMING FRAME SFD Dest MAC Addrs= 03:00:00:00:00:01 SRC MAC Addrs= 02:00:00:04:8D:20 L/T PAYLOAD FCS
FORWARDING TABLE
Destination MAC Address 03-00-00-00-00-01 03-00-00-00-00-06 03-00-00-00-00-0B 03-00-00-00-00-0C 03-00-00-00-00-10 03-00-00-00-00-13 03-00-00-00-00-14
Port 16 12,13,14 7,8,9,10 11 5 5 1,2,3,4,5
17
Virtual Link Principals

A single end system is the source of each VL. The bandwidth allocated to an individual VL is isolated from all other VLs Frames can be sent periodically using the BAG as a period. Frames can be sent sporadically using BAG as a minimum inter emission time
End System A End System B End System C
Sub VL Queue
Receive Port
Receive Port
Virtual Link
Frame
Network
BAG
Frame 1 Frame 2 Frame 3 Frame 4
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Enforcing BAG Makes the Network Deterministic

End System
BAG Regulator
End System
Policer
Switch
BAG Regulator
1 20
BAG Regulator
Policer
Policer
BAG Regulator
19
BAG Regulator
18
4 End System 5
17
Policer
16
Faulted End System
19
Ports Connect Host to Network
003
002
003 002 001 001 002 001 002 002 001 001 001 001 002 007 006 005 004 002 003 001 002 001 001
004 007 006 005
r it e
003
002
Transmit Ports
Application PCI BUS

R ead
BAG Reg
HOST PROCESSOR
Receive Ports
End System
20
Transmit Path Association

F ro m H o s t
P o rt 1
P o rt 2
P o rt 3
P o rt 4
s u b V L Q u e u e
V L
B A G
R e g u la t o r
21
Types of Transmit Ports

The network addressing is statically configured for the AFDX port When using a SAP port the application program using the port can specify the destination UDP and IP addresses
22
Transmit Ports Connected to the Same SubVL Share the SubVL Queue
When 2 or more ports share a subVL, they both have equal opportunity to use all of the resources in the subVL
Tx Port Tx Port
007 006 005 004 003 002 001
subVL
Tx VL
23
SubVLs are Isolated from Each Other

Tx Port Tx Port Tx Port
001
007 006 005 004 003 002 001
24
Receive Ports
Associated with a single virtual link without a subVL Multiple receive ports per virtual link Destination port number in the End System is determined using:
Destination MAC address (e.g. 03-00-00-00-11-01) Destination IP address (e.g. 10.14.222.30) Destination UDP port (e.g. 50025)
25
AFDX Receive
PORT UDP Src. UDP IP
Ver Len TOS Len ID Flg. TTL Prot. Hd. Csum Src. IP Dst. IP PAYLOAD
MESSAGE
Dst. UDP
UDP Ln Csum
PAYLOAD
DATAGRAM
PACKET
MAC Dst. MAC Src. MAC L/T PAYLOAD RSN FCS
Integrity and Redundancy FRAME FRAME RSN RSN FCS FCS
26
Sampling and Queuing Receive Ports

Multiple Reads
Application programs Queuing Buffer

Payloads
MSG730
Sampling Buffer
MSG146
MSG1460
MSG146
End System Processes
Net
Frames on the network

MSG1460 MSG730 MSG146
Time
27
Redundancy Management Increases the Availability of the ASL
Network A
Msg. Msg.
Source
Duplication Function Network B
Selection Function
Destination
28
Receive Integrity Checking and Redundancy Management
29
Integrity Checking and Redundancy Management
Port TX
RED Interface
RX Port
Blue Interface
End System ASIC RED Interface BLUE Interface Frame Selected

BAD CRC RSN 0C
RSN 08
RSN 09
RSN 0A
RSN 0B
RSN FD FE
RSN 0E 0F RSN 0E
RSN 10
RSN 08
RSN 09
Frame Lost
RSN 0B
RSN 0C
RSN 0D
RSN 10
RSN 08
RSN 09
RSN 0A
RSN 0B
RSN 0C
RSN 0D
RSN 0E
RSN 10
OLD
NEW Time
30
Host to Host Network

1 2 3 4 5 6 7
007 006 005 004 003
24 23 22
Police
21 20 19 18 17
007 006
Store
8 SWITCH
Host
002 001
9 10 11 12
Forward
16 15 14 13
005 004 003 002 001
Host
24
2 3 4 5 6 7 8 SWITCH 9 10 11 12
23 22
Police
21 20 19 18 17
Store
Forward
16 15 14 13
31
Conclusions
Modifications to Ethernet make it suitable for avionics applications Data flows through an AFDX network on virtual links The principal function of AFDX Switches is frame forwarding and virtual link policing End Systems interface to Hosts using transmit and receive ports AFDX is a redundant network that separates redundancy management from host functions
32
References
1 An Efficient RMS Admission control and its application to Multiprocessor Scheduling, S Lauzac, R Melhem, D. Mosse, 1063-7133/98 2 Real-Time Computing: A New Discipline of Computer Science and Engineering, PROCEEDINGS OF THE IEEE, VOL. 82, NO. I , JANUARY 1994 3 Worst Case Communication Delay of Real-Time Industrial Switched Ethernet With Multiple Levels, Kyung Chang Lee, Suk Lee, Man Hyung Lee. IEEE Transactions on Industrial Electronics, Vol 53, No. 5, October 2006. 4 - Communications for Integrated Modular Avionics, Rick Alena, J. Ossenfort, K. Laws, A. Goforth, F. Figueroa, IEEEAC Paper #1230 5 - Low-latency hard real-time communication over switched ethernet - Real-Time Systems, 2004. ECRTS 2004. Proceedings. 16th Euromicro Conference on Real-Time Systems 6 - Timelines of Real-Time IP Communication in Switched Industrial Ethernet Networks, Tor Skeie, Svein Johannessen, and yvind Holmeide, IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS, VOL. 2, NO. 1, FEBRUARY 2006
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O:\40-Teams\05-CS Architectures\cs-arch-engineering\administrative groups\schons-randy\AFDX Real-time Ethernet

AFDX Real-time Ethernet

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Onlly

Definition of a Real-time System

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

The Needs for AFDX

Ethernet Began As a Shared Media

Poor performance when applied to heavily loaded networks

Proprietary Information For Training Purposes Only

Evolution From the Shared Media Began with the Hub

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Fundamental Elements Within an Ethernet Switch[5]

Frames are queued for transmission

Steps to Switch a Frame

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Multiple Frames To the Same Destination

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Frames Ready to Transmit From the Leftmost Switch Interface

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

The Need for Admission Control

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

The Goals of AFDX

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

AFDX End System and Switch

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Rate Regulation and Frame Construction

Rate Regulation and Frame Construction

005 004 003 002 001

Timestamping and Frame Decomposition

Integrity Checking Integrity Checking

Integrity Checking Integrity Checking

Timestamping and Frame Decomposition

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

AFDX Frame Principals

Port 16 12,13,14 7,8,9,10 11 5 5 1,2,3,4,5

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Virtual Link Principals

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Enforcing BAG Makes the Network Deterministic

Faulted End System

Copyright 2008 Rockwell Collins, Inc. All rights reserved.

Proprietary Information For Training Purposes Only

Ports Connect Host to Network

004 007 006 005

Application PCI BUS