Digital Signal Processing Lab Digital Signal Processing Lab

DIGITAL SIGNAL PROCESSING LAB
TMS320VC6745 Fixed/Floating /Floating-Point Digital Signal Processor
Hardware & Software User Manual
www.pantechsolutions.net
TMS320C6745 Evaluation Board Manual
CONTENTS:
Introduction about TMS320C6745 TMS320C6745 Processor Features Functional Block Diagram Physical Description Kit Peripherals Details o UART o SPI o I2C Applications Software Description Programs
INTRODUCTION AND OVERVIEW

INTRODUCTION: power The C6745/6747 is a Low-power digital signal processor based on C674x DSP core. It consumes significantly lower power than other members of the TMS320C6000 platform of DSPs. The C6745/6747 enables OEMs and ODMs to quickly bring to market devices featuring high processing performance.
The C6745/6747 DSP core uses a two two-level cache-based architecture. The Level 1 program cache based (L1P) is a 32KB direct mapped cache and the Level 1 data cache (L1D) is a 32KB 2 way set-associative 2-way set cache. The Level 2 program cache (L2P) consists of a 256KB memory space that is shared between program and data space. L2 also has a 1024KB ROM. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by other hosts in the s system, an additional 128KB RAM shared memory ( C6747 only) is available for use by other hosts without affecting DSP performance. The peripheral set includes: a 10/100 Mb/s Ethernet MAC (EMAC) with a Management Data Input/output (MDIO) module; two inter ntegrated circuit (I2C) Bus interfaces; 3 multichannel audio inter-integrated serial port (McASP) with 16/9 serializes and FIFO buffers; 2 64-bit general-purpose timers each purpose configurable (one configurable as watchdog); a configurable 16 bit host port interface (HPI) [C6747 only]; 16-bit up to 8 banks of 16 pins of general purpose input/output (GPIO) with programmable interrupt/event general-purpose generation modes, multiplexed with other peripherals; 3 UART interfaces (one with RTS and CTS); 3 enhanced high-resolution pulse width modulator (eHRP resolution (eHRPWM) peripherals; 3 32-bit enhanced capture bit (eCAP) module peripherals which can be configured as 3 capture inputs or 3 auxiliary pulse width modulator (APWM) outputs; 2 32-bit enhanced quadrature pulse (eQEP) peripherals; and 2 external -bit memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower n memories or peripherals, and a higher speed memory interface (EMIFB) for SDRAM.
The Ethernet Media Access Controller (EMAC) provides an efficient interface between the C6745/6747 and the network. The EMAC supports 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps) he TX, and 100 Mbps in either half- or full duplex mode. Additionally an Management Data Input/output full-duplex (MDIO) interface is available for PHY configuration.
The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each of the peripherals, see the related sections later in this document and the associated peripheral reference guides.
ELECTROSTATIC WARNING: The TMS320-C6745 development board is shipped in protective anti static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board.
BOARD USE REQUIREMENTS: CABLES HARDWARE SOFTWARES : : : 1.8 meter USB A cable to connect with USB host. A-B Power supply adapter 4.5 4.5-5VAC. TMS320-JTAG for programming and debugging. JTAG Texas Instr Instruments Code Composer Studio V4 and drivers available on the www.ti.com
TMS320VC6745 FEATURES: :
Highlights:
300 or 200-MHz C674x VLIW DSP MHz TMS320C674x Fixed/Floating Fixed/Floating-Point VLIW DSP Core Enhanced Direct Direct-Memory-Access Controller 3 (EDMA3) 128K-Byte RAM Shared Memory (C6747Only) Byte Two External Memory Interfaces Three Configurable 16550 type UART Modules LCD Controller (C6747 Only) Two Serial Peripheral Interfaces (SPI) Multimedia Card (MMC)/Secure Digital (SD) Two Master/Slave Inter Inter-Integrated Circuit One Host-Port Interface (HPI) (C6747 only) Port USB 1.1 OHCI (Host) With Integrated PHY (USB1) (C6747 Only)
Software Support:
TI DSP/BIOS Chip Support Library and DSP Library 300 or 200-MHz C674x VLIW DSP MHz
C674x Instruction Set Features:

Superset of the C67x+ and C64x+ ISAs 2400/1800 C674x MIPS/MFLOPS Byte-Addressable (8 Addressable (8-/16-/32-/64-Bit Data) 8-Bit Overflow Protection Bit Bit-Field Extract, Set, Clear Field Normalization, Saturation, Bit Bit-Counting Compact 16-Bit Instructions Bit
C674x Two Level Cache Memory Architecture:

32K-Byte L1P Program RAM/Cache Byte 32K-Byte L1D Data RAM/Cache 256K-Byte L2 Unified Mapped RAM/Cache Byte Flexible RAM/Cache Partition (L1 and L2) 1024K-Byte L2 ROM Byte
Enhanced Direct-Memory Memory-Access Controller 3:

2 Transfer Controllers 32 Independent DMA Channels 8 Quick DMA Channels Programmable Transfer Burst Size TMS320C674x Fixed/Floating Fixed/Floating-Point VLIW DSP Core Load-Store Architecture with Non Store Non-Aligned Support 64 General-Purpose Registers (32 Bit) Purpose Six ALU (32-/40 /40-Bit) Functional Units Two Multiply Functional Units
FUNCTIONAL BLOCK DIAGRAM DIAGRAM:
PHYSICAL DESCRIPTIONS
BOARD LAYOUT
The VC6745 Kit is a 100 x 100 cm six (6) layer printed circuit board which is powered with 5V supply. This means this board has require an external power supply.
POWER CONNECTOR:
TMS320C6745 Board can take power from connector (4.5V to 5V) from U7. The board power 7. consumption is around 180 mA with all peripherals and MCU running at full speed. TMS320C6745 has two running Steps down Voltage Regulator 1.2V ( (TP7), 3.3V (TP5). The core Voltage is 1.2V and Peripherals Voltage is V 3.3V. PIN # 1. 2. SIGNAL NAME 5VDC GND
RESET CIRCUIT:
Reset circuit is made with RC group R5 10K and C1 0.001UF. Although on the schematic is made provision for Internal reset. Manual reset is possible by the RST button.
ON BOARD XDS100 EMULATOR INTRFACE:

The USB connector, J1, is used to attach the VC6745 eZDSP stick to a personal computer or laptop. The signals on the pins of this connector are shown below. On-board XDS100 emulator board Provides complete debug capabilities and visibility inside the processor for algorithm optimization and benchmarking.
TARGET CONNECTION and CCS v4 CONFIGURATION INSTRUCTIONS:

1. All XDS100 USB drivers and CCS v drivers are included with the CCS v4 software Installation. v4 2. Connect the included USB cable to a USB port on the host computer, then connect the USB cable to the XDS100. Windows will recognize the new hardware connection and Complete the XDS100 installation automatically. 3. Launch Code Composer Studio v from the shortcut on the desktop. (This was created When CCS v4 v4 was installed.) 4. The Code Composer Studio v window will appear. Click the File menu, then select New-v4 >Target Configuration File 5. The New Target Configuration window will appear. Enter a file name that describes the Emulator connection and/or Texas Instruments processor being used and then click Finish. 6. The Basic configuration setup window will appear. Select Texas Instruments XDS100 USB Emulator from the Connection menu and select the target processor being used From the Device menu. (Refer the demo video video.) 7. Click the Save button to save the configuration 8. Apply power to the target processor board. 9. Click the View menu and select Target Configurations to expose the configuration(s) 10. That have been built or imported. A new tab labeled Target configurations will become 11. Available in the CCS window. 12. Expand the User Defined folder. Right click on the configuration that has been Right-click 13. Created and click Launch Selected Configuration. eated 14. CCS will now attempt to connect to the target processor through the XDS100. 15. Code Composer Studio may now be used to download code and debug code on the 16. Target board.
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SYSTEM LED:
The VC6745 eZDSP USB Stick has one green Light Emitting Diode (LED). This LED is software Controlled via the XF status bit and XF pin on the DSP. External Flag Output. XF is used for signaling other processors in multiprocessor configurations or XF can be used as a fast general-purpose output pin. purpose
DIGITAL INPUTS & OUTPUTS:

A digital input typically consists of a power supply (voltage source), a switch and a voltage voltagesensing device (analog-to-digital converter). Depending on the switchs open/closed status, the sensi digital sensing device detects a voltage or no voltage condition, which in turn generates a logical 0 or 1, on or off, alarm or normal or similarly defined state. The jumper J9 & j7 is used to enable & disable the Digital inputs and outputs.
TEST POINTS:
The VC6745 e ZDSP USB Stick has sixteen (16) test points for the monitoring of signals. The location of the test points are shown in the figure below. The signals on the test points are shown in the table below.
TEST POINTS TP1 TP2 TP3 TP4 TP5
VOLTAGE 1.2 3.3 1.2 3.3 3.3
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KIT PERIPHERALS
UART: The serial communications interface is a two wire asynchronous serial port, commonly known two-wire as UART. On the 28016, the SCI contains a 16 level receive and transmit FIFO for reducing interrupt 16-level servicing overhead. The TMS320C6745 processor provides a full duplex universal asynchronous receiver/transmitter full-duplex (UART) port, which is fully compatible with PC standard UARTs. The UART port provides a simplified UART PC-standard interface to other peripherals or hosts, supporting full full-duplex, asynchronous transfers of serial data. The ous UART port includes support for 5 data bits to 8 data bits, 1 stop bit or 2 stop bits, and none, even, or odd parity. The UART port supports two modes of operation.
PIO (programmed I/O) The processor sends or receives data by writing or reading I/O-mapped data I/O UART registers. The data is double-buffered on both transmit and receive. Rs-232 communication enables buffered 232 point-to-point data transfer. It is commonly used in data Acquisition applications, for the transfer of data point between the c5505 Processor and a PC.
The voltage levels of a TMS320C5505 Processor and PC are not directly compatible with those of RS-232, a level transition buffer such as MAX3222 be used. 232, Rs-232(P1) is a female connector. The 2nd and 3rd pin of P1 is receiving and transmitting pin 232(P1) ng for transferring the data as shown in fig .
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GENRAL PURPOSE INPUTS &OUTPUTS: GPIO MUX: The GPIO Mux registers are used to select the operation of shared pins on the c674XX and The operation c674X pins can be individually selected to operate as Digital I/O or connected to Peripheral I/O signals (via the GPxMUX registers).If selected for Digital I/O mode, registers are provided to configure the pin direction (via the GPxDIR registers) and to qualify the input signal to remove unwanted noise (via the GPxQUAL) registers). TMS320C6745 has 30 general purpose I/O lines. The J4, J11 Connectors like PORT A, PORT B. ADC: bit The VC5505 includes a 10-bit SAR ADC using a switched capacitor architecture which converts an analog input signal to a digital value at a maximum rate of 62.5 k samples per second (ksps) for use by 62.5-k the DSP. This SAR module supports six channels that are connected to four general purpose analog pins (GPAIN [3:0]) which can be used as general purpose outputs.
SERIAL PORT INTERFACE (SPI): The VC5505 serial port interface (SPI) is a high speed synchronous serial input/output port that high-speed allows a serial bit stream of programmed length (1 to 32 bits) to be shifted into and out of the device at a programmed bit-transfer rate. The SPI supports mul chip operation of up to four SPI slave devices. The transfer multi-chip SPI can operate as a master device only, slave mode is not supported. The SPI is normally used for communication between the DSP and external peripherals. Typical applications include an interface to external I/O or peripheral expansion via devices such as shift registers, display drivers, SPI EEPROMs, and xternal analog-to-digital converters. THE SPI HAS THE FOLLOWING FEATURES: Programmable divider for serial data clock generation. Four pin interface (SPI_CL SPI_CSn, SPI_RX, and SPI_TX). (SPI_CLK, Programmable data length (1 to 32 bits). 4 external chip select signals. Programmable transfer or frame size (1 to 4096 characters).
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Optional interrupt generation on character completion. Programmable SPI_CSn to SPI_TX delay from 0 to 3 SPI_CLK cycles. delay Programmable signal polarities. Programmable active clock edge. Internal loopback mode for testing. In this board we are using M95512 512kbit serial spi bus eeprom.It is Compatible with SPI Bus Serial 95512 Interface with positive clock modes. Power supply is 2.5 to 5.5V for M95512 W, 1.8 to 5.5V for M95512M95512-W, M95512 R. These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 65536 x 8 bit. compatible During all operations, VCC must be held stable and within the specified valid range: VCC (min) to VCC perations, (max). All of the input and output signals must be held High or Low (according to voltages of VIH, VOH, VIL or VOL). These signals are described next. Serial Data Output (Q). This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of Serial Clock (C). Serial Data Input (D). This input signal is used to transfer data serially into the device. It receives instructions, addresses, and receives the data to be written. Values are latched on the rising edge of Serial Clock (C). Serial Clock (C). This input signal provides the timing of the serial interface. Instructions, addresses, or data present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data Input on Serial Data Output (Q) changes after the falling edge of Serial Clock (C). Chip Select (S). When this input signal is High, the device is deselected and Serial Data Output C (Q) is at high impedance. Unless an internal Write cycle is in progress, the device h will be in the Standby Power mode. Driving Chip Select (S) Low selects the device, placing it in the Active Power mode. After Power up, a falling edge on Chip Select (S) is required prior Power-up, pri to the start of any instruction. Hold (HOLD). The Hold (HOLD) signal is used to pause any serial communications with the device without deselecting the device. During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data Input (D) and Serial Clock (C) are Dont Care. To start the Input Hold condition, the device must be selected, with Chip Select (S) driven Low.
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Write Protect (W). The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status Register).This pin must be driven either High or Low, and must be stable during all write instructions.
I2CSPI EEPROM: integrated module The inter-integrated circuit (I2C) module provides an interface between VC5505 and other devices compliant with Philips Semiconductors Inter bus (I2C-bus) specification version 2.1. External Inter-IC bus) components attached to this 2-wire serial bus can transmit/receive 2 to 8 bit data to/from the DSP wire 8-bit DS through the I2C module. The I2C port does not support CBUS compatible devices. The I2C port supports the following features: o o o o o o o o Compatible with Philips I2C Specification Revision 2.1 (January 2000) Data Transfer Rate from 10 kbps to 400 kbps (Philips Fast-Mode Rate) Mode Noise Filter to Remove Noise 50 ns or Less Seven- and Ten-Bit Device Addressing Modes Master (Transmit/Receive) and Slave (Transmit/Receive) Functionality One Read DMA Event and One Write DMA Event, which can be used by the DMA Controller One Interrupt that can be used by the CPU ne Slew-Rate Limited Open Rate Open-Drain Output Buffers
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The I2C module clock must be in the range from 6.7 MHz to 13.3 MHz This is necessary for proper. Operation of the I2C module. With the I2C module clock in this range, the noise filters on the SDA and SCL pins suppress noise that has a duration of 50 ns or shorter. The I2C module clock is derived from the DSP clock divided by a programmable prescaler.
APPLICATIONS:
Industrial Control USB, Networking High-Speed Encoding Professional Audio
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SOFTWARE DESCRIPTION:
CCS v4 is a major new release of Code Composer Studio that is based on the Eclipse open source software framework. The Eclipse software framework was originally developed as a development tool primarily for Java application development and an open framework for creating development tools. It is becoming very popular in the embedded development community and is now being used or adopted by many different vendors. Code Composer streamlines the design process with a more intuitive interface process combined with leading C code density and powerful debugging capabilities. Major upgrades include optimizations and improvements focused on improving design flow, simplifying debugging and verification and speeding time-to-market while keeping system costs low. market
Key New Features

New functionality Code Composer Studio includes:
Emulation Driversincluded some third-party emulation drivers in the installation. Essentially included party those emulators that are sold through the TI eStore will have their drivers on the CD to make will things easier for initial installation. The drivers for DSKs are also present.
Migrating Existing Projects CCSv4 is a major release and as a result it is quite different from ProjectsCCSv4 previous versions. Therefore there are some migration steps that you need to go through to some move your development from previous versions to v4. There are some tools to help you, such as the project import wizard. The overall environment is much different so you will need to patiently adjust to it.
CCS v3.3 ProjectsCCSv4 uses the Eclipse concept of projects. To help you import your existing CCSv4 projects into CCSv4 we have created a project import wizard. Use the Project > Import Legacy CCSv3.3 Project menu command. This starts a wizard that guides you through the conversion process. If you don't want to convert your projects at this time, you may want to create a standard make project that calls timake to build your existing project file.
CCE v3 ProjectsCCSv4 and CCEv3.x projects are very similar. Please use Project -> Import CCSv4 Existing CC/CCE Eclipse projects menu.
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Target Configuration and Setup Editor New target configuration files may be created from EditorNew f Target-> New Target Configuration menu. If you have a project selected in C/C++ project view, > then target configuration wizard will use that project as the location where to create this file. User may adjust it. Alternatively, target configuration files are created in default location. If files target configuration file is added to the project, then it will be automatically used by the debugger when the Debug Active Project action is selected. Setup Editor allows users to create target configuration files using basic tab where simplified selection are available (i.e. select using connection and board/device). Setup Editor may also be used to configure target settings from scratch using Advanced tab in Setup Editor. One of these configurations can be designated as your Default Target Configuration using Target Configuration View (View->Target Configuration) >Target
Real-time Analysistransfers DSP/BIOS (and user defined) logs to provide a pattern of a transfers user-defined) processor's kernel task execution and resource usage. Once the logs are tra transferred from the target to the host, you can display graphs of Task Interaction over time, CPU Usage, CPU Load on a Task basis, and the System Execution States. A control panel helps you select which logs you want to collect, transfer, and display.
Profiling and Code Coverage ing Coverageperform function-level and source line (within a function) level profiling. User can sort functions by name or percentage of time usage in the display viewer. Profiling data from multiple runs can be displayed. Displays produced include Fun Function Level Profile, Application Level Profiling, and Code Coverage analysis tables.
Memory View changesenable viewing different levels of memory. That is, inspect the contents enable of the L1P cache, L1D, L2, and so forth. On devices that support MMU (Memory M Management Units, such as OMAP35xx) users need to display and edit virtual memory data. For devices that support multiple memory pages, users need to edit and display memory on different pages. Memory view permits the user to configure the data format, precision, endianness, and data precision, type appropriate for your application.
GEL (General Extension Language) GEL is still present in CCSv4. GEL is the expression evaluator Language)GEL used by the CCS debugger. Each location where you enter in a start address, variable name, or condition on a breakpoint it is using GEL to evaluation that expression. (Changes) In CCSv4 GEL has changed to be part of the CCS debugger and not the top level user interface, you can not run some of the old GEL functions that accessed the user interface such as GEL_WatchAdd() or the project related functions. However debug related functions still work. Hotmenu items defined in
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GEL scripts are visible under "Scripts" menu, they are visible after debugger is started and are sensitive to processor selected in Debug View. i.e. in multi-processor scenario to see ARM GEL processor menu's user would need to select ARM processor in Debug View.
Increased ease-of-usestreamlined options dialog boxes reduce the number of steps required streamlined for commonly performed design tasks.
High-performance debugger replaces the GDB debugger with the TI Debug Server yields up to performance debuggerreplaces 200 percent faster performance for tasks such as downloading applications, single single-stepping, and refreshing registers and variables.
Updated C-code syntaxhelps developers to directly import code without modification, from helps developers the rich diversity of code examples, libraries and demos from TI and TI third parties.
Language flexibleprogramming languages supported include assembly, C, and C++. programming
Creating a new CCS Project Project:

This procedure helps you to create single or multiple new CCS Projects (multiple projects be open simultaneously). Each project in the workspace must have a unique name. can
1. Start Code Composer Studio from the
desktop shortcut.
2. Select File > New > CCS Project action from the Workbench main menu. 3. When the New CCS Project wizard displays, type the Project name. You can optionally de-select . de the Use default location check box and set the project storage location. By default, the project will be created inside the workspace directory. Click Next.
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4.
Select the desired platform ( sired (Project Type) and Configuration. Click Next.
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5.
Optionally, define any inter-project dependencies and select type of project indexing ( project (Full, Fast, or
None). Click Next.
6.
Select your project settings, including selecting the Device Variant for your project. Use the dropdrop
down selection list or click More... to search through available devices using a filter. Click Finish.
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The new project displays in the C/C++ Projects view and is set as the currently active project. view
After creating the project, create your source files, set object libraries using the project Properties dialog, and add or link other files into the project.
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7. To build your project, click the Build Activ Project button on the main Workbench toolbar ( Active
).
8. To launch a debug-session and download your application onto the target device, click the Debug session button on the main Workbench toolbar ( )
Building Your Project

Now that you have created a functional project, you can build it. 1. Select the Project > Build All menu action to build all the projects in your workspace. 2. The project should build successfully. The Console View displays the standard and error outputs of the code-generation tools. When the build is finished, the Problems View displays any errors generation or warnings. 3. After the project builds successfully, you can launch a debug session and load the program onto debug-session the target. If you need to load the program manually, select Target > Load Program. Code Program Composer creates a subdirectory for the currently active build configuration (Debug or Release) r build-configuration within your project directory and stores the .out file in it. Alternatively, you can launch a debug debug-session using the Debug Active Project toolbar button, and Code Composer will automatically perform an incremental build of your project before starting the debug poser debugsession. Debug Active Project is a single action that builds a project and launches the debugger using target configuration information contained in the project project. 4. You will automatically be taken to the Debug perspective. To manually switch to the Debug
perspective, select the Debug icon in the far right of the Code Composer window, or by selecting Window > Open Perspective > Debug Debug. Note: Remember to reload the pro : program by choosing Target > Load Program if you rebuild the project after making changes.
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There are several options available for building projects:
Full Builds re-build and re build re-link all the source-files. Select Project > Rebuild Active Project ( to re-build the currently active project, or Project > Rebuild All ( build projects in the workspace.
) to re-build all the open
Incremental Builds build and re re-link only the source-files that were modified since last build. files Select Project > Build Active Project ( All ( ) to build the currently active project, or Project > Build
) to build all the open projects in the workspace.
Build automatically performs an incremental build automatically whenever any source source-files or relevant header-files are saved. files
Procedure for ADD Existing Project:

Open CCS Software Go to Project menu Add existing project Browse folder, select the folder Which contains the all the programs
Then go to view menu click view CCS projects Set any one of the project as an active project Then set target configuration Debug the program Run the coding See the output
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1. Linear Convolution of the two given sequences
THEORY: Convolution is a formal mathematical operation, just as multiplication, addition, and integration. Addition takes two numbers and produces a third number, while convolution takes two signals and r, produces a third signal. Convolution is used in the mathematics of many fields, such as probability and l. statistics. In linear systems, convolution is used to describe the relationship between three signals of interest: the input signal, the impulse response, and the output signal.
In this equation, x1(k), x2(n-k) and y(n) represent the input to and output from the system at time n. k) Here we could see that one of the inputs is shifted in time by a value every time it is multiplied with the other input signal. Linear Convolution is quite often used as a method of implementing filters of various method types.
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Program:
#include<stdio.h> main () { int m=4; /*Lenght of i/p samples sequence*/ int n=4; /*Lenght of impulse response Co efficients */ Co-efficients int i=0,j; int x[10]={1,2,3,4,0,0,0,0}; /*Input Signal Samples*/ int h[10]={1,2,3,4,0,0,0,0}; /*Impulse Response Co efficients*/ Co-efficients*/ /*At the end of input sequences pad 'M' and 'N' no. of zero's*/ int *y; y=(int *)0x0000100; for(i=0;i<m+n-1;i++) 1;i++) { y[i]=0; for(j=0;j<=i;j++) y[i]+=x[j]*h[i y[i]+=x[j]*h[i-j]; } for(i=0;i<m+n for(i=0;i<m+n-1;i++) printf("%d printf("%d\n",y[i]); }
Output:
1, 4, 10, 20, 25, 24, 16.
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Hardware Output
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MATLAB program for linear convolution convolution:

%linear convolution program clc; clear all; close all; disp('linear convolution program'); x=input('enter i/p x(n):'); m=length(x); h=input('enter i/p h(n):'); n=length(h); x=[x,zeros(1,n)]; subplot(2,2,1), stem(x); title('i/p sequence x(n)is:'); xlabel('---->n'); ylabel('---->x(n)');grid; >x(n)');grid; h=[h,zeros(1,m)]; subplot(2,2,2), stem(h); title('i/p sequence h(n)is:'); xlabel('---->n'); ylabel('---->h(n)');grid; >h(n)');grid; disp('convolution of x(n) & h(n) is y(n):'); y=zeros(1,m+n-1); for i=1:m+n-1 y(i)=0; for j=1:m+n-1 if(j<i+1) y(i)=y(i)+x(j)*h(i-j+1); j+1); end end end y subplot(2,2,[3,4]),stem(y); title('convolution of x(n) & h(n) is :'); xlabel('---->n'); ylabel('---->y(n)');grid; >y(n)');grid;
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Matlab Output
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2. Circular convolution of two sequences

THEORY
Circular convolution is another way of finding the convolution sum of two input signals. It resembles the linear convolution, except that the sample values of one of the input signals is folded and right shifted before the convolution sum is found. Also note that circular convolution could also be found by taking the DFT of the two input signals and finding the product of the two frequency domain signals. two The Inverse DFT of the product would give the output of the signal in the time domain which is the circular convolution output. The two input signals could have been of varying sample lengths. But we take the DFT of higher point, which ever signals levels to. t, For eg. If one of the signals is of length 256 and the other spans 51 samples, then we could only take 256 point DFT. So the output of IDFT would be containing 256 samples instead of 306 samples, which follows N1+N2 1 where N1 & N2 are the lengths 256 and 51 respectively of the two inputs. Thus here the output which should have been 306 samples long is fitted into 256 samples. The 256 points end up being a distorted version of the correct signal. This process is called circular convolution. circular
Program:
#include<stdio.h> int m,n,x[30],h[30],y[30],i,j,temp[30],k,x2[30],a[30]; void main() { int * y; y=(int *)0x0000100; printf(" enter the length of the first sequence\n"); sequence\ scanf("%d",&m); printf(" enter the length of the second sequence\n"); sequence scanf("%d",&n); printf(" enter the first sequence sequence\n"); for(i=0;i<m;i++) scanf("%d",&x[i]); printf(" enter the second sequence sequence\n"); for(j=0;j<n;j++) scanf("%d",&h[j]);
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if(m-n!=0) /*If length of both sequences are not equal*/ n!=0) { if(m>n) /* Pad the smaller sequence with zero*/ { for(i=n;i<m;i++) h[i]=0; n=m; } for(i=m;i<n;i++) x[i]=0; m=n; } y[0]=0; a[0]=h[0]; for(j=1;j<n;j++) /*folding h(n) to h( h(-n)*/ a[j]=h[n a[j]=h[n-j]; /*Circular convolution*/ for(i=0;i<n;i++) y[0]+=x[i]*a[i]; for(k=1;k<n;k++) { y[k]=0; /*circular shift*/ for(j=1;j<n;j++) x2[j]=a[j x2[j]=a[j-1]; x2[0]=a[n x2[0]=a[n-1]; for(i=0;i<n;i++) { a[i]=x2[i]; y[k]+=x[i]*x2[i]; } } /*displaying the result*/ printf(" the circular convolution is\n"); is\ for(i=0;i<n;i++) printf("%d ",y[i]); }
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Output:
enter the length of the first sequence 4 enter the length of the second sequence 4 enter the first sequence 4321 enter the second sequence 1111 the circular convolution is 10 10 10 10
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MATLAB program for circular convolution program

clc; clear all; close all; disp('circular convolution program'); x=input('enter i/p x(n):'); m=length(x); h=input('enter i/p sequence h(n)'); n=length(h); subplot(2,2,1), stem(x); title('i/p sequencce x(n)is:'); xlabel('---->n'); >x(n)');grid; ylabel('---->x(n)');grid; subplot(2,2,2), stem(h); title('i/p sequencce h(n)is:'); xlabel('---->n'); ylabel('---->h(n)');grid; >h(n)');grid; disp('circular convolution of x(n) & h(n) is y(n):'); if(m-n~=0) if(m>n) h=[h,zeros(1,m-n)]; n=m; end x=[x,zeros(1,n-m)]; m=n; end y=zeros(1,n); y(1)=0; a(1)=h(1); for j=2:n a(j)=h(n-j+2); end %ciruclar conv for i=1:n y(1)=y(1)+x(i)*a(i); end for k=2:n y(k)=0; % circular shift for j=2:n x2(j)=a(j-1); end
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x2(1)=a(n); for i=1:n if(i<n+1) a(i)=x2(i); y(k)=y(k)+x(i)*a(i); end end end y subplot(2,2,[3,4]),stem(y); title('convolution of x(n) & h(n) is:'); xlabel('---->n'); ylabel('---->y(n)');grid; >y(n)');grid;
Output:
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3. N-point DFT of a given sequence

THEORY
Discrete Fourier Transform: The Discrete Fourier Transform is a powerful Computation tool which allows us to evaluate the Fourier Transform X(ej) on a digital Computer or specially designed digital hardware. Since X(ej) is continuous and periodic, the DFT is obtained by sampling one period of , the Fourier Transform at a finite Number of frequency points. Apart from determining the frequency content of a signal, DFT is used to perform linear filtering operations in the frequency domain. The sequence of N complex numbers x0,..., xN1 is transformed into the sequence of N 0,..., Complex numbers X0... XN1 by the DFT according to the formula: 1
Program :
#include <stdio.h> #include <math.h> #define N 4 //number of data values float pi = 3.1416; short x[N] = {1,1,0,0}; //1 //1-cycle cosine float out[2] = {0,0}; //initialize Re and Im results void dft(short *x, short k, float *out) //DFT function { float sumRe = 0; //initialize real component float sumIm = 0; //initialize imaginary component int i = 0; float cs = 0; //initialize cosine component float sn = 0; //initialize sine component for (i = 0; i < N; i++) //for N N-point DFT { cs =cos(2*pi*(k)*i/N); //real component sn = sin(2*pi*(k)*i/N); //imaginary component sumRe = sumRe + x[i]*cs; //sum of real components sumIm = sumIm - x[i]*sn; //sum of imaginary components
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} out[0] = sumRe; //sum of real components out[1] = sumIm; //sum of imaginary components printf("%f %f\n",out[0],out[1]); n",out[0],out[1]); } void main() { int j; for (j = 0; j < N; j++) dft(x, j, out); //call DFT function }
Output:
2.000000 0.000000 0.999996 -1.000000 0.000000 0.000007 1.000011 1.000000
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PROGRAM:
%MATLAB Program to find Fast Fourier Transform clc; clear all; close all; tic; x=input('enter the sequence'); n=input('enter the length of fft'); %compute fft disp('Fourier transformed signal'); X=fft(x,n) subplot(1,2,1);stem(x); title('i/p signal'); xlabel('n --->'); ylabel('x(n) -->');grid; >');grid; subplot(1,2,2);stem(X); title('fft of i/p x(n) is:'); xlabel('Real axis --->'); >'); ylabel('Imaginary axis --->'); grid;
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Matlab Output
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4. To verify FIR filters.

THEORY:
A Finite Impulse Response (FIR) filter is a discrete linear time invariant system whose output is time-invariant based on the weighted summation of a finite number of past inputs. An FIR transversal filter structure can be obtained directly from the equation for discrete discrete-time convolution.
In this equation, x(k) and y(n) represent the input to and output from the filter at time n. h(n is h(n-k) the transversal filter coefficients at time n. These coefficients are generated by using FDS (Filter Design Software or Digital filter design package). er FIR filter is a finite impulse response filter. Order of the filter should be specified. Infinite response is truncated to get finite impulse response. Placing a window of finite length does this. Types of windows available are Rectangular, Barlett, Hamming, Hanning, Black mann windowetc. This FIR filter is ngular, an all zero filter.
Program
#include<stdio.h> #include<math.h> #define pi 3.1415 int n,N,c; float wr[64],wt[64]; void main() { printf("\n enter no. of samples,N= :"); n scanf("%d",&N); printf("\n enter choice of window function n 1.rect \n 2. triang n function\n \n c= :"); scanf("%d",&c); printf("\n elements of window function are:"); n switch(c) {
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case 1: for(n=0;n<=N-1;n++) 1;n++) { wr[n]=1; printf(" \n wr[%d]=%f",n,wr[n]); n } break; case 2: for(n=0;n<=N-1;n++) 1;n++) { wt[n]=1-(2*(float)n/(N (2*(float)n/(N-1)); printf("\n wt[%d]=%f",n,wt[n]); n } break; } }
Hardware Output
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Matlab PROGRAM:
% MATLAB program for FIR filter design using window techniques clc; clear all; close all; rp=input('enter passband ripple'); rs=input('enter the stopband ripple'); fp=input('enter passband freq'); fs=input('enter stopband freq'); f=input('enter sampling freq '); wp=2*fp/f; ws=2*fs/f; num=-20*log10(sqrt(rp*rs)) 20*log10(sqrt(rp*rs))-13; dem=14.6*(fs-fp)/f; n=ceil(num/dem); n1=n+1; if(rem(n,2)~=0) n1=n; n=n-1; end c=input('enter your choice of window function 1. rectangular triangular 3.kaiser: \n '); n if(c==1) y=rectwin(n1); disp('Rectangular window filter response'); end if (c==2) y=triang(n1); disp('Triangular window filter response'); end if(c==3) y=kaiser(n1); disp('kaiser window filter response'); end
2.
%LPF
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b=fir1(n,wp,y); [h,o]=freqz(b,1,256); m=20*log10(abs(h)); subplot(2,2,1);plot(o/pi,m); title('LPF'); ylabel('Gain in dB-->'); >'); xlabel('(a) Normalized freq frequency-->'); %HPF b=fir1(n,wp,'high',y); [h,o]=freqz(b,1,256); m=20*log10(abs(h)); subplot(2,2,2);plot(o/pi,m); title('HPF'); ylabel('Gain in dB-->'); >'); xlabel('(b) Normalized frequency frequency-->'); %BPF wn=[wp ws]; b=fir1(n,wn,y); [h,o]=freqz(b,1,256); m=20*log10(abs(h)); subplot(2,2,3);plot(o/pi,m); title('BPF'); ylabel('Gain in dB-->'); >'); xlabel('(c) Normalized frequency frequency-->'); %BSF b=fir1(n,wn,'stop',y); [h,o]=freqz(b,1,256); m=20*log10(abs(h)); subplot(2,2,4);plot(o/pi,m); title('BSF'); ylabel('Gain in dB-->'); >'); xlabel('(d) Normalized frequency frequency-->');
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5. To verify IIR filters.

THEORY: The IIR filter can realize both the poles and zeroes of a system because it has a rational transfer function, described by polynomials in z in both the numerator and the denominator:
The difference equation for such a system is described by the following:
M and N are order of the two polynomials. bk and ak are the filter coefficients. This filter Coefficients are generated using FDS (Filter Design software or Digital Filter design package). IIR filters can be expanded as infinite impulse response filters. In designing IIR filters, cutoff frequencies of the filters should be mentioned. The order of the filter can be estimated using butter worth polynomial. Thats why the filters are named as butter worth filters. Filter coefficients can be found and the response s can be plotted.
Program
#include<stdio.h> #include<math.h> int i,w,wc,c,N; float H[100]; float mul(float, int); void main() { printf("\n enter order of filter "); n scanf("%d",&N); n printf("\n enter the cutoff freq "); scanf("%d",&wc); printf("\n enter the choice for IIR filter 1. LPF 2.HPF "); n
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scanf("%d",&c); switch(c) { case 1: for(w=0;w<100;w++) { H[w]=1/sqrt(1+mul((w/(float)wc),2*N)); printf("H[%d]=%f\n",w,H[w]); n",w,H[w]); } break; case 2: for(w=0;w<=100;w++) { H[w]=1/sqrt(1+mul((float)wc/w,2*N)); printf("H[%d]=%f\n",w,H[w]); n",w,H[w]); } break; } } float mul(float a,int x) { for(i=0;i<x-1;i++) a*=a; return(a); }
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Matlab PROGRAM:
% % MATLAB program for IIR filters LPF & HPF design clc; clear all; close all; disp('enter the IIR filter design specifications'); rp=input('enter the passband ripple'); rs=input('enter the stopband ripple'); wp=input('enter the passband freq'); ws=input('enter the stopband freq freq'); fs=input('enter the sampling freq'); w1=2*wp/fs;w2=2*ws/fs; [n,wn]=buttord(w1,w2,rp,rs,'s'); c=input('enter choice of filter 1. LPF 2. HPF \n '); if(c==1) disp('Frequency response of IIR LPF is:'); [b,a]=butter(n,wn,'low','s'); end if(c==2) disp('Frequency response of IIR HPF is:'); ency [b,a]=butter(n,wn,'high','s'); end w=0:.01:pi; [h,om]=freqs(b,a,w); m=20*log10(abs(h)); an=angle(h); figure,subplot(2,1,1);plot(om/pi,m); title('magnitude response of IIR filter is:'); xlabel('(a) Normalized freq. -->'); ylabel('Gain in dB-->'); >'); subplot(2,1,2);plot(om/pi,an); title('phase response of IIR filter is:'); xlabel('(b) Normalized freq. -->'); ylabel('Phase in radians radians-->');
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6. Power spectral density

PROGRAM: %MATLAB Program to find Power spectral density t = 0:0.001:0.6; x = sin (2*pi*50*t)+sin(2*pi*120*t); 2*pi*50*t)+sin(2*pi*120*t); y = x + 2*randn(size(t)); figure, plot (1000*t(1:50),y(1:50)) 1000*t(1:50),y(1:50)) title('Signal Corrupted with Zero Zero-Mean Random Noise') xlabel('time (milliseconds)'); Y = fft(y,512); %The power spectral density, a measurement of the energy at various frequencies, is: Pyy = Y.* conj(Y) / 512; f = 1000*(0:256)/512; figure, plot(f,Pyy(1:257)) title('Frequency content of y'); xlabel('frequency (Hz)');
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7. SUM OF SINUSOIDAL SIGNALS

PROGRAM:
% MATLAB Program to find sum of sinusoidal signals clc; clear all; close all; tic; %giving linear spaces t=0:.01:pi; % t=linspace(0,pi,20); %generation of sine signals y1=sin(t); y2=sin(3*t)/3; y3=sin(5*t)/5; y4=sin(7*t)/7; y5=sin(9*t)/9; y = sin(t) + sin(3*t)/3 + sin(5*t)/5 + sin(7*t)/7 + sin(9*t)/9; plot(t,y,t,y1,t,y2,t,y3,t,y4,t,y5); legend('y','y1','y2','y3','y4','y5'); title('generation of sum of sinusoidal signals');grid; ylabel('---> Amplitude'); > xlabel('---> t'); toc;
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TMS320VC6745 Fixed/Floating /Floating-Point Digital Signal Processor

Hardware & Software User Manual

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INTRODUCTION AND OVERVIEW

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

C674x Instruction Set Features:

TMS320C6745 Evaluation Board Manual

C674x Two Level Cache Memory Architecture:

Enhanced Direct-Memory Memory-Access Controller 3:

TMS320C6745 Evaluation Board Manual

FUNCTIONAL BLOCK DIAGRAM DIAGRAM:

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

ON BOARD XDS100 EMULATOR INTRFACE:

TMS320C6745 Evaluation Board Manual

TARGET CONNECTION and CCS v4 CONFIGURATION INSTRUCTIONS:

TMS320C6745 Evaluation Board Manual

DIGITAL INPUTS & OUTPUTS:

TEST POINTS TP1 TP2 TP3 TP4 TP5

VOLTAGE 1.2 3.3 1.2 3.3 3.3

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

Key New Features

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

Language flexibleprogramming languages supported include assembly, C, and C++. programming

Creating a new CCS Project Project:

1. Start Code Composer Studio from the

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

None). Click Next.

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

Building Your Project

TMS320C6745 Evaluation Board Manual

There are several options available for building projects:

) to re-build all the open

) to build all the open projects in the workspace.

Procedure for ADD Existing Project:

TMS320C6745 Evaluation Board Manual

1. Linear Convolution of the two given sequences

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

MATLAB program for linear convolution convolution:

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

2. Circular convolution of two sequences

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

MATLAB program for circular convolution program

TMS320C6745 Evaluation Board Manual

TMS320C6745 Evaluation Board Manual

3. N-point DFT of a given sequence