Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
2004. 09. 26
Sang Lyul Min
Seoul National University
&
Samsung Electronics
Agenda
Overview of Portable Storage Technologies
Techniques for High Performance
Techniques for Low Power
Conclusions
1
Portable Storage Applications
IBM Hitachi
Samsung
Toshiba
Hitachi Seagate
Portable Storage
SanDisk
LexarMedia
2
Cost Comparison
$399.95 (2004.8)
$299.88 (2004.8)
$259.88 (2004.8)
Source: http://www.hitachigst.com/hdd/technolo/overview/chart03.html
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2i ………
pages … … …
~ 25 us ~ 2 ms
~ 300 us
3
FTL (Flash Translation Layer)
Definition
Software layer that makes flash memory appear to the system like
a disk drive
Challenges in FTL
Asymmetry in read and write speeds
0 1 N -1
Operations
1. Identify drive(): returns N
2. Read sectors(start sector #, # of sectors)
3. Write sectors(start sector #, # of sectors)
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Block level mapping
Logical blocks
0 1 N -1
Sectors …
256 sectors
Logical … … …
blocks
0 N / 256
… … … … … …
0 1 L Block mapping table
(map block)
… … … …
Physical blocks
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5
Read procedure
Ex. read 3 sectors from 255
Logical blocks
… … … … … …
0 1 L Block mapping table
(map block)
… … … R R R …
Physical blocks
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… … … …
… W W W … …
Write buffer blocks
Still,
3.update
2.
1. Write
Erase ofdata
mapping
Fill remaining
write information
pages
buffer
datablocks
pagesis needed
for data
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6
Write procedure (Map block update)
Ex. write 3 sectors from 255
… … … … … …
0 1 L Block mapping table
(map block)
… … … …
… W W W … W …
Write buffer blocks
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CPU
SRAM/DRAM
core
System Bus
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7
Host Interface Performance
Transfer Rate (MB/s)
800 SAS6Gbps
700
S-ATA3
600
500
IEEE
SAS3Gbps 1394b
400
Ultra320 SCSI
S-ATA2
300
IEEE
1394b
200 Ultra160 SCSI S-ATA1
IEEE
IEEEUltra Ultra2 SCSI 1394b
100 U-ATA66
USB 2.0
1394a
SCSI U-ATA33
SCSI-1 SCSI-2 SCSI-3 ATA2
ATA1 USB 1.1
0
86
87
88
89
90
91
92
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98
99
00
01
02
03
04
05
06
07
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ATA SCSI SERIAL
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Source: http://www.hitachigst.com/hdd/technolo/overview/chart01.html
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HDD Internal Data Rate
Source: http://www.hitachigst.com/hdd/technolo/overview/chart16.html
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CPU
SRAM
core
System Bus
Flash Bus
Host Flash
Interface Interface
USB, PCMCIA, SATA
Flash Chips
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9
Flash Chip Bandwidth
Write bandwidth = 2KB/300us = 6.7MB/s per chip
Read bandwidth = 2KB/25us = 80MB/s per chip
Erase bandwidth = 128KB/2ms = 64MB/s per chip
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Source: Terry Lee, Micron Technology, Inc, VTF (VIA Technology Forum) 2003
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10
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Agenda
Overview of Portable Storage Technologies
Techniques for High Performance
Techniques for Low Power
Conclusions
22
11
Techniques for High Performance
Flash Drive
CPU
SRAM
core
System Bus
Flash Chips
Multiple logical
chips in a single
packaging
(multi-banking)
23
Source: http://www.hitachigst.com/hdd/technolo/overview/chart19.html
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12
Agenda
Overview of Mobile Storage Technologies
Techniques for High Performance
Techniques for Low Power
Conclusions
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The Love Part: HDD+Flash Combo
HDD with
reduced
+ = power consumption
and start-up time
27
Source: Clark Nicholson, “Improved Disk Drive Power Consumption Using Solid State Non-Volatile Memory”, WinHEC2004.
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14
HDD+Flash Combo Block Diagram
CPU
SRAM
core
System Bus
Flash Bus
Host Flash
Interface Interface
SATA
Flash Chip
Platters
29
Pavg with Flash write buffer and “Longhorn” kernel = 0.25W (calculated)
Toff = 600s @ .18W
Ton = 18s @ 2.5W
Ton = spin up time (5s) + Flash buffer flush time (13s)
Source: Clark Nicholson, “Improved Disk Drive Power Consumption Using Solid State Non-Volatile Memory”, WinHEC2004.
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Key Considerations
1. Correctness: should preserve the semantics of HDD
2. Fault tolerance and graceful degradation: should operate
correctly despite partial/total failure in flash memory
3. Power efficiency: should reduce the power consumption
as much as possible
4. Reliability: should improve the reliability as much as
possible
5. Performance: should improve the user-perceived
performance as much as possible
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Agenda
Overview of Poratble Storage Technologies
Techniques for High Performance
Techniques for Low Power
Conclusions
32
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Conclusions
In the animal world
Survival of the fittest
?
Volatile Non-volatile
Fastest SRAM FRAM?
Cheapest DRAM NAND Flash
HDD
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Conclusions
From the history
Clock Rate 80 ns 60 ns
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The Ultimate Limit – Micro Drive
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B/L Direction
200nm
W/L Direction
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Announcement
IWSSPS 2005: International Workshop on Software
Support for Portable Storage
Date: March 6, 2005
Place: San Francisco, USA (along with IEEE RTAS 2005
and Embedded System Conference 2005)
Important Dates:
Paper Submission: December 15th 2004
Notification of Acceptance: January 15th 2005
Camera-ready due: February 15th 2005
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