2.

4kW Unity Power Factor Rectifier

Matthew Douglas

School of Information Technology and Electrical Engineering

2.4kW Unity Power Factor Rectifier

By Matthew Douglas
School of Information Technology and Electrical Engineering University of Queensland

Submitted for the Degree of Bachelor of Engineering (Honours) In the division of Electrical Engineering October 2003

2.4kW Unity Power Factor Rectifier

Matthew Douglas

Matthew Douglas 22nd October 2003 Head School of Information Technology and Electrical Engineering The University of Queensland St Lucia QLD 4072 Dear Professor Simon Kaplan, In accordance, with the requirements of the Degree of Bachelor of Electrical Engineering in the school of Information Technology and Electrical Engineering, I present the following thesis entitled A 2.4kW Unity Power Factor Rectifier. This work was performed under the supervision of Dr Geoff Walker. I declare that the work submitted in this thesis is my own work, except as acknowledged in the text, and has not previously been submitted for a degree at the University of Queensland or any other institution.

Yours sincerely,

Matthew Douglas

2.4kW Unity Power Factor Rectifier

Matthew Douglas

Acknowledgements
I would like to thank the following people for their valuable assistance during the year: Dr Geoff Walker, for his supervision and on his ongoing assistance throughout the year. His willingness to be a mentor, to engage in problem solving and to provide feedback was greatly appreciated and valued. Keith Bell, for his assistance in fabricating PCBs in an efficient and positive manner. My friends and family, thank you for your support and assistance.

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2.4kW Unity Power Factor Rectifier

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Abstract
The goal of this thesis is to develop a 2.4kW unity power factor rectifier. The final product will operate at an input of 240V and 10A. The motive for the development of this product was to develop a power supply capable of forming the basis for a battery charger. The Sustainable Energy Research Group (SERG) are currently developing a hybrid electric/solar car and it is hoped a battery charged can be developed to allow fast overnight charging of the 100 lithium ion cells which make up the battery pack. Worldwide AC/DC switch mode power supplies (SMPS) are a multi billion dollar industry and continues to be a growth industry within the field of power electronics. SMPS service applications range from communication and computers through to military uses. One of the leading topics in line-operated power-converter design is to take the power from the grid but not to return it. Ideally, the power converter will present as purely resistive to the ac source. This is known as Unity Power Factor (UPF) and it has become an important design issue as a consequence of recent legislation. 3 and IEC 555-2. The benefits of unity power factor are more than legislative compliance. The benefits include greater efficiency, larger power density and improved power quality result in economic benefits to the electricity supplier. This project involves the design of a 2.4kW Unity Power Factor Rectifier. The converter operates at an input voltage of 240VAC and outputs a regulated 420VDC. This allows the converter to operate directly from a residential mains outlet European legislation restricts the harmonic content for power supplies. International standards are emerging known as the IEC 1000-

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This thesis developed the design and prototype of a 240W unity power factor rectifier. This product was unable to be fully tested, due to unresolved technical difficulties on the control board. The future work to be completed on this project includes developing an operational 240W converter and to conduct testing on this prototype. A 2.4kW converter may then begin to be developed. Future designs could be enhanced by the implementation of a zero voltage transition (ZVT) stage in the boost converter or implementing the recently published single cycle control scheme.

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Table of Contents
STATEMENT OF ORIGINALITY..I ACKNOWLEDGEMENTS ........................................................................................................................ II ABSTRACT ................................................................................................................................................III TABLE OF CONTENTS ............................................................................................................................. 1 LIST OF FIGURES...................................................................................................................................... 3 1.0 1.1 1.2 1.3 1.4 2.0 INTRODUCTION.......................................................................................................................... 4 PROJECT OUTLINE ........................................................................................................................ 4 STATEMENT OF PURPOSE .............................................................................................................. 4 BACKGROUND INFORMATION....................................................................................................... 4 DOCUMENT OVERVIEW ................................................................................................................ 6 LITERATURE REVIEW.............................................................................................................. 8

2.1 POWER FACTOR THEORY ............................................................................................................. 8 2.2 SOLUTIONS POSSIBLE CONVERTERS .........................................................................................10 2.3 POSSIBLE SWITCH-MODE CONVERTERS ......................................................................................10 2.3.2 Boost Converter ..........................................................................................................................11 2.3.3 Fly-back ......................................................................................................................................12 2.4 DESIGN CONSIDERATIONS ..........................................................................................................13 2.5 CURRENT PRODUCTS AVAILABLE ...............................................................................................15 2.6 PRIOR ART .................................................................................................................................16 3.0 3.1 3.2 4.0 PROJECT OUTLINE...................................................................................................................18 COVERAGE ..................................................................................................................................18 PROJECT MILESTONES .................................................................................................................18 DESIGN THEORY .......................................................................................................................20

4.1 CIRCUIT OVERVIEW ....................................................................................................................20 4.2 POWER CONVERTER SELECTION .................................................................................................20 4.3 SWITCH SELECTION .....................................................................................................................21 4.3.1 MOSFET Properties ...................................................................................................................21 4.3.2 Insulated Gate Bipolar Transistor Properties ............................................................................22 4.4 DIODE SELECTION .......................................................................................................................23 4.5 INDUCTOR SELECTION.................................................................................................................24 4.6 CAPACITOR SELECTION ...............................................................................................................24 4.7 CONTROL OPTIONS .....................................................................................................................24 4.7.1 Average Current Mode Control ..................................................................................................24 4.7.2 UC3854AN..................................................................................................................................25 4.8 AUXILIARY DESIGN.....................................................................................................................26 4.8.1 Losses..........................................................................................................................................26 4.8.2 PCB Considerations....................................................................................................................28 4.8.3 Heat sink Considerations ............................................................................................................28 5.0 DESIGN IMPLEMENTATION ..................................................................................................30 5.1 BOOST CONVERTER DESIGN .......................................................................................................30 5.2 COMPONENT SELECTION .............................................................................................................31 5.2.1 Semiconductor Devices ...............................................................................................................31 5.2.2 Inductors .....................................................................................................................................31 5.2.3 Capacitors...................................................................................................................................33

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5.3 CONTROL CALCULATIONS...........................................................................................................33 5.4 AUXILIARY DESIGN ASPECTS......................................................................................................37 5.4.1 Heat sink Selection......................................................................................................................37 5.4.2 PCB Considerations....................................................................................................................38 6.0 6.1 6.2 6.3 6.4 7.0 8.0 8.1 8.2 9.0 10.0 RESULTS & DISCUSSION.........................................................................................................40 THEORETICAL RESULTS ..............................................................................................................40 PSPICE RESULTS ........................................................................................................................40 PROTOTYPE RESULTS ..................................................................................................................41 SINGLE CELL VERSES PARALLEL CELL CONNECTION .................................................................42 FUTURE WORK............................................................................................................................44 EVALUATION OF PERFORMANCE .........................................................................................46 SKILLS DEVELOPMENT ................................................................................................................46 STRENGTHS AND WEAKNESSES ...................................................................................................46 CONCLUSION..............................................................................................................................48 BIBLIOGRAPHY .........................................................................................................................50

APPENDICES .............................................................................................................................................52 APPENDIX A SCHEMATICS ...............................................................................................................52 A.1 Power Board Schematic ................................................................................................................52 A.2 Final Control Board Schematic.....................................................................................................53 A.3 Capture Schematic.........................................................................................................................54 APPENDIX B PCB DESIGN ................................................................................................................55 B.1 Power Board PCB .........................................................................................................................55 B.2 Final Control Board ......................................................................................................................56 APPENDIX C PROTOTYPES ................................................................................................................57 C.1 Final Prototype .............................................................................................................................57 C.2 Power Board PCB.........................................................................................................................58 C.3 Final Control PCB ........................................................................................................................59 C.4 First Prototype ..............................................................................................................................60 APPENDIX D CD ROM FILES ............................................................................................................61 APPENDIX E SPREADSHEETS ............................................................................................................62

2.4kW Unity Power Factor Rectifier

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List of figures
Figure 1 Power Triangle ..................................................................................................... 8 Figure 2 UPF waveforms .................................................................................................... 9 Figure 3 Basic UPF schematic [15] .................................................................................... 9 Figure 4 Forward converter and waveforms [8] ............................................................... 10 Figure 5 Boost converter schematic [16] .......................................................................... 11 Figure 6 CCM Vs DCM waveforms [16] ......................................................................... 11 Figure 7 Flyback schematic and waveforms [8] ............................................................... 12 Figure 8 Interleaved boost converter [3]........................................................................... 14 Figure 9 FR48V-2000W-E [20]........................................................................................ 15 Figure 10 PS-500-48-1 [21] .............................................................................................. 16 Figure 11 AC-DC Boost converter [15] ........................................................................... 20 Figure 12 IGBT structure and symbol [8]......................................................................... 22 Figure 13 Diode reverse recovery waveforms [8] ............................................................ 23 Figure 14 UC3854AN Pin Out diagram [1]...................................................................... 25 Figure 15 UC3854AN Current and Voltage Loops [11] .................................................. 25 Figure 16 Heatsink equivalent circuit [8] ......................................................................... 29 Figure 17 Design specifications........................................................................................ 30 Figure 18 Design schematic.............................................................................................. 30 Figure 19 Inductor design software .................................................................................. 32 Figure 20 UC3854AN schematic [1] ................................................................................ 33 Figure 21 MOSFET losses................................................................................................ 40 Figure 22 Capture Output Voltage.................................................................................... 41

2.4kW Unity Power Factor Rectifier

Matthew Douglas

1.0 Introduction
1.1 Project Outline

This thesis will involve the design, construction and testing of a 2.4 kW unity power factor rectifier. It will operate at an input voltage of 240Vac and 10A input current. Ideally, the converter will operate at a power factor close to unity.

1.2

Statement of purpose

The purpose of the thesis is to develop a product capable of forming the power supply of a battery charger. The ITEE department is currently developing a hybrid car, powered by electricity and solar energy, named the Ultra Commuter. This hybrid vehicle contains battery pack consisting of 100 Lithium ion cells. The final battery charger will allow the owner to charge their vehicle in the garage overnight, drawing the power from the wall socket. To develop a suitable battery charger a controller of the output current and voltage would be required, to provide the correct voltage and currents as the cells recharge.

1.3

Background Information

Switch mode Power Supplies (SMPS) are a rapidly growing market, due to the evolving designs efficiencies are increasing, and cost lowering as new semiconductor and power devices are developed. However, one disadvantage of SMPS is that when connected the grid they may inject current harmonics back into the power grid. The area of power electronics known as power factor correction tries to overcome this problem. Engineers have developed power converters that operate at unity power factor. Unity Power Factor (UPF) is an important term in power electronics. The power factor of a converter is a ratio of the real power to total power. When the total power is equal to

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the real power and thus, the reactive power is zero, unity power factor is achieved. However unity power factor is also affected by the presence of current harmonics. Unity power factor is achieved when only the fundamental current harmonic is present. The benefit of UPF is the converter will appear as a purely resistive load to the power grid. This means the converter will not return any power to the grid or introduce harmonics into the grid. There are also economic benefits to the electricity supplier due to reduced rms currents. UPF is also becoming a legal issue, recent European legislation has placed current harmonic limits on all supplies connected to the electricity grid above 75W. global issue for all engineers. This thesis will cover the design issues and theory relevant to a 2.4kW unity power factor rectifier. This converter is based upon a two cell parallel switched boost converter with average current mode control. The benefits of the two cells over the standard one include greater reliability, efficiency and cost. An international standard (IEC 555-2) is now emerging making power factor correction a

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1.4

Document Overview

This document will provide a thorough overview of the research and design process relevant to a unity power factor rectifier. This document will cover the fundamental topics relevant to this project, however, a basic understanding of electrical engineering has been assumed. Chapter 2 This chapter contains a review of associated problems in this field and introduces the reader to the topic. It details the basic theory of unity power factor, covers current design methods and products that are commercially available. Chapter 3 This chapter defines the scope of the project, it details the coverage, boundaries and assumptions relevant to the project. It outlines the milestones associated with the project. Chapter 4 This chapter guides the reader through the design process and presents the important design issues to be solved. This chapter introduces the theory behind the design choices and develops the theory of SMPS. Chapter 5 This chapter details the implementation of the design. It extends the theory presented in chapter 4 and presents the final design process. It covers the development of the circuit schematic through to the development of the printed circuit board and component selection. Chapter 6 This chapter contains an in depth analysis of the data collected including comparing theoretical, computer simulation and the physical hardware results. Chapter 7 This chapter provides recommendations regarding further work which could be conducted to improve and extend the current design.

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Chapter 8 This chapter is a personal evaluation of the work including the skills developed and the strengths and weaknesses relevant to the project. Chapter 9 This chapter is a summary of the conclusions resulting from the project.

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2.0 Literature Review

2.1 Power Factor Theory

Power factor (pf) is a measure of how effectively a load draws real power. In theory, it is the ratio of real power to total power. The definition of power factor is dependent upon the circuit. In linear circuits, where a circuit draws a sinusoidal current, the power factor is calculated by the cosine of the phase angle between the input current and voltage. PF = Cosine(v-i)

Figure 1 Power Triangle

In a linear circuit, if the load is inductive the power factor is called a lagging power factor since the current lags the voltage. If the load is capacitive the current will lead the voltage and is called a leading power factor. SMPS are non-linear devices that draw non-sinusoidal currents. Consequently, the

definition of power factor must take this into account. The new definition is the product of the ration of the primary current harmonic to the total current multiplied by the displacement power factor (DPF). DPF is the same as PF in a linear circuit. PF = Is1/Is * DPF is(t)= is1 + isn(t) where (n = 2,3,4,5..) and is1 is the fundamental line frequency. [8]

2.4kW Unity Power Factor Rectifier

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In power electronics a power factor of one is highly desirable and is called unity power factor (UPF). UPF allows the input impedance of a power supply, connected to an AC source, to appear purely resistive. The resistive input impedance allows maximum real power to be delivered whilst current distortion is minimised. To achieve unity power factor the input current can be programmed to follow the input voltage. The input current and voltage are both sinusoidal waveforms. If the ratio between the current and voltage remains constant, the power factor will be unity. However, once the ratio is no longer constant, the power factor will decrease and the input current may develop phase displacement and/or harmonic distortion.

Figure 2 UPF waveforms

Figure 2 shows the waveforms of a rectifier operating at unity power factor. The input current, Is and voltage, Vs are fully in phase with one another.

Figure 3 Basic UPF schematic [15]

The basic structure, shown in Figure 3 for power factor correction circuits, includes an input filter, full diode bridge at the front end to rectify the incoming AC waveforms. The following stage contains a DC-DC switch mode power supply. The diagram above shows a boost converter. The control circuitry is responsible for generating the drive signal to switch the MOSFETS and program the input current. [15]

2.4kW Unity Power Factor Rectifier

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2.2

Solutions Possible Converters

The application of the rectifier will determine which switch mode converter is most suitable. The two main factors which define switch mode converters are: Is the output voltage greater or lesser than the input voltage? Does the converter require electrical isolation?

In this application the output voltage will be greater than the input voltage. An isolated or non-isolated converter would be suitable for this task.

2.3

Possible Switch-mode Converters

A Forward, Boost or Flyback converter may form the basis of a unity power factor rectifier. Other SMPS may be suitable, however, a summary of the three most frequently documented will be discussed. A brief summary of the basic structure will be presented along with the inherent advantages and disadvantages of the designs.

2.3.1 Forward

Figure 4 Forward converter and waveforms [8]

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The forward converter is a derivative of the buck converter. The basic operation can be described by explaining its operation in the ON and OFF states. When the switch is on the diode D1 is forward biased and diode D2 is reverse biased. This allows the inductor current to increase. Vl = N2/N1*Vin Vout When the switch is off, the inductor current flows through D2 and Vl = -Vout. The main disadvantages of the forward converter include, a large source drain voltage VDS = 2*Vin, a demagnetizing winding is required on the transformer and good magnetic coupling. The benefits of the forward converter include a simple design with a low output current ripple.

2.3.2 Boost Converter

Figure 5 Boost converter schematic [16]

Continuous Conduction

Discontinuous Conduction

Figure 6 CCM Vs DCM waveforms [16]

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During the on-time of the transistor, the voltage across L is equal to Vin and the current IL increases linearly. When the transistor is turned off, the current IL flows through the diode and charges the output capacitor. The function of the boost converter can also be described in terms of energy balance: During the on-phase of the transistor, energy is loaded into the inductor. This energy is then transferred to the output capacitor during the blocking phase of the transistor. It is considered discontinuous when the inductor current IL reduces to zero during the off-time The advantage of the boost converter is based upon its simple design and single winding main inductor. The boost suffers none of the magnetizing issues that affect the forward and flyback converters. However, the boost converter provides no electrical isolation between the input and output voltage. The boost converter is also affected by a large input startup current. [8]

2.3.3 Fly-back

Figure 7 Flyback schematic and waveforms [8]

The Flyback converter is a derivative of the buck-boost converter. The buck-boost converter is able to deliver a voltage greater or lesser than the input voltage, thus its

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application for this design. The flyback converter has a second winding on the inductor allowing electrical isolation to be achieved. When the switch is closed the input delivers energy to the transformer and the diode is reverse biased. When the switch opens the energy is transferred to the output. Figure 7 shows the voltages across the primary winding of the transformer. The ON voltage is the input voltage and the OFF voltage is equal to N1/N2*Vo. The second waveform is the flux present in the transformer, it increases linearly while the switch is on to a peak flux of: pk = (0) + Vd/N1 * ton The flux reaches a minimum at the end of the switching cycle, the value decreases linearly to: min = (0) + Vd/N1 * ton - Vo/N2(Ts - ton) The ratio of output to input voltage is given by:

Vo N 2 D = Where D is ton/Ts. [8] Vd N 1 1 D

2.4

Design Considerations

The design of a SMPS requires critical choices to be made on the basic characteristics of the device. These decisions include, mode of operation, number of switching cells, switching frequency and the method of control to be implemented. There are two modes in which a power converter can operate - Continuous Conduction Mode (CCM) and Discontinuous Conduction Mode (DCM). CCM occurs when the input current maintains a non-zero value through the switching cycle. DCM occurs when in each switching period the current drops to zero. The result is a large current ripple in DCM and a smaller current ripple in CCM. The choice of CCM or DCM depends on which switch mode converter is used and the necessary current and power rating required. DCM is often implemented in lower power design where the current ripple is lower. CCM is often preferred at higher power levels.

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The switching cell is an important choice. It must be fast enough to switch at the desired frequency and possess a low resistance to minimise the losses within the cell. The designer also has the option of using a single switching cell or two switching cells. There are two main methods of implementing a second switching cell. The first method is known as the interleaving approach. The concept is to employ two boost converters in parallel.

Figure 8 Interleaved boost converter [3]

Figure 8 illustrates a boost converter using the interleaving approach. The switches operate at the same frequency, however, their switching periods are sequentially phased over equal fraction of the switching period. The advantages of this design include a high overall switching frequency without increasing the switching losses, reduced EMI filtering and allows smaller and cheaper die to be implemented. An alternative method is to employ the relatively new technique introduced by Barbi and Braga [3]. This design uses a small balance inductor to connect the switching cells and all cells are switched from the same signal. The benefits of this method include, utilising a smaller cheaper die, sharing the reverse recovery problem between two devices and simplified control circuitry since only one gate signal is required. The choice of control schemes involves selecting either a current or voltage based scheme. Within each scheme the control may be based on the peak or average waveform or, the recently published, single cycle method.

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These design considerations will be related specifically to the project and explained in further depth in section 4.0 Design Theory.

2.5

Current Products Available

A major application of unity power factor rectifiers is their use as power supplies in telecommunication networks. There are a wide variety of products currently available, for example the FR48V-2000W-E manufactured by Delta Energy Systems and PS-50048-1 produced by Telkoor.

Figure 9 FR48V-2000W-E [20]

Fig 8 shows an FR48V-2000W-E from Delta Energy Systems. This rectifier can handle input voltages between 88-276Vrms and deliver a variable output voltage between 42Vdc and 58Vdc. This device can deliver a maximum of 46.5Adc. The converter operates at an efficiency of 91% and achieves a power factor of 0.99. The device may be used as the power supply for a large telecommunications network. [20]

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Figure 10 PS-500-48-1 [21]

Fig 9 depicts the PS-500-48-1 produced by Telkoor. This product operates at an input voltage of 230Vdc and outputs 48Vdc at up to 10A. This product achieves an efficiency of 88% and adheres to EN-55022 legislation regarding harmonic current limits in power supplies. Typical applications for this device include mobile telephone, railway and industrial systems. [21]

2.6

Prior ART

The work of Barbi and Braga [3] in the paper A 3kW unity power factor rectifier based on a two cell boost converter using a new parallel connection technique presented a significant and innovative approach to the UPF problem. Their development of a parallel connection for the switching cells significantly improved the interleaved approach. The significance of this change is the reduced complexity for the control circuitry and lower component expenses. Braga and Barbi designed a soft commutation cell to provide zero voltage transitions (ZVT) in the boost converter. This was not included in this thesis project.

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3.0 Project Outline

3.1 Coverage

Originally the coverage for this thesis involved the design, construction and testing of a unity power factor rectifier. The final version was to be a 2.4kW rated converter operating at an input of 240Vac and 10A. In order to reduce development costs and because of safety issues regarding testing, the decision was made to initially develop a 1/10th scale version of the rectifier. The development of a 240W converter took significantly longer than expected to develop an operational prototype. Consequently, the design and testing discussion will focus on the 240W version. It includes the design of the control system, switch and component selection, PCB layouts, heatsinking, building the product and testing. The development of the 2.4kW converter was dependent upon the successful development of the 240W prototype.

3.2

Project Milestones

The thesis will contain four main phases. The first stage will include detailed research of the topic and related issues. This stage will include searching for how the problem is solved commercially, seeking recent publications on the subject and reading theses on similar topics. When this information has been collated, it will be the analysed and synthesised to allow the relevant concepts to be developed. The second phase will be the design phase. The design phase will progress from paper design to an electronic design. When in an electronic form the design can be tested in PSPICE. This testing will be used to evaluate how well the paper design meets the design specifications and to correct any initial design flaws. The electronic design can also be developed to generate a Printed Circuit Board (PCB) using the Protel software. The development of a PCB is the first step in developing the hardware.

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The third stage requires the fabrication of the PCB and construction of the prototype. The first prototype was to be 240W scaled version because of safety concerns, safety considerations and ease of testing. The 240W scaled version was developed to reduce safety concerns regarding high voltage testing at 240V and 10A. The reduced financial cost in developing the initial prototypes is significant. special high voltage equipment. It was decided that the full rated 2.4kW design was to be implemented when a successful scaled version had been developed. As a consequence of time restraints and difficulties in developing an operational model, a 240W design was developed to a prototype stage. The final phase was to be extensive testing of the final prototype, however, this was not possible due to technical problems in the prototype. The ease of testing is also beneficial, as all preliminary testing can be conducted in a standard laboratory without

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4.0 Design Theory

4.1 Circuit Overview

The basic components of a UPF rectifier are shown on the diagram on the right. The AC input is filtered to remove any higher order harmonics that may have entered the power system.

Figure 11 AC-DC Boost converter [15]

The AC waveform is then rectified using a full bridge diode rectifier. The rectified waveform becomes the input to the boost converter. The MOSFET is driven by an integrated circuit chip (IC), this chip handles the control as well as the gate drive signal. The output is a resistor, providing a resistive load

4.2

Power Converter Selection

The power converter chosen was the boost converter with constant switching frequency its advantages include: 1. Input current is a smooth waveform, resulting in much less electromagnetic interference (EMI). Therefore reducing input filtering requirements. 2. The current stresses in the power switches are lower than the other possible converters, forward or flyback. 3. The inductor current in the boost converter is the input current and is therefore easily programmed.

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4. The DC output voltage is higher than the peak of the input voltage. This allows the output capacitor to store more energy and to provide longer hold up time. [13] This is consistent with the current trends within the power electronics industry. The majority of papers published on the topic of UPF rectifiers are based on the boost converter design. A common design technique in high power converters is to use two switching cells instead of one. There are two common methods, one is called interleaving and the other is called paralleling. The method of paralleling was chosen for this application because of the following reasons: 1. Both cells are switched from the same signal 2. simplified control method 3. easy implementation via IC (UC3854AN) The benefits of paralleling are cost, since the device only requires half the current rating, reduced heat sinking requirements and simplified control circuitry.

4.3

Switch Selection

4.3.1 MOSFET Properties

The MOSFET is a voltage controlled switch. The device is turned on and off by the voltage applied to the gate. When Vgs is below the threshold the device conducts and the switch is closed. Switching times vary between devices and range from tens to This allows MOSFETs to be commonly switched at a hundreds of nanoseconds.

frequency between 25-100 kHz, depending on the application.

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The MOSFET is the main switch in a boost converter and it must be rated above the current and voltage requirements of the converter. These values can be calculated by Vrating = Output voltage of the converter Irating = (IL rms 2 *D) It is beneficial to select a MOSFET with a higher current or voltage rating if the losses can be significantly reduced. However, at high power levels, if may not be economically feasible. [4]

4.3.2 Insulated Gate Bipolar Transistor Properties

The IGBT is similar to a power MOSFET, the main difference is the p region connected to the collector of the IGBT. The IGBT is a four layer device, the extra p layer injects minority carriers into the n- region while the device conducts. When the device conducts

Figure 12 IGBT structure and symbol [8]

the p-n junction is forward biased and the minority charges injected into the n- region cause conductivity modulation. This reduces the on resistance of the n- region and allows high voltage IGBTs to be constructed with low forward voltage drops. IGBTs are available in ratings from 600V to 3.3kV. The disadvantage of IGBTs low forward drop is the reduction in switching performance. When an IGBT turns off it exhibits a characteristic known as current tailing. Current tailing occurs because there is no way to actively remove the stored minority charge and

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it is slowly removed via recombination. The turn off times vary between 0.5us and 5us. The IGBT also has negligible reverse voltage blocking capabilities. [4]

4.4

Diode Selection

The diode can be analysed as operating like a switch in a boost converter. When the diode is forward biased the switch is closed and the current conducts. When the diode becomes reverse biased the switch is closed. However, unlike the MOSFET, the diode does not possess ideal switching characteristics. Although the turn on time is rapid, the turn off time is affected by the reverse recovery of the diode. The diode current drops to zero and briefly becomes negative. The negative current is essential to remove the excess carriers and allow it to block the negative voltage.

Figure 13 Diode reverse recovery waveforms [8]

The reverse recovery time is quoted by all datasheets and is the critical design choice when selecting a power diode.

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4.5

Inductor Selection

The design must take into account the operation frequency, current rating, losses as well as the desired inductance. This process can be a complex iterative process. This process was simplified by using the software program Magnetics Inductor Design Using Powder Cores. This program requires the following design inputs; DC current, current ripple, switching frequency, current density, maximum temperature rise and full load inductance.

4.6

Capacitor Selection

In a boost converter the output capacitor provides the energy storage to deliver a low ripple DC voltage. The capacitor must be designed to possess a low equivalent series resistance (ESR), to minimise the losses and to be able to handle the required amount of current ripple. The ESR is commonly specified at a test frequency of 100kHz and is used to calculate to losses present in the capacitors. The amount of current ripple present on the output is dependent on the design specifications. It is common to place a couple of capacitors in parallel to achieve the required amount of current ripple rating.

4.7

Control Options

4.7.1 Average Current Mode Control

Average current mode was selected to form the basis of the control system. Peak current mode control was discounted due to its susceptibility to noise and possible instability. Single cycle control was also considered, however, it was decided the added software component was too significant and a non micro-controller based solution was preferred. The benefits of implementing an average current control scheme are: simplified circuitry, can be implemented by a single IC

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2.4kW Unity Power Factor Rectifier reduced noise and instability problems contains gate drive circuitry [11]

Matthew Douglas

Average current mode control consists of two control loops, an inner current loop and an outer voltage loop. The inner loop is designed to control the state space averaged inductor current, which, in the case of a boost converter, is also the input current. The inner loop is responsible for synthesising the inductor current to the desired sinusoidal waveform.

4.7.2 UC3854AN
The UC3854AN from Texas Instruments was selected to form the basis of the control circuitry. This chip is also used to deliver the gate drive signal.

Figure 14 UC3854AN Pin Out diagram [1]

Figure 15 UC3854AN Current and Voltage Loops [11]

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Figure 15 shows the main components of the inner current loop and outer voltage loop. The inner loop programs the input current so the input impedance will appear purely resistive. The outer voltage loop controls the output voltage. The output voltage is controlled by changing the average amplitude of the current programming signal, Imo. The current programming signal, Imo is generated by an analogue multiplier. The rectified line voltage is multiplied with the output of the voltage error amplifier. The gain of the voltage loop is kept constant by dividing the output of the error amplifier by the square of the average input voltage, Vff. [11] Current sensing can be implemented in two ways, either with a sense resistor in the ground return of the converter or with two current transformers. A sense resistor is often used in low power or current levels, it is the least expensive option. Current transformers are used if the power dissipation in the resistor is too high. Two transformers are used one for the MOSFET current and one for the diode current, to develop an analogue of the inductor current.

4.8

Auxiliary Design

4.8.1 Losses
The MOSFET contributes three different losses to the system. switching, conducting and the gate drive losses. The switching loss can be calculated by the equation below: Psw = * Vo*Ii*Fs*(tc(on) + Tc(off)) This equation shows how decreasing the switching frequency and using a faster semiconductor switch will reduce the associated losses. The conduction losses in a SMPS are constant and can be calculated by the equation below: Pon = Isw2 * Rds Where Rds is the on state resistance and the current is the switch current. The losses are, the

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The key to minimising the loss due to conduction is selecting a suitable switch with the lowest possible Rds value. The gate drive losses are the result of the charge build up on the gate of the switch. Pg = Qg*Vg*fsw where Qg is the gate charge, Vg is the gate voltage and fsw is the switching frequency. It is important to remember that for the two cell design the losses must be calculated for both cells. The loss due to the diode is calculated by Pd = Vf* Ii*(1-D) where Vf is the forward voltage drop of the diode, Ii is the current flowing through the diode and D is the duty cycle. There are two sources of losses in the inductors, the loss due to the resistance of the wire and the losses due to the core. Core loss occurs as a result of the conversion between magnetic and electric energy, where the losses are dissipated as heat. When the core is magnetized, the hysteresis of the B-H loop provides these losses. The net energy that flows into an inductor can be described by: W = (Al*lm) H dB can be calculated as: Pcore = fsw*(Al*lm) H dB To minimise the effect of core losses, powdered iron and molybdenum permalloy powder (MPP) cores are commonly used in high frequency SMPS. MPP cores contain an insulating medium to bond the iron particles. The insulating medium behaves like a distributed air gap providing these cores with a relatively low permeability. [4] over 1 cycle. The constant term Al*lm is the volume of the core, while the integral is the area of the B-H loop. Therefore the power dissipated by the core

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Copper loss is a low frequency phenomenon which occurs as a result of the resistance of the copper winding wire. The equivalent series resistance (ESR) of an inductor can be determined by: R = *lb Aw
Where

is the resistivity of the wire, the standard value is 1.724 * 10-6 at

25C. lb is the length of the wire and Aw is the cross sectional area of the wire. The cooper loss in the windings of an inductor is calculated by: Pcu loss = IL2 * R where IL is the rms inductor current.

The loss in the output capacitors is found by: Pcap = Resr*ICo2 where the resistance is the equivalent series resistance and ICo is the current flowing through the capacitors. [8]

4.8.2 PCB Considerations

The design specification states the final converter draw up to 10A, this requires special consideration in the design process. The current limit of a track is determined by the thickness of the copper on the board and the width of the track. The standard copper thickness is 1 oz, however 2oz and 3oz boards can be manufactured. The following chapter will discuss the specific layout and design strategies implemented on the PCBs.

4.8.3 Heat sink Considerations

The semiconductor devices will require heatsinking when operating at full load. This is necessary to maintain a safe operating temperature for the semiconductor devices. Figure 16 depicts the equivalent circuit required to calculate the correct heatsink.

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Figure 16 Heatsink equivalent circuit [8]

The left diagram shows how the power, dissipated as heat is transferred from the chip to the casing, through the isolation pad to the heatsink. The equations used are presented below. The total thermal resistance can be calculated by; Rja = Rjc + Rcs + Rsa The values for these thermal resistances are listed in the datasheet. The goal of heatsinking is to limit the temperature of the semiconductor at the case. A common design goal is to limit the peak temperature to 75% of the maximum operating temperature. This will result in improved reliability. Tjunction = Pd*( Rjc + Rcs + Rsa) + Tambient where Pd is the power dissipated [8]

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5.0 Design Implementation

5.1 Boost Converter Design

The specifications for the converter are summarised below: Pout(max) Vin range Line frequency Output voltage 240W 21.6 - 26.4 Vac 50Hz 42V

Figure 17 Design specifications

The switching frequency was 65 kHz, to minimise switching losses. Although it would be possible to switch the MOSFETS faster, this would result in significantly reduced efficiency due to the high currents flowing through the switch and associated switching losses. The duty cycle was calculated to be: D = (Vo Vinpk)/Vo = (42-26.4)/42 = 0.37

Figure 18 Design schematic

Figure 18 is a simplified schematic showing the boost converter, however, the associated control circuitry has been removed and replaced by two main blocks. The control circuitry design will be explained separately in this chapter.

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5.2

Component Selection

5.2.1 Semiconductor Devices

The MOSFET chosen for the 240W prototype was the Fairchild FQP85N06. This device is rated at 60V and 85A. The benefit of selecting a higher current rating is the reduced on state resistance. This device is designed for low gate charge, 86nC, reduces the gate drive losses. The datasheet states a maximum value of 0.01 and a typical value of 0.008 with a Vgs of 10V and ID of 42.5A. The device is designed for fast switching with a typical value of 615ns and a maximum of 1.28us stated for the total turn on and turn off times. The diodes selected were two fast recovery epitaxial diodes (FRED) from IXYS, the DSE12-06A. This device is rated to 600V and 14A, with a typical reverse recovery time of 35ns and a maximum of 50ns.

5.2.2 Inductors
The main boost inductor had to be hand wound due the second winding required for the control IC supply voltage. The core chosen was a Mag core high flux 58548-A2. It has a 33mm outer diameter and a permeability of 125. The design software provided by Mag core was used to select the correct winding requirements. Below is the screen capture showing the design inputs and corresponding design outputs. The value of inductance required can be calculated by: L=
Vin D 28 0.37 = 45.93uH. = fsw I 65k 3

This is a minimum value; a value of 60uH was used in the design software. Design inputs To return the core size, turns and wire gauge the following inputs are required by the software program.

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DC Current The maximum current the inductor musty handle in steady state. Ripple Current The peak to peak ripple which is superimposed on the DC current.

The ripple current is the sole contributor to core losses in the inductor. Ripple current is often limited to less than 25% of the DC current.
Current Density The density of the current in the windings determines the required

wire gauge to be used in the design.

Temperature Rise This is the maximum allowable temperature for the wound design.

It is used to select an appropriate permeability and core size.

Figure 19 Inductor design software

The final design will require 28 turns of 15AWG wire. The simulated inductance is 61.90uH at full load. The core losses are low, 174.8mW and the copper losses in the wire dominate the losses with 1.22W dissipated. The largest diameter winding wire obtainable was 1.25mm, this is slightly smaller than the optimum diameter. This resulted in slightly higher copper losses. The current density level determines the wire gauge required. The balance inductor, is used to balance the currents drawn by the MOSFETS is a Coilcraft PCV-1-472-10 from the power magnetics range. The inductor has a value of

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4.7uH and is capable of handling 10A. This component has a maximum DC resistance of 0.012.

5.2.3 Capacitors
The output capacitors selected were ultra low impedance Rubycon YL capacitors. These capacitors possess an impedance of 0.042 when measured at 100 kHz. Each capacitor is capable of handling 1.37A of ripple. The prototype contains three 220uF capacitors connected in parallel to provide up to 4.11A of ripple. Two capacitors may have been sufficient assuming the current ripple was less than 30%. However, a third capacitor provides the option of evaluating the effect of greater current ripple.

5.3

Control Calculations

The values for the resistors and capacitors required for the UC3854AN are found through the following steps:

Figure 20 UC3854AN schematic [1]

Multiplier set up: Vrms max 2 Step 1. RAC = where Iac max is specified to be <600uA in datasheet Iac max

RAC = 26.4 2 600 E 6

= 62k2

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2.4kW Unity Power Factor Rectifier

2.25 Vrms min 2.25 A= 21.6 Vrms min 2 (Vea 1.5) Step 3. IMOmax = K Rac 2.25 21.6 2 3 IMomax = 1 62k 2 2.25 P lim Step 4. Iinpk = 2 Vrms min 251 2 Iinpk = 21.6 0.95 Pr s Vin min 2 2 Step 5. Rsense = Pout 2 3 21.6 2 0.95 2 Rsense = 228 2 2.25 K P lim Rac Rsense Step 6. RMO = Vrms min 2 (Vea 1.5) 2.25 1 251 62k 0.025 RMO = 21.6 2 0.95 (3)

Matthew Douglas

Step 2.

A=

= 0.069

= 982uA

= 17.28

= 0.024

=427.8

Setting the switching frequency: The frequency of the gate drive signal is controlled by Rset and CT, pins 12 and 14 respectively. 3.75 Step1. Rset = 2 * Iac min Vinpk 26.4 = 0.42mA Iacmin = = Rvac 62k 3.75 Rset = = 4k4 2 * 0.42 E 3 1.25 Step 2. CT = Rset fsw 1.25 CT = = 2.8nF 4k 3 65k Current error amplifier compensation: Amplifier gain at fsw Vs Gca = Vrs

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2.4kW Unity Power Factor Rectifier Vo Rs L fsw 42 0.025 Vrs = 60u 65k Vs Gca = Vrs

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Vrs =

= 0.22V = 23.95

Feedback resistors Step1. Set Rci = RMO Rci = Rcz = Gca*Rci = 23.95*427 Current loop crossover Vout Rs Rcz fci= Vs 2 L Rci 42 0.025 10k fci= 5.2 2 60u 420 1 2 fci Rcz 1 Ccz = 2 15.91k 10k Ccz = 1 2 fsw Rcz 1 Ccp = 2 65k 10k Ccp = Voltage error amplifier compensation Pin 2fr Co Vo 240 Vopk = 2 100 660u 42 Vopk = Gva = Vvao % Ripple Vopk 4 0.20 Gva = 13.78 = 10k2

= 15.91kHz

= 0.98nF

= 155pF

= 13.78V

= 0.058

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Feedback network: 1 Cvf = 2fr Rvi Gva 1 Cvf = 2 100 511k 0.058 Set DC output voltage Rvi Vref Rvd = Vo Vref 511k 7.5 Rvd = 42 7.5
fvi =
fvi = Pin 2 Vvao Vo Rvi Co Cvf (2 ) 240 2 4 42 511k 660u 54n (2 )

= 54nF

= 111k

= 44.57Hz

Rvf =

1 2 fvi Cvf 1 Rvf = 2 44.5 54n

= 66k1

Feed forward voltage divider capacitors %THD Gff = 66.2% 1.5 Gff = 66.2%
fp = fp =

= 0.022

Gff fr

0.022 100 1 2 fp Rff 2 1 2 15 75k

= 15.05 Hz

Cff1 =

Cff2=

= 0.15 uF

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5.4

Auxiliary Design Aspects

5.4.1 Heat sink Selection

The MOSFET and diode selected were both TO-220 packages which allowed for easy mounting onto a single heatsink.
Properties Rjc Rcs MOSFET FQP85N06. 0.94 oC/W 0.5 oC/W DIODE DSE12-06A 2 oC/W -

The total MOSFET losses were calculated to be: The total diode losses were calculated to be:

6W 7.5W

The thermal impedance required can be calculated by: [8]

Tj,max is the maximum operating temperature of the MOSFET junction is specified to be 175 oC. This is a maximum value, to protect the lifetime of the device a value of 145oC will be used. Ta,max is the maximum ambient temperature. A value of 30oC will be used. Rja Rsa Rsa = 8.5 (0.94+0.5) Rsa = 8.5 (2) = 145 30 = 8.5oC/W 13.5

= Rja (Rjc + Rjs)

= 7.06oC/W for each MOSFET = 6.5oC/W for each diode

A single large 2oC/W heatsink was selected to limit the heat dissipated by all four devices.

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5.4.2 PCB Considerations

The primary consideration for a high current board is selecting suitable track widths. Since the board must be capable of handling up to 10A of input current and higher peak currents in the converter a 2oz copper board was selected. However, the 2oz copper board could not be purchased within Australia at the time. The board could be produced commercially with 2oz board, however, the cost and turn around time made this an unsuitable proposition. It was decided to fabricate the 2oz board design on a 1oz copper sheet and solder tinned copper wire to any tracks requiring higher current capabilities. The physical layout of components can significantly affect the efficiency and quality of the prototype. Due to the high frequency switching of the MOSFETs it was necessary to develop a compact design, minimising the tracks between the semiconductor devices and the main inductor. Appendix B. To facilitate easy heatsinking the two MOSFETs and two fast recovery diodes were mounted together along the edge of the board. This allowed one small strip of aluminium to connect the four devices to the heatsink. The gate drive signal from the control chip was implemented via a twisted wire pair between the 8 pin header on the power board and the gate and source of the two MOSFETs. This was implemented to remove the high frequency switching noise from the ground connection. The prototype was developed on two boards connected by a 90o header. The boost converter and associated circuitry was placed on one board, a smaller board contained the control chip circuitry. This was implemented to reduce the need to develop a new PCB should one section fail or require redesigning. This proved to be a successful design decision as the control board was redesigned three times. The final PCB containing the power converter can be seen in

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The converter board was developed as a single side board with all tracks running on the bottom side of the board, this removed the problem of high impedance vias carrying high currents and dissipating power through these connections. The control board was developed as a two layer board, since the reduced currents flowing through the tracks will not result in significant losses or affect the circuits performance. Vias were kept to a minimum on this board. The final control board is in Appendix B

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6.0 Results & Discussion

6.1 Theoretical Results

Before any physical hardware was developed, basic efficiency calculations were conducted to evaluate the components selected for the first prototype. The MOSFETs, diodes and boost inductor were concluded to be the main contributors to significant losses in the circuit. The other losses were neglected at this initial stage. Loss Type Switching Conduction Gate Power dissipated 1.6W 0.15 1.25W

Figure 21 MOSFET losses

The MOSFETs contributed switching, conduction and gate losses of 3. The total losses in both MOSFETs were 6W. The diodes each contributed 3.75W as a result of conduction losses. The total loss contribution was 7.5W The main transformer contributed 0.175W as a result of the core loss and 1.22W as the result of the copper loss. This is a total of 1.395W lost in the inductor. The losses in the small balance inductor were neglected. This gave a total of 14.90W dissipated by the converter. maximum losses at peak load. attached in Appendix E. The input power of the

converter is 240W, this gave a estimated efficiency of 93.8%. This is based on the These calculations were made on the Boost spreadsheet

6.2

PSPICE Results

The simulation package Capture within PSPICE was used to develop a model of the circuit. Capture was chosen as it allows for new semiconductor models to be easily

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implemented, which was valuable for analysing different power MOSFETS. The open loop model provided a visual representation of the waveforms present in the converter and assisted in building a comprehensive understanding of the circuits behaviour.

Figure 22 Capture Output Voltage

Figure 22 shows the open loop simulation of the converter. The output voltage ripple is between 42.6V and 39.5V. The initial overshoot is to be expected as the control circuit is not included. The output ripple voltage will be minimised by the voltage error amplifier on the control chip.

6.3

Prototype Results

The first prototype was developed using a Coilcraft power magnetics 47uH 10A inductor as the main boost inductor. The power supply to the control chip was controlled by a voltage regulator on the control board. The following errors/design flaws were corrected on the power board: Create a twisted wire pair for the gate drive signal. Remove the grounding of input to the bridge rectifier. Add a fuse to the design Create a more compact design Reduce the size of the PCB board Remove the voltage regulator and implement the power supply for the IC, from the secondary transformer winding.

The following alterations were made to the control board:

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The final power board containing the converter possessed no design errors and generated the required signals for the control board. The secondary winding on the main inductor provided a rectified 20V voltage waveform.

6.4

Single Cell Verses Parallel Cell Connection

The benefits of a parallel cell connection are significant, especially for high current converts. The parallel connection allows half rated devices to be implemented in the switching cells. MOSFETS are very cheap and widely accessible at low current rating at voltage ratings up to 600V. However, high current MOSFET are significantly more expensive at current ratings between 10A-20A. These high current switched are stocked only by specialist detailers by implementing a more widely accessible and cheaper component significant financial and cost benefits are achieved.

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7.0

Future Work

There is ample scope for further work to be completed on this topic. The first task will be to debug and test the 240W UPF rectifier. This could include minor design changes, such as, using a single PCB board or possibly using a different control chip. The next step would be to redesign the converter to operate at 2.4kW. This may seem inconsequential once the smaller prototype is operational, however, the higher voltage results in increased safety, heatsinking, filtering and PCB layout considerations. A further innovation may include the development of a single cycle based control scheme. This would be developed mainly through software and would implement a recent advance in power factor correction technology. To develop the hardware aspect of the project the implementation of a zero voltage transition (ZVT) stage could be developed. The UC3855AN from Unitrode can provide this feature, however, it is only possible with average current mode control. The final step for this project would be to extend the operational 2.4kW UPF rectifier into a battery charger suitable for the UltraCommuter. lithium ion battery pack. This would provide significant challenges to design the current and voltage control necessary to charge the 100 cell

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8.0 8.1

Evaluation of Performance Skills Development

The process of undertaking a significant sized project from concept through to production has been a valuable learning experience. During this period I have developed a range of new skills and enhanced existing skills through the process of research, design and prototyping of a UPF rectifier. The new skills developed were a working knowledge of the Protel 99SE and ORCAD Capture software packages. I comprehensively expanded my knowledge of the power electronics area, specifically AC-DC rectifiers and the subtleties associated with such converters. The planning and development stages provided valuable development of professional dialogue, research skills, time management and developing awareness and management strategies for addressing unexpected difficulties and developing problem solving strategies.

8.2

Strengths and Weaknesses

Self evaluation of this project indicates the strengths evident were the development of knowledge, skills and strategies that are pertinent to my development both as a student and as a future professional engineer. The strengths evident were:
Time management: I was able to meet consistently the required due dates for all

assessment components.

This was achieved through precise adherence to a

personal timetable devised to balance the competing demands of thesis work, other enrolled subjects and external employment.
Task focus: A major set back in this project was the technical difficulties posed

by the malfunction of the control board. I was able to stay on task and continue to persevere to obtain the desired outcomes despite the continuing problems with the board.
Problem solution:

The project presented numerous opportunities problem

solving.

The solutions implemented were not always successful, however, I

maintained an objective and positive attitude towards a successful outcome.

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Communication skills: Communication skills are an essential strength for a

professional engineer. During this project I was able to develop these skills through professional dialogue with my supervisor, colleagues, technicians and retail personnel.
Research: This project required extensive research, synthesis and application of

complex theoretical concepts.

I was able to develop existing skills and

knowledge and to apply new information in a specific manner. A significant weakness at the beginning of this project was that I possessed no previous experience with the design software Protel. Overcoming this weakness was essential in order to develop and implement the design. To accommodate for this weakness extra time was assigned to familiarise myself with the program and manual. My knowledge of this software program progressed with each new design and conversations with colleagues who were proficient in using the software.

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9.0 Conclusion
This thesis developed the design and prototype of a 240W unity power factor rectifier. The product was unable to be fully tested, due to technical difficulties on the control board. The 2.4kW converter was to be developed once a successful 240W prototype was delivered. The positive outcomes of this project were extensive initial research, a precise design process and the development of the main converter board. Preliminary testing indicated this design is an accurate prototype. This provides a base for further work to be undertaken in the future. The future work to be completed on this project includes developing an operational 240W converter and to conduct testing on this prototype. A 2.4kW converter may then begin to be developed. Future designs could be enhanced by the implementation of a zero voltage transition (ZVT) stage in the boost converter or implementing the recently published single cycle control scheme. The benefits of a parallel cell connection are significant, particularly for a high current converter. The parallel connection allows half rated devices to be implemented in the switching cells. MOSFETS are very cheap and widely accessible at low current rating at voltage ratings up to 600V. However, high current MOSFET are significantly more expensive at current ratings between 10A-20A. The implementation of this design provides both an economic and a circuit performance benefit. This document provides a comprehensive overview of the theory relevant to a AC/DC SMPS and a detailed guide to the design process of a UPF rectifier. This will provide a valuable reference for future applications on UPF rectifiers.

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10.0 Bibliography
[1] Laszlo Balogh, Unitrode UC3854A/B and UC3855A/B Provide Power Limiting
With Sinusoidal Input Current for PFC Front Ends. Unitrode Application Note

DN-66, 2001 [2] [3] O. Bishop, Understand electronic control systems. Oxford: Newnes, 2000. H. A. C. B. Braga, I., "A 3-kW unity-power-factor rectifier based on a two-cell boost converter using a new parallel-connection technique," Power Electronics,
IEEE Transactions on, vol. 14, pp. 209-217, 1999.

[4] [5]

R. W. Erickson and D. Maksimovic, Fundamentals of power electronics, 2nd ed. Norwell, Mass.: Kluwer Academic, 2001. K. N. Fujiwara, H., "A novel lossless passive snubber for soft-switching boosttype converters," Power Electronics, IEEE Transactions on, vol. 14, pp. 10651069, 1999.

[6] [7] [8] [9]

R. J. King, "Analysis and design of an unusual unity-power-factor rectifier,"

Industrial Electronics, IEEE Transactions on, vol. 38, pp. 126-134, 1991.

R. M. Marston, Power control circuits manual, 2nd ed. Oxford, England ; Boston, Mass.: Newnes, 1997. N. Mohan, T. M. Undeland, and W. P. Robbins, Power electronics : converters,
applications, and design, 2nd ed. New York ; Brisbane: J. Wiley, 1995.

M. H. K. Robert L. Steigerwald, Ramachandran Gurumoorthy, "A Fast Response High Power Factor Converter with a Single Power Stage," IEEE, pp. 769-779, 1991.

[10]

K. M. C. Smedley, S., "One-cycle control of switching converters VO 22nd Annual IEEE, 1991.

-,"

presented at Power Electronics Specialists Conference, 1991. PESC '91 Record., [11] [12] Phillip C.Todd, UC3854 Controlled Power Factor Correction Circuit Design. Unitrode Application Note U-134. C. S. Zaohong Yang; Paresh, "A novel technique to achieve unity power factor and fact transient response in AC-to-DC converters," Power Electronics, IEEE
Transactions on, vol. 16, pp. 764-775, 2001.

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P. C. Zaohong Yang; Sen, "Power factor correction circuits with robust current control technique," Aerospace and Electronic Systems, IEEE Transactions on, vol. 38, pp. 1210-1219, 2002.

[14]

K. M. Y. M. Zheren Lai; Smedley, "Time quantity one-cycle control for powerfactor correctors," Power Electronics, IEEE Transactions on, vol. 12, pp. 369375, 1997.

[15]

Infineon Technologies PFC control ICs http://www.infineon.com/cgi/ecrm.dll/ecrm/scripts/prod_ov.jsp?oid=13888 (Current Apr. 13, 2003)

[16]

Help for Boost Converter http://henry.fbe.fh-darmstadt.de/smps_e/aww_hilfe_e.html 2003) (Current Apr. 13,

[17]

M. Smith and K. Smedley, Properties and Synthesis of Passive, Lossless SoftSwitching PWM Converters,
EPMC97,

Israel,

http://www.eng.uci.edu/~pelwww/prop_passive_ss.pdf (Current Apr. 13, 2003) [18] [19] [20] Soft Ferrites - Applications http://www.avxcorp.com/docs/Catalogs/applic.pdf (Current Oct. 1, 2003) Principles of SMPS http://www.power-one.com/technical/articles/topo_e.pdf (Current Oct. 1, 2003) FR48V-2000W-E http://www.ascom.com/ecore/WebObjects/ecore.woa/de/showNode/siteNodeID_ 74206_contentID_228557_languageID_1.html (Current Oct. 1, 2003) [21] Telkoor Power Supplies Catalogue http://www.telkoor.com/ecatalog.html (Current Oct. 1, 2003)

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Appendices
Appendix A Schematics

A.1 Power Board Schematic

Final Power Board schematic

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A.2 Final Control Board Schematic

Final Control Board schematic

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A.3 Capture Schematic

Orcas Capture Schematic

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Appendix B

PCB Design

B.1 Power Board PCB

The final power board PCB containing the boost converter and associated circuitry.

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B.2 Final Control Board

The final Control board PCB.

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Appendix C

Prototypes

C.1 Final Prototype

The final prototype with both PCBs connected.

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C.2 Power Board PCB

The final power board PCB.

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C.3 Final Control PCB

The final control board PCB

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C.4 First Prototype

The first prototype PCBs

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Appendix D

CD ROM Files

The CD supplied with this thesis contains: The Protel 99SE design files The datasheets of selected components Innovation Expo Poster

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Appendix E

Spreadsheets

240W Boost Converter Characteristics Switching frequency fsw (Hz) Tsw (s) Duty Cycle Vin ave (V) V in Min (V) Vin Max (V) Iin (A) Pout assume 95% Vout (V) Iout (A) efficiency assume 95% Pin max (1/0.95)*B8*(1-cos2wt)

65000 1.54E-05 0.37 24 21.6 26.4 10 228 42 5.71 0.95

Power Losses
Mosfet Conduction W Switching W Gate W Ploss Total Diode reverse recovery W Inductor Core Loss (W) Copper Loss (W) P=(Iqrms^2/2)*Rds 0.15 P=1/2*Vd*(Id/2)*fsw*Trf 1.6 P=Qg*Vgs^2*fsw 1.26 3.05

P=Vf*Ii/2*(1-D) 3.75

240.00

0.175 1.22

Inductor Calculations L(uH) current ripple (A) 20% Iin max I inductor max (A) Ipk (A) Ilmax = Ipk +Irip/2 (A) I L rms (A) Imos total rms (A) Id total rms (A)

4.59E-05 45.93 2.99

Components
Mosfet Vd Id Rds Trr s Qg C Vsd Diode Vf If Trr Capacitor ESR FQP86N06 60 85 0.008 1.7E-07 8.60E-08 1.5 DSE12-06A 1.5 14A 35ns 220u 0.042

1.49 14.14 15.635 10.037 6.117 7.958

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