Fujitsu Semiconductor Europe Factsheet IP & Cores

Seemless Integration of IP Cores into System LSI

Mobile PC

As a leading global ASIC provider and totalsolutions provider, Fujitsu delivers innovative solutions that enable customers to differentiate their products and maximise their time-to-market advantage. Together with skilled engineers, this has created the established environment required to develop and produce advanced ASIC designs. Fujitsu Semiconductor Europe operates its ASIC Design Centres from Langen (Frankfurt) and Munich, Germany and is supported by design centres for ASIC and foundry services throughout the world. Support can therefore be delivered locally, which is increasingly important in todays complex ASIC designs. By using third-party vendor tools and Fujitsu's own CAD tools, we ensure an innovative, mature design flow, providing customers at the same time with a global network for system development and support. Fujitsus advanced technologies and products include high-end deep sub-micron process (40nm, 65nm, 90nm, 0.13m, 0.18m) and standard process technology (0.25m, 0.35m). Embedded memory with access time in the pico-second range helps to deliver the system performance required for todays SoC designs. The Fujitsu IP portfolio, in combination with our experienced application support, enables customers to achieve right-first-time design and shorter design cycle times. Sample IP cores include: Computational cores: ARM, DSP, multi-channel VoIP I Memory controller: SRAM controller, DRAM controller, DDR controller I Connectivity IPs: USB, PCI, I2C, Ethernet, IEEE 1394
I

Industrial

Automotive

Fujitsus SoC design methodology and solution platform provides seamless integration of IP cores into system LSI. The IP library consists of diverse sets of re-usable system building blocks

1000
FSL Fab
(Fujitsu Semiconductor Ltd.)

180-nm
(CS80A)

Outsourced Fab

Gate Length (nm)

130-nm
(CS90A)

90-nm
(CS100A)

100

65-nm
(CS200A)

40-nm
(CS350LP)

28-nm
(CS450LP)

22-nm
(CS500LP)

10
CMOS technology roadmap

1999

2001

2003

2005 Year

2007

2009

2011

2013

Packaging support options range from small FBGA/QFP to high pin-count, enhancedperformance FCBGA solutions.
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Factsheet Fujitsu IP & Cores

Selection from Fujitsu IP Portfolio

90nm
I

Standard Cells - Multiple Vth Memory - SRAM 1RW, 2RW - RF 1R1W, 2R2W - Mask ROM - OTP

65nm
I

Standard Cells - Multiple Vth Memory - SRAM 1RW, 2RW - RF 1R1W, 2R2W - Mask ROM - OTP Standard I/Os - 3.3V LVCMOS - Oscillator - Analogue

40nm
I

Standard Cells - Multiple Vth

Memory - SRAM 1RW, 2RW - RF 1R1W, 2R2W - Mask ROM - OTP Standard I/Os - 3.3V LVCMOS - Oscillator - Analogue

Standard I/Os - 2.5V/3.3V / 5V tolerant - 3.3V PCI - Oscillator - Analogue High Speed I/O - CDR Tx/Rx - FPD Link Tx+Rx HDMI Tx 2.25Gbps MIPI D-PHY Rx 650Mbps MIPI D-PHY Tx 650Mbps PCI Express 2.5Gbps PHY SATA 1.5G / 3.0G PHY SubLVDS Rx / Tx 650Mbps LVDS MDDR, DDR2, DLL SSTL2, SSTL18 USB2.0 PHY

High Speed I/O - CDR Tx/Rx - FPD Link Tx+Rx - HDMI Tx 1.20Gbps - HDMI Tx 2.25Gbps - MIPI D-PHY Rx 1Gbps - MIPI D-PHY Tx 1Gbps - PCI Express 2.5Gbps PHY - SATA 1.5G / 3.0G PHY - SubLVDS Rx+Tx 650Mbps - SubLVDS Rx+Tx 1Gbps - MDDR, DDR2, DDR3, DLL - SSTL2, SSTL18, SSTL15 - USB2.0, USB3.0 PHY

High Speed I/O

- HDMI Tx 1.5Gbps - MIPI D-PHY Rx 1Gbps - MIPI D-PHY Tx 1Gbps - SATA 1.5G / 3.0G PHY - SubLVDS Rx+Tx 650Mbps - MDDR, DDR2, DDR3, DLL - SSTL2, SSTL18, SSTL15 - USB2.0, USB3.0 PHY
I

APLLs - Input frequency up to: 200MHz - Output frequency: 50MHz...1.6GHz - SSCG - Low power, low jitter ADC / DAC - Resolution: 6 - 14-bit - Sample rate up to: 1Gsps Analogue - POR, LDO - Audio Codec Cores - ARM7TDMI-S - ARM926EJ-S, ARM946E-S - ARM1176JZF-S - CortexTM-M0, M4, A5, A15 - Cortex-M3, Cortex-R4F - Cortex-A9

APLLs - Input frequency up to: 200MHz - Output frequency: 50MHz...1.6GHz - SSCG - Low power, low jitter ADC / DAC - Resolution: 8 - 14-bit - Sample rate up to: 200Msps

APLLs - Input frequency up to: 200MHz - Output frequency: 400MHz...1.2GHz - SSCG - Low power, low jitter ADC / DAC - Resolution: 12-bit - Sample rate up to: 220Msps

Cores - ARM7TDMI-S - ARM926EJ-S, ARM946E-S - ARM1176JZF-S - Cortex-M0, M4, A5, A15 - Cortex-M3, Cortex-R4F - Cortex-A9

Cores - ARM7TDMI-S - ARM926EJ-S, ARM946E-S - ARM1176JZF-S - Cortex-M0, M4, A5, A15 - Cortex-M3, Cortex-R4F - Cortex-A9
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ARM Processor Roadmap for ASIC/Foundry Service

ARM Core Line-up

ARM1176JZF-S ARM926EJ-S

Cortex-A9

Cortex-A15 Cortex-A5

Application

Cortex-R7 ARM946E-S Cortex-R4F Cortex-R5

Real-Time

Cortex-M4 ARM7TDMI-S Cortex-M3 Cortex-MO 2010 2011 2012 2013 2014

Microcontroller

Fujitsu ARM SoC Prototyping (FASP) Reference Design Roadmap

ARM1176 ARM926 ARM946 ARM7 M3 2010

A9 A5 R4F M0 2011 2012

A15 Available R5 M4 2013 2014 Designing Planning

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Factsheet Fujitsu IP & Cores

FASP-M3 reference design concept

Trace JTAG/ SWD

TPIU SWJ-DP

ETM

WIC

Cortex-M3 Core CPU Block

Instruction Data System

HDMAC

AHB BusMatrix

Ahb2Apb SRAM (I code) SRAM (D code) SRAM (work) MEMC CRG EXIU GPIO TIMER UART WDT

APB

MRBC

FASP-M3 reference design block diagram

External Memory

Clock Reset

Fujitsu ARM SoC Prototyping (FASP) I Non application-specific base platform - Only basic peripherals are implemented I Easy customisation, easy chip development - By changing the configuration of Cortex-M3 - By adding or removing peripherals, replace BusMatrix - By changing interrupt signal assignment

Deliverables - Reference design of SoC (RTL) - Simulation environment (Testbench, simulation script) - Boot code (initialisation of Cortex-M3 and peripherals) - Documents (Specifications, User Guide, Implementation Guide)

All company and product trade marks and registered trade marks used throughout this literature are acknowledged as the property of their respective owners.

asic.fseu@de.fujitsu.com http://emea.fujitsu.com/asic
FSEU-C32-02AUG11

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