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High-Speed Communication Circuits and Systems
Lecture 29
Lowpass and Bandpass Delta-Sigma Modulation
Richard Schreier
ANALOG
DEVICES
Copyright © 2003 Richard Schreier
1
Outline
1 ∆Σ Basics
1st-Order Modulator
2 Advanced ∆Σ
High-Order ∆Σ Modulators
Multi-bit and Multi-Stage Modulation
3 Bandpass ∆Σ Modulation
4 Example Bandpass ADC
2
1. ∆Σ Basics
3
st
CTMOD1: A 1 -Order
Continuous-Time ∆Σ Modulator
• The input signal, U, is converted into a sequence
of bits, V ∈ (0,1).
C
R
U
Y V
CK
0,I
4
Properties of CTMOD1
DC Inputs
• Integrator ensures that input current is exactly
balanced by the (average) feedback current
“Infinite resolution”
• Signals which alias to DC are rejected
“Inherent anti-aliasing”
5
Non-ideal Effects in CTMOD1
• Component shifts
R → R+∆R or I→ I+∆I merely changes full-scale.
C → C+∆C scales the output of the integrator,
but does not affect the comparator’s decisions.
• Op-amp offset, input bias current,
DAC imbalance
All translate into a DC offset, which is unimportant in
many communications applications.
• Comparator offset & hysteresis
Overcome by integrator.
• Finite op-amp gain
Creates “dead-bands.”
6
Non-ideal Effects (cont’d)
• DAC jitter
Adds “noise.”
• Resistor nonlinearity (e.g. due to self-heating)
Introduces distortion.
• DAC nonlinearity
Introduces distortion and intermodulation of shaped
quantization noise.
• Capacitor nonlinearity
Irrelevant.
• Op-amp nonlinearity
Same effects as DAC nonlinearity, but less severe.
7
CTMOD1 Model
• Normalize R=1Ω, C=1F, I=1A, Fs=1Hz
Full-scale range is [0,1]V.
• Assume comparator and DAC are delay-free
∫
uc yc y v
vc
DAC
8
Waveforms/Timing
yc u = 0.2
1
Comparator
Threshold
-1 t
vc
v(4) 1
1 V = ---
5
v(0) v(1) v(2) v(3)
0 t
0 1 2 3 4 5 6 7 8 9 10
9
CTMOD1 @ 5% 1’s density
l(r)
l(ck)
v(u)
1
-1
-v(yn)
1
-1
-2
l(v)
0 .1 .2 .3 .4 .5 .6 .7 .8 .9 1
time, x1e-6 Seconds
10
CTMOD1 @ 10% 1’s density
l(r)
l(ck)
v(u)
1
-1
-v(yn)
1
-1
-2
l(v)
0 .1 .2 .3 .4 .5 .6 .7 .8 .9 1
time, x1e-6 Seconds
11
CTMOD1 @ 51% 1’s density
l(r)
l(ck)
v(u)
1
-1
-v(yn)
1
-1
l(v)
0 .1 .2 .3 .4 .5 .6 .7 .8 .9 1
time, x1e-6 Seconds
12
CTMOD1 @1/π 1’s density
l(r)
l(ck)
v(u)
1
-1 1 7
-v(yn) --- ------
1 3 22
0
-1
-2
l(v)
0 .1 .2 .3 .4 .5 .6 .7 .8 .9 1
time, x1e-6 Seconds
13
Analysis of CTMOD1
∫
From the diagram: n
y c(n) = y c(n – 1) + ( u c(τ) – v c(τ) )dτ
n–1
∫
n
2) Observe that v c(τ)dτ = v(n – 1)
n–1
∫
n
3) Define u(n) = u c(τ)dτ
n–1
THEN
y(n) = y(n – 1) + u(n) – v(n – 1)
Also, from the diagram
v(n) = Q(y(n))
14
CTMOD1 Equivalent
MOD1
uc 1 u y v
∫0 dt
z-1
z-1
15
CTMOD1 NTF and STF
• The NTF is the same as MOD1:
z-plane:
NTF(z) = 1 – z –1
16
Frequency Responses
10
NTF
0
-10
STF
dB
-20
-50
0 1 2 3
Frequency (Hz)
17
CTMOD1 Spectra
spec1
0
u = 1/32
-50
dB
-100
spec2
0
-6dB peak
-50
dB
u = FS sine-wave
-100
0 5 10 15 20 25 30 35 40 45 50
freq, x1e6 Hertz
18
Properties of MOD1
• Single-bit quantization yields “inherent linearity.”
The DAC defines two points and two points can
always be joined with a line. (Not so simple in
continuous-time.)
• 0≤u≤1⇒ y ≤1
MOD1 is stable for inputs all the way up to full-scale.
The quantizer in MOD1 does not “overload.”
• Assuming the quantization error is white with
power σ e2 , the in-band noise power is
π 2 σ e2
N 02 ≅ ------------------------3- . ~12-bit performance at OSR=256.
3 ( OSR )
Doubling OSR reduces noise power by a factor of 8.
“1.5 bits increase in SNR per octave increase in
OSR”
19
MOD1 Properties (cont’d)
• DC input u = --a- results in period-b behavior.
b
The spectrum of the error is not white! Spectrum
consists of a finite set of harmonics of f s ⁄ b .
• Irrational DC inputs result in aperiodic behavior.
Nonetheless, the spectrum of the error is still
discrete!
Spectrum consists of an infinite number of tones
with frequencies that are irrational fractions of f s .
• Finite op-amp gain shifts NTF zero inside the
unit circle and allows a range of u values to
produce the same limit cycle.
1
Worst case is around u = 0, 1, --- etc. ;
yields “dead bands.” 2
• The behavior of MOD1 is erratic.
20
2. Advanced ∆Σ
21
A Single-Loop ∆Σ Modulator
E
U L0
Y
V
L1
Y = L0 U + L1 V V = GU + HE , where
1
V = Y+E H = --------------- & G = L 0 H
1 – L1
Inverse Relations:
L1 = 1 – 1/H, L0 = G/H
22
th
A 5 -Order Lowpass NTF
Zeros optimized for OSR=32
• Pole/Zero diagram:
optimization
1 flag
OSR = 32;
H = synthesizeNTF(5,OSR,1);
...
0
23
th
Example: 5 -Order Modulator
1
-1
0 50 100
Time (sample number)
0
-20
-40
dBFS
-60
-80
-100 NBW = 1.8x10–4 fs
(8K-Point FFT)
-120
0 Normalized Frequency (1 → fs ) 0.5
24
SQNR Limits for Binary
Modulators
N=8
N=7
N=6
N=5
140 N=4 N=3
N=2
120
Peak SQNR (dB)
100
N=1
80
60
40
20
0
4 8 16 32 64 128 256 512 1024 OSR
25
Multi-Bit Quantization
Toolbox Conventions
• Single-bit quantizer output interpreted as ±1
instead of 0,1.
Quantizer step size, ∆, is 2; input range is [-1,+1].
• Convention for multi-bit quantization is:
M=1 M=2 M=3
v
3
2 v
1 v 1
y y y
-1 -1 e
-2 e
e -3
mid-tread quantizer; mid-rise quantizer;
v: even integers v: odd integers
26
SQNR Limits for 3-bit Modulators
N=8
N=7
N=6
N=5
N=4 N=3 N=2
140
120
N=1
Peak SQNR (dB)
100
80
60
40
20
0
4 8 16 32 64 128 256 512 1024
OSR
27
Theoretical SNR Limits
for Multi-Bit Modulators
H = 32 N=8
120 ∞
with 1 LSB (peak) input
H ∞ = 16 N=7
SNR (dB) @ OSR = 8
100 H ∞ = 8 N=6
N=5
80 H ∞ = 4
N=4
60 N=3
H ∞
= 2 N=2
40
H ∞ is the max. gain of the NTF
over all frequencies.
20
100 101
29
Digital Correction
Look-up vdig
∫
u v
Table
vdac
DAC
30
Mismatch-Shaping
• Shapes mismatch-induced noise by ensuring
that each element in a unit-element DAC is
driven by a shaped sequence
Two popular forms of mismatch-shaping are
element-rotation and element-swapping.
Thermometer Rotation Swapping
16 16 16
8 8 8
1 1 1
Time Time Time
31
Multi-Stage Modulation
u 2nd-order v1
z -1(2 - z -1)
modulator mod = mod2;
ABCD = mod.ABCD;
x2 [v1 x] = simulateDSM(input,ABCD);
0.25 v v2 = simulateDSM(x(2,:)/4,ABCD);
v = filter([0 2 -1],1,v1) + ...
4*filter([1 -2 1],1,v2);
2nd-order v2
4(1 - z -1)2
modulator OSR=32
0
-20
G = z -1, -40
v1
SQNR = 56 dB
dBFS
H = (1 - z -1)2 -60
-80 v
-100 SQNR = 81 dB
-120 NBW=1.8E-4
Composite NTF is 4H 2 10
-3
10
-2
10
-1
32
∆Σ Toolbox Summary
http://www.mathworks.com/matlabcentral/fileexchange/
Click on Control Systems, then delsig
Specify OSR,
lowpass/bandpass,
no. of Q. levels.
synthesizeNTF scaleABCD
calculateTF
stuffABCD
NTF (and STF) avail- realizeNTF Parameters for a spe- ABCD: state-space
able. cific topology. mapABCD description of the
modulator.
predictSNR, findPIS,
simulateDSM, find2dPIS
simulateSNR
Time-domain simula- Also designLCBP Convex positive
tion and SNR mea- invariant set.
surements. designHBF
simulateESL…
33
3. Bandpass ∆Σ
34
A Bandpass ∆Σ ADC
• Like a lowpass ∆Σ ADC, a bandpass ∆Σ ADC
converts its analog input into a bit-stream
The output bit-stream is essentially equal to the
input in the band of interest.
• A digital filter removes out-of-band noise and
mixes the signal to baseband
–f s ⁄ 2 fs ⁄ 2 –f s ⁄ 2 fs ⁄ 2 fB
35
BP∆Σ Perspective #1
It is just Filtering and Feedback
• Putting the poles of the loop filter at ω0
forces H to have zeros at ω0
• Example system diagram:
Lots of gain at ω0
ω 02
------------------
-
s + ω0
2 2
DAC
36
BP∆Σ Perspective #2
It is just the result of an
“N-Path Transformation”
• z → – z 2 (a “pseudo 2-path transformation”)
applied to H(z) = 1 – z –1 yields H'(z) = 1 + z –2
• This transformation can be applied to any
system that processes DT signals, including SC
filters, digital filters, ∆Σ modulators and even
mismatch-shaping logic
By replacing the state storage elements (registers),
or by interleaving two copies of the original system
and negating alternate inputs and outputs
37
BP∆Σ Perspective #3
It is something New and Valuable
• BP∆Σ offers a way to make a “tuned” ADC
Possibly the only way.
Ideally-suited to narrowband systems, i.e. radios.
• BP∆Σ keeps the signal away from 1/f noise as
well as low-frequency distortion products
Like regular narrowband bandpass systems,
second-harmonic distortion is not problematic.
1,1,-1,-1 1,1,-1,-1
H(z)
z-1 z-1 z-1 -1 OR
H(z)
38
th
A 6 -Order Bandpass NTF
• Pole/Zero diagram:
OSR = 64;
f0 = 1/6;
H=synthesizeNTF(6,OSR,1,[],f0);...
-1
-1 0 1
39
Example Waveform
th
8 -Order fs/8 Bandpass Modulator
v
1
u
–1
0 50 100
Time (sample number)
40
Example Spectrum
th
8 -Order fs/8 Bandpass Modulator
0
SQNR = 100 dB
-20 @ OSR = 64
-40
dBFS/NBW
-60
-80
-100
-120
NBW = 1.8x10–4 fs
-140
0 0.1 0.2 0.3 0.4 0.5
Normalized Frequency (1→fs)
41
Bandpass Modulator Structure
u
Q
Resonator Resonator v
Quantizer
Loop Filter
42
4. Design Example
43
A Dual-Conversion
Superheterodyne Receiver
LNA AGC ADC DSP
LO1 LO2 CK
LO1 LO2 CK
45
Traditional Implementation
MIXER
IF1 IF2
LNA AAF VGA BP ADC
LO2
46
Eliminating the AAF with a
Continuous-Time BP Σ∆ ADC
IF2 gm gm FLASH
IDAC
IDAC
47
Eliminating the Input gm
Mixer
IF1 Remainder
LNA gm
of ADC
LO2 IDAC
48
Merge ADC with Mixer!
MIXER ADC
ADC input is No DC drop!
a current!
TO/FROM
IDAC
LO2 ADC
BACKEND
IF1
LNA V-I CONVERTER
IDAC
LO2
IF1
LNA V-I CONVERTER
LNA/Mixer Tank
• Noise in the ADC backend is attenuated by gm
times the tank impedance
In this work, gm ≈ 10 mA/V
51
Zeff
• Near resonance, |ZL| = |ZC|
|ZL,C| ≈ 300Ω in this design
• At resonance, |Z| ≈ Q • |ZL,C|
About 6kΩ for Q = 20 ⇒ gmZ ≈ 60.
• More generally, the effective tank impedance is
found by integrating the input-referred noise
over the band of interest:
∫ ∫
v 2 v 2
v
-------------------
2
2 dω = ------------------
- dω = -------
n n n
g m Y (ω ) g m Z eff
g m Z(ω)
⇒ Z eff = ( Y rms ) –1
52
Z vs. Frequency
10K
Ideal
Zeff = 7K Q = 20
5K Zeff = 4.4K
Z
2K
1K
0.07 f0
Make an oscillator:
Off-chip
tank
Cap. array
Negative-gm
54
Remainder of ADC?
ADC Flash
Backend
IDAC
55
Second Resonator?
ADC Flash
Backend
IDAC
–
+ ? Flash
–
+
57
Complete ADC
L C 9-Level
RC SC Flash Data
out
IF1 LNA/
LO2 Mixer IDAC DEM
9 mA 2 mA 3 mA 1 mA 1 mA
RC SC Flash
IF1
LNA Mixer IDAC DEM
10-300
MHz
LO2
Full-Scale Adjust
59
Noise vs. Full-Scale
15
Input-Referred Noise
(dB relative to a 300Ω resistor)
10 Total
LNA/Mixer
0 RC a t ch
i s m AC T h e r m al o n
M ID t i
IDAC
n tiza
u a
Q
SC
-30 dBm -18 dBm
50 mVpp Full-Scale 200 mVpp
60
Measured STF & NTF
0
STF
Measured
–20 STF
dBFS/NBW
–40 f0 = fCLK/8
NTF (scaled)
–60
Measured
PSD
NBW = 5.9 kHz
–80
fCLK = 32 MHz
–100
0 4 8 12 16
Frequency (MHz)
61
In-Band Spectrum (OSR=48)
0
SNR = 81 dB fIF1 = 103 MHz
-20 fCLK = 26 MHz
dBFS/NBW
-40
SFDR = 103dB
-60
-80
-100
-120
BW = 270 kHz
NBW = 200Hz
-140
-150 -100 -50 0 50 100 150
Frequency Offset (kHz)
62
In-Band Spectrum (OSR=900)
0
SNR = 92 dB fIF1 = 73 MHz
-20 fCLK = 36 MHz
dBFS/NBW
-40
SFDR = 106dB
-60
-100
60
OSR = 48
40
20
FS range: –30 to –18 dBm
DR = 90 dB
0
-110 -90 -70 -50 -30 -10 Pin (dBm)
64
Architectural Highlights
Performing a component-count/performance/
power trade-off in each resonator section results
in a multi-bit, hybrid continuous-time/discrete-
time architecture.
Sch
100 reie
r 20
02
Jantzi/Ferguson Vel
dho
1994 ven
200
80 Salo 2002 3
Ueno 2002 Tabatabaei 2000
Hairapetian 1996
Norman
1996
60
Henkel
2002
Bulzachelli
2003 Raghavan
40 Salo 2002 1997
10 kHz 1 MHz 100 MHz
Bandwidth
67
Summary
• ∆Σ is fun
All kinds of exotic behavior: limit-cycles, dead-bands
sub-harmonic locking and even chaotic dynamics!
• ∆Σ is a rich field
ADCs and DACs; Single-bit and Multi-bit; Single-
stage and Multi-stage; Lowpass and Bandpass;
Discrete-time and Continuous-time…
• A bandpass ∆Σ ADC converts an IF signal into
digital form and can do so with high dynamic
range and low power consumption
With wideband or tunable modulators, conversion of
RF to digital may soon be feasible.
ADC = “Antenna to Digital Converter”
68