Signal integrity

Signal integrity or SI is a set of measures of the quality of an electrical signal. In digital electronics, a stream of binary values is represented by a voltage (or current) waveform. However, digital signals are fundamentally analog in nature, and all signals are subject to effects such as noise, distortion, and loss. Over short distances and at low bit rates, a simple conductor can transmit this with sufficient fidelity. At high bit rates and over longer distances or through various mediums, various effects can degrade the electrical signal to the point where less-than-ideal conditions (errors) occur, and the system or device fails. Signal integrity engineering is the task of analyzing and mitigating these effects. Some of the main issues of concern for signal integrity are ringing, crosstalk, ground bounce, distortion, signal loss, and power supply noise.

Finding IC signal integrity problems

Typically, an IC designer would take the following steps for SI verification:

Perform a layout extraction to get the parasitics associated with the layout. Usually worst-case parasitics and best-case parasitics are extracted and used in the simulations. For ICs, unlike PCBs, physical measurement of the parasitics is almost never done, since in-situ measurements with external equipment are extremely difficult. Furthermore, any measurement would occur after the chip has been created, which is too late to fix any problems observed. Create a list of expected noise events, including different types of noise, such as coupling and charge sharing. Create a model for each noise event. It is critical that the model be as accurate as possible. For each signal event, decide how to excite the circuit so that the noise event will occur.

Create a SPICE (or another circuit simulator) netlist that represents the desired excitation, to include as many effects (such as parasitic inductance and capacitance, and various distortion effects) as possible. Run SPICE simulations. Analyze the simulation results and decide whether any re-design is required. It is common to analyze the results with an eye pattern and by calculating a timing budget[3].

Modern signal integrity tools for IC design perform all these steps automatically, producing reports that give a design a clean bill of health, or a list of problems that must be fixed. However, such tools generally are not applied across an entire IC, but only selected signals of interest.

Fixing IC signal integrity problems

Once a problem is found, it must be fixed. Typical fixes for IC on-chip problems include:

Removing impedance discontinuities. Finding places where significant shifts in the impedance exist and adjusting the geometry of the path to shift the impedance to better match the rest of the path. Driver optimization. You can have too much drive, and also not enough. Buffer insertion. In this approach, instead of upsizing the victim driver, a buffer is inserted at an appropriate point in the victim net. Aggressor downsizing. This works by increasing the transition time of the attacking net by reducing the strength of its driver. Add Shielding. Add shielding of critical nets or clock nets using GND and VDD shields to reduce the effect of Crosstalk. (This technique may lead to routing overhead.) Routing changes. Routing changes can be very effective in fixing noise problems, mainly by reducing the most troublesome coupling effects via separation.

Each of these fixes may possibly cause other problems. This type of issue must be addressed as part of design flows and design closure. Re-analysis after design changes is a prudent measure.