UNIT - I 1.

Computer Architecture gives priority to A) Structure and Behavior of the computer B) The way hardware components operate

C) The type of hardware to be used in the computer D) How to attach various parts of hardware Ans: A 2.The register that stores the instruction which is under execution is A) MAR Ans. D 3. A digital computer with more than one processor is called ______________. Ans. Multiprocessor System 4. The part of the hardware of computer that controls the transfer of information between computer and the outside A) Memory Unit Ans. C 5. The 1' s complement of decimal number 21 in binary is A) 10101 B) 01010 C) 11001 D) 01011 Ans. B 6. Signed 2's complement representation of +14 with eight bits is A) 10001110 B) 10001010 C) 00001110 D) 00011100 Ans. C 7. Signed magnitude representation of -7 with eight bits is A) 00000111 Ans. D 8. Which of the following is a normalized number A) 1011011 B) 01011011 C) 00101101 D) 01100101 Ans. A 9. Odd parity generator can be implemented using A) Only Exclusive - OR function C) both Exclusive - OR & Exclusive - Nor function B) Only Exclusive - Nor function D)None B) 111110111 C) 01110111 D) 10000111 B) Control Unit C) Input-Output Unit D) ALU B) MDR C) PC D) IR

Ans. C 10. If a 3 bit message 110 is transmitted with suffix of odd parity bit , the resultant message is A) 1100 Ans. B 11. In floating point representation, the fixed point mantissa A) is a fraction Ans. C 12. In which of the following representation a negative number consists of the magnitude and a negative sign A) Signed Magnitude representation C) Signed-2s complement representation Ans. A 13. Which of the following code detects and corrects single bit error occurred during transmission A) Error detection code B) Error correction code C) Both D) None Ans. B 14. A floating point number is said to be normalized if the A) Least significant digit of the mantissa is zero C) Most significant digit of the mantissa is zero Ans. D 15. Convert 111101100 to octal equivalent A) 652 Ans. C 16. 9s complement of 2389 A) 6120 B) 7611 C) 6121 D) 7610 Ans. D 17. PC points to the address of A) Current Instruction B) Next Instruction C) Previous Instruction D) None Ans. B 18. The advantage with normalized floating-point number is A) provide maximum possible precision B) provide minimum possible precision B) 745 C) 754 D) 625 B) Least significant digit of the mantissa is non-zero D) Most significant digit of the mantissa is non-zero B) Signed-1s complement representation D) All B) is an integer c) may be fraction or integer D) None B) 1101 C) 0110 D) 0011

C) does not provide precision Ans. A

D) None

19) If 3 bit messages are transmitted suffixing with P (even) bit the erroneous message is A) 0101 B) 0110 C) 0100 D) 1010 Ans. C 20) 10s compliment of 3412 A) 6587 B) 6589 C)6586 D)6588 Ans. D 21) The most common error detection code used is the _______ bit. (A) logic Ans. C UNIT-II 1. The operations executed on data stored in registers are called ________ (a) Arithmetic operations Ans. b 2. _________ microoperation are used for serial transfer of data (a) Data Manipulation (b) Logical Ans. c 3. Full form of RISC is __________ Ans. Reduced Instruction Set Computer 4. The register that holds the address for the stack is called ____________ (a) Register stack (b) Stack Pointer Ans. b 5. In Instruction format ____________ field specifies the operation to be performed. (a) operation code Ans. a (b) address field (c) Mode field (d) none (c) Memory Stack (d) none (c) Shift (d) none (b) Microoperations (c) Manipulation operations (d) none (B) binary (C) parity (D) none

6. ADD R1, A, B represents ___________ type of instruction. (a) one-address Ans. C 7. The transfer of information from a memory word to the outside environment is called _____ operation. (a) Write Ans. b 8. R3 R1+R2 represents ________ microoperation. Ans. Arithmetic 9. An arithmetic shift right divides the number by _________ (a) 3 Ans. b 10. Status bits are also called as _______ (a) flag bits Ans. C 11. The collection of all status bit conditions in the CPU is called ________ (a) PSW Ans. a 12. ___________ instruction designates a transfer from processor register to memory. (a) load Ans. b 13. Prefix notation is also called as _________ notation. (a) Infix Ans. b 14. The step involved in instruction cycle _________ (a) Fetch (b) Decode (c) execute (d) all Ans. d (b) Polish (c) Reverse Polish (d) none (b) store (c) call (d) none (b) interrupts (c) counter (d) register (b) condition-code bits (c) both a & b (d) none (b) 2 (c) 4 (d) none (b) Read (c) both a &b (d) none (b) Two address (c) Three address (d) Zero address

15. The processing required for a single instruction is called an ________________ (a) Program cycle (b) Instruction cycle (c) both a & b (d) none Ans. b 16. _____ is a processor register (a) PC Ans. d 17. ______ interrupt is initiated by executing an instruction (a) External Ans. c 18. The common bus scheme can be implemented using (a) Multiplexers (b) Tri-state bus buffers Ans. c 19. _____ field provides a way to determine the operand or its effective address (a) opcode Ans. b 20. Full form of CISC____________ Ans. Complex Instruction Set Computer 21. The function denoted by arithmetic operation F=A+B+1 is (a) Add with carry (b) Add (c) Subtract (d)none Ans. a 22. Match the following: 1. Immediate i.) Multiple memory references 2. Direct ii.) No memory reference 3. Indirect iii.) One memory reference Ans. 1:ii, 2:iii, 3:i (b) Mode (c) Address (d) none (c) a or b (d) none (b) Internal (c) Software (d) none (b) IR (c) DR (d) AC

UNIT-III 1. A Control unit whose binary control variables are stored in memory is called

2.

3. 4.

5.

6.

7.

8.

9. 10. 11. 12. 13.

[a] Hardwired control unit [b] Micro Programmed Control Unit [c] Memory control Unit [d] none A Programming which permits a micro program to be loaded initially from an auxiliary memory is [a] micro programming [b] Machine programming [c] Dynamic programming [d] none A computer that employs Micro Programmed Control unit will have ___ separate memories [a] one [b] two [c] three [d] four The next address generator is called as [a] Address Sequencer [b] adder [c] Generator [d] none A micro Program sequencer determine the address sequence of [a] present instruction [b] next instruction [c] both [d] none The data register in the micro programmed control sometimes called as [a] Pipeline register [b] processor register [c] general purpose register [d] none The only component in the control system which receives the clock pulses is [a] Control Address Register [b] Control Data register [c] sequencer [d] control memory In a micro Program sequencer an external register which is used to store the return address is [a] Processor register [b] data register [c] address register [d] Subroutine register Machine instruction format consists of ____ fields [a] 2 [b]3 [c] 4 [d]5 Micro instruction format consists of ____ fields [a] 2 [b]3 [c] 4 [d]5 Symbolic Micro instruction format consists of ____ fields [a] 2 [b]3 [c] 4 [d]5 In a Micro instruction format Branch field consists of ____ number of bits [a] 2 [b]3 [c] 4 [d]5 In a Micro instruction format condition field consists of ____ number of bits [a] 2 [b]3 [c] 4 [d]5

14. An example of Hardwired control unit is [a] RISC Computers [b] CISC Computers [c] both [d] none 15. An example of Micro Programmed control unit is [a] RISC Computers [b] CISC Computers [c] both [d] none 16. NOP Stands for [a] None operation [b] No Operation [c] Blank Operation [d] none 17. The Branch instructions depends on [a] opcodes [b] condition [c] address [d] none 18. In a Micro instruction format opcode field consists of ____ number of bits [a] 3 [b]7 [c] 9 [d]21

19. In a Micro instruction format address field consists of ____ number of bits [a] 3 [b]7 [c] 9

[d]21

UNIT-IV 1. In Decimal Arithmetic operations decimal number are stored in (a) BCD form (b) Octal form (c) Hexadecimal form (d) binary form Ans. a 2. Multiplication of two floating point numbers requires (a) Subtraction of exponents and division of mantissas (b) Addition of exponents and multiplication of mantissas (c) Subtraction of exponents and multiplication of mantissas (d) None Ans. b 3. Division of two floating point numbers requires (a) Subtraction of exponents and division of mantissas (b) Addition of exponents and multiplication of mantissas (c) Subtraction of exponents and multiplication of mantissas (d) None Ans. a 4. In decimal multiplication the sequence counter (SC) is set to (a) Overflow bit (b) no.of digits in multiplier (c) both (d) none Ans. b 5. Addition of signed BCD numbers can be performed using (a) 9s complement (b) 10s complement (c) a or b (d)none Ans. c 6. 9s complement of 23 is (a) 67 (b) 42 (c)14 (d) 76 Ans. d