IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO.

5, MAY 2011

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A Generalized Scalar PWM Approach With Easy Implementation Features for Three-Phase, Three-Wire Voltage-Source Inverters
Ahmet M. Hava, Member, IEEE, and N. Onur Cetin, Student Member, IEEE
AbstractThe generalized scalar pulse width modulation (PWM) approach, which unites the conventional PWM methods and most recently developed reduced common mode voltage PWM methods under one umbrella, is established. Through a detailed example, the procedure to generate the pulse patterns of these PWM methods via the generalized scalar PWM approach is illustrated. With this approach, it becomes an easy task to program the pulse patterns of various high performance PWM methods and benet from their performance in modern three-phase, threewire voltage-source inverters for applications such as motor drives, PWM rectiers, and active lters. The theory is veried by laboratory experiments. Easy and successful implementation of various high-performance PWM methods is illustrated for a motor drive. Index TermsCarrier, common-mode voltage, discontinuous PWM (DPWM), generalized scalar PWM, inverter, modulation, near state PWM (NSPWM), pulse width modulation (PWM), PWM implementation, scalar, space vector, space vector PWM (SVPWM), zero sequence.

Fig. 1.

Circuit diagram of a PWM-VSI drive connected to an R-L-E type load.

I. INTRODUCTION

HREE-PHASE, three-wire voltage-source inverters (VSI) are widely utilized in ac motor drive and utility interface applications requiring high performance and high efciency. In Fig. 1, the standard three-phase two-level VSI circuit diagram is illustrated. The classical VSI generates ac output voltage from dc input voltage with required magnitude and frequency by programming high-frequency rectangular voltage pulses. The carrier-based pulse width modulation (PWM) technique is the preferred approach in most applications due to the low-harmonic distortion waveform characteristics with well-dened harmonic spectrum, xed switching frequency, and implementation simplicity. Carrier-based PWM methods employ the per-carrier cycle volt-second balance principle to program a desirable inverter output voltage waveform [1]. In every PWM cycle, the reference voltage, which is xed over the PWM cycle, corresponds to a xed volt-second value. According to the volt-second balance principle, the inverter output voltages made of rectangular voltage pulses must result in the same volt-seconds as this reference volt-second value.

Fig. 2. Triangle intersection PWM phase a modulation wave v a , switching signal and va o voltage.

Manuscript received April 12, 2010; revised September 7, 2010; accepted September 9, 2010. Date of current version June 22, 2011. Recommended by Associate Editor J. A. Pomilio. The authors are with the Department of Electrical and Electronics Engineering, Middle East Technical University, Ankara 06531, Turkey (e-mail: hava@eee.metu.edu.tr; ocetin@eee.metu.edu.tr). Digital Object Identier 10.1109/TPEL.2010.2081689

There are two main implementation techniques for carrierbased PWM methods: 1) scalar implementation and 2) space vector implementation. In the scalar approach, as shown in Fig. 2, for each inverter phase, a modulation wave is compared with a triangular carrier wave [using analog circuits or digital hardware units (PWM units) as conventionally found in motor control microcontroller or DSP chips] and the intersections dene the switching instants for the associated inverter leg switches. In the space vector approach, as illustrated in the space vector diagram in Fig. 3, the time lengths of the inverter states are precalculated for each carrier cycle by employing space vector theory and the voltage pulses are directly programmed [2], [3]. The mathematics involved in the scalar method modulation waves and the space vector calculations is related. With proper modulation waves, the scalar and space vector PWM pulse patterns can be made identical [1]. Thus, both techniques may have equivalent performance results. But the

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Fig. 3. Voltage space vectors of three-phase two-level inverter. The upper switch states are shown in the brackets (Sa + , Sb + , Sc + ). 1 is ON and 0 is OFF state.

scalar approach is simpler than the space vector approach from the implementation perspective as the involved computations are generally fewer and less complex [1][9]. Based on the scalar or vector approach, there are various PWM methods proposed in the literature which differ in terms of their voltage linearity range, ripple voltage/current, switching losses, and high-frequency common mode voltage/current properties. The conventional sinusoidal PWM (SPWM) [10], space vector PWM (SVPWM) [3], discontinuous PWM1 (DPWM1) [11], and the recently developed active zero state PWM (AZSPWM) methods [12], [13], near state PWM (NSPWM) [14], and remote state PWM (RSPWM) [15] methods, are a few (and the most important ones) to name. In particular, the last few have been recently developed with the quest for reducing the VSI common mode voltage (CMV) magnitude [16]. However, the implementation of these methods is not easy and not reported in the literature to sufcient depth. Furthermore, the relation between the conventional and recently developed reduced CMV (RCMV) PWM methods is not well understood both in terms of implementation characteristics and performance characteristics. Therefore, difculties arise in implementing and understanding the performance attributes of these PWM methods. This paper rst reviews the PWM principles and establishes a general scalar approach that treats the conventional and RCMV PWM methods, and unites most methods under one umbrella. The paper then reviews the pulse patterns and performance of the popular PWM methods, and provides guidance for simple practical implementation which is favorable over the conventional methods (space vector or scalar [1][9]). The experimental results verify the feasibility of the proposed approach. II. REVIEW OF THE CARRIER-BASED PWM PRINCIPLES The PWM approach is based on the per-carrier cycle voltsecond balance principle, which is a generally applicable principle to all power electronic converters. According to this principle, in a PWM period (TS ), the average value of the output voltage is equal to the reference value. Thus, an output voltage with a desirable value is obtained by creating a reference voltage

and matching this reference voltage with the pulse width modulated inverter output voltages for each PWM period. Therefore, the fundamental constraint in programming the PWM pulses for each phase involves the volt-seconds balance. In scalar PWM, the reference (modulation) wave of each phase (va , vb , vc ) is compared with a carrier wave (vtri ) and the intersections dene the switching instants for switches of the associated inverter phase leg (see Fig. 2). The period of the carrier wave is equal to one PWM period (TS ). In a PWM period, if the modulation wave is larger (smaller) than carrier wave, the upper switch is ON (OFF). The upper and lower switches of each leg operate in complementary manner (Sa + = 1 Sa = 0). The per-carrier cycle average value of the voltage of one VSI leg output (vao ) (phase to dc bus midpoint voltage) is equal to the reference value of that leg ( va ) due to the volt-second balance principle. The fundamental output voltage (may be obtained by removing the PWM ripple from the output voltage) has the same waveform as the modulation wave. If a sinusoidal fundamental output voltage is wanted, then a modulation wave consisting of sinusoidal form with proper fundamental frequency and magnitude is compared with the high-frequency carrier wave. In a three-phase VSI, under balanced operating conditions, the reference voltages of each leg have the same shape but they are 120 phase shifted from each other. To obtain sinusoidal output voltages, in the scalar implementation three symmetric and 120 phase shifted sinusoidal modulation waves are compared with the carrier wave and this method is called as the conventional SPWM method, which has been used in motor drives for many decades [10]. However, in three-phase, three-wire VSIs, constraining the reference modulation waves to pure sinusoidal form is not favorable in most cases, as will be discussed in the following. In three-phase, three-wire inverters where the neutral point of the load is isolated, no neutral current path exists (except for very high frequencies where circuit parasitic capacitances establish a current ow path) and only the inverter line-to-line voltages determine the load current subcarrier frequency content. Thus, the n-o potential in Fig. 1, which will be symbolized with vno , can be freely varied. In such applications, any common bias voltage (zero-sequence signal (v0 ) can be added (injected) to the SPWM reference voltages (modulation waves). The injection of a zerosequence signal simultaneously shifts each reference wave in the vertical direction (with respect to the carrier wave). Therefore, the inverter line-to-line voltage per-carrier cycle average value is not affected. However, v0 changes the position of the output line-to-line voltage pulses (see Fig. 8). Therefore, it signicantly inuences the harmonic distortion, voltage linearity, and switching frequency characteristics [1], [2], [17], [18]. With a proper zero-sequence signal injection (theoretically, innite choices exists! [1]), the overall inverter performance increases substantially over SPWM. Ever since this advantage has been understood, the zero-sequence signal injection technique has been in wide utilization in practice. Obtained with zero-sequence signal injection, SVPWM [1], [3], [18] and DPWM1 [11], [19] are two highly popular examples. While the former method provides low harmonic distortion, the latter yields low switching losses. Furthermore, compared to SPWM,

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both methods extend the voltage linearity range of the VSI by 15% [20], [21]. In three-phase, three-wire VSIs, not only the modulation waves, but also the carrier waves are per phase and can be arbitrarily selected. The carrier waves may be triangular or sawtooth, for each phase. The carrier of a phase may be phase shifted with respect to the carriers of other phases. It may even be at a different frequency. In all these cases, the volt-seconds balance is not affected and the per-carrier cycle average value of the VSI leg output voltage is retained. In three-phase VSIs, conventionally one common triangular carrier wave is utilized for all phases due to its symmetric switching sequence which results in low harmonic distortion, low switching loss, and one switching at a time characteristics. While this constraint allows easy implementation of conventional PWM methods, it also constrains the variety of PWM methods with the scalar implementation, as will be discussed in the next section. The aforementioned discussions indicate that in the scalar implementation both the zero-sequence signal and the carrier signals allow degrees of freedom to obtain various PWM pulse patterns with substantial differences in performance. While some of these possibilities have been explored in the past, some others are undiscovered. The next section will formally treat the subject and explore the possibilities. However, the space vector approach, as a different approach to form the PWM pulse pattern from the scalar approach requires a brief review at this stage. This is because some PWM methods with favorable pulse patterns have been rst invented based on the space vector approach [12], [13] and their scalar equivalents will be found during the aforementioned discussed exploration state. While the space vector implementation of such pulse patterns is laborious, to be obtained with aid of the generalized scalar PWM approach, the scalar method-based equivalents are easy to implement. Thus, it is important to show the pulse pattern equivalency and implementation advantage. In the space vector approach, employing the complex variable transformation, the time domain phase reference voltages are translated to the complex reference voltage vector (V ) with the magnitude (V1m ) that rotates in the complex coordinates with the e t angular speed (see Fig. 3) in the following equation:

Fig. 4. Voltage space vectors and 60 sector denitions. (a) A-type region. (b) B-type region.

the calculated duty cycles:

7

V k tk = V T S
k =0 7

(2)

tk = TS .
k =0

(3)

Each PWM method utilizes different voltage vectors, vector time lengths, and sequences. Therefore, the vector space is divided into segments. There are six A-type and six B-type segments available (see Fig. 4). Investigations reveal that all space vector PWM methods utilize either A-type or B-type segments, and the utilized voltage vectors of these PWM methods alternate at the boundaries of the corresponding segments [16]. For example, the space vector implemented SVPWM and AZSPWM1 utilize A-type and NSPWM utilizes B-type segments [14], [16]. In the space vector approach, the implementation is straightforward, but quite laborious [2][9]. The space vectors segments must be found and vector duty cycles must be calculated. Then, given a vector sequence, the phase switch duty cycles are calculated and loaded to the PWM counter of the PWM generator of a control board of the VSI. Should the reference voltage tip point fall out of the inverter voltage hexagon (overmodulation condition [20], [21]), then corrections to the vector duty calculations or recalculations with the modied reference vector become necessary. Thus, the direct space vector implementation is always a difcult task for a PWM generator. Section III provides the generalized scalar PWM implementation approach which overcomes the involved procedure and computations. III. GENERALIZED SCALAR PWM APPROACH The generalized scalar PWM approach provides degrees of freedom in the choice of both the zero-sequence signal and the carrier waves [22]. First, the zero-sequence signals can be arbitrarily generated, but generating them based on the phase reference voltages (original modulation signals) provides signicant advantages. Until present, most useful PWM pulse patterns could be obtained by this approach [1], [18]. Therefore, in most cases, the zero-sequence signals are obtained by evaluating the reference voltages. Second, the carrier waves of different phases can be selected arbitrarily. However, recent studies have illustrated that employing triangular carrier waves at the same frequency, and selecting the phase relation between the

V =

2 v + avb + a2 vc =V1m ej e t , where a = ej (2 /3) . 3 a (1)

Since there are eight possible inverter states available, the vector transformation yields eight voltage vectors as shown in Fig. 3. Of these voltage vectors, six of them (V1 , V2 , V3 , V4 , V5 , V6 ) are active voltage vectors, and two of them (V0 and V7 ) are zero-voltage vectors (which provide degree of controllability similar to the zero-sequence signal of the scalar implementation) which generate zero output voltage. In the space vector analysis, the duty cycles of the voltage vectors are calculated according to the vector volt-second balance rule dened in the following equations, and these voltage vectors are applied with

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Fig. 5. Block diagram of the generalized carrier-based scalar PWM employing the zero-sequence signal injection principle and multicarrier signals.

Fig. 7. Modulation waveforms and zero-sequence signals of the popular PWM methods (Mi = 0.7).

signal injected modulation waves, the duty cycle of each switch can be easily calculated in the following for both single and multicarrier methods: dx+ = 1 2 1+
vx Vdc /2

for x {a, b, c}

(7) (8)

dx = 1 dx+ ,

for x {a, b, c} .

Fig. 6. Block diagram of the conventional scalar PWM method employing zero-sequence signal injection and a common triangular carrier wave.

carrier waves of different phases based on the voltage references yields favorable results [14], [23], [24]. As a result, the generalized scalar PWM approach will favor such constraints for the purpose of keeping the scope of the paper within practical boundaries. Further relaxing the constraints and investigating alternative pulse patterns with favorable characteristics is a subject matter of future research. Given the described set of constraints, the generalized block diagram of scalar PWM approach with zero-sequence signal injection principle is illustrated in Fig. 5. In the generalized scalar approach; according to the original three-phase sinusoidal reference signals (voltage references with single star superscripts) and zero-sequence signals, the nal reference (modulation) signals (voltage references with double star superscripts) are generated. Then, the individual modulation and carrier waves are compared to determine the associated inverter leg switch states and output voltages. In the conventional approach (see Fig. 6), which is the special case of generalized approach, only one triangular carrier wave is utilized for all phases. In the scalar representation, the modulation waves are dened as follows:
va = va + v0 = V1m cos(e t) + v0 vb = vb + v0 = V1m cos e t vc = vc + v0 = V1m cos e t +

It is helpful to dene a modulation index (Mi , voltage utilization level) term at this stage. For a given dc-link voltage (Vdc ), the ratio of the fundamental component magnitude of the line to neutral inverter output voltage (V1m ) to the fundamental component magnitude of the six-step mode voltage (V1m -6 -step = 2Vdc /) is termed the modulation index Mi [1] Mi = V1m V1m -6 -step (9)

(4) + v0 + v0 (5) (6)

2 3 2 3

where va , vb , and vc are the original sinusoidal reference signals and v0 is the zero-sequence signal. Using the zero-sequence

There are two commonly used zero-sequence signals in practical applications (see Fig. 7). For both cases, simple magnitude rules described in [1] are utilized to generate these signals. The zero-sequence signal of the widely utilized continuous PWM (CPWM) methods is generated by employing the minimum magnitude test which compares the magnitudes of the threephase original reference signals and selects the signal which has minimum magnitude [1]. Scaling this signal by 0.5, the zerosequence signal of these CPWM methods is found. Assume |va | |vb |, |vc |, then v0 = 5 va . This modulation wave is recognized as SVPWM modulation wave in [1]. Inside the voltage linearity region, in the CPWM methods, the modulation waves are always within the carrier triangle peak boundaries; within every carrier cycle, the triangle and modulation waves intersect, and ON and OFF switchings always occur. In discontinuous PWM (DPWM) methods, the zero-sequence signal is injected such that reference signal of one phase is always clamped to the positive or negative dc bus. The clamped phase is alternated throughout the fundamental cycle. In the most common DPWM modulation wave (in the literature recognized as the DPWM1 modulation wave), the phase signal which is the largest in magnitude is clamped to the dc bus with the same polarity [1]. Assume |va | |vb |, |vc |, then v0 = (sign(va )) (Vdc /2) va . The inverter leg whose modulation wave is clamped to the dc bus is not switched, therefore, switching losses are reduced in DPWM methods. The two popular zero-sequence signal

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TABLE I AZSPWM1, AZSPWM3, AND NSPWM SPACE VECTOR REGION DEPENDENT POLARITY ALTERNATING CARRIER SIGNALS

experimental performance [16], so they are not considered practical. However, it can be shown that they can be included under the generalized scalar PWM umbrella. In the alternating polarity triangular carrier wave methods, the alternating triangle polarities, for example those in Table I, can be obtained by determining the regions of Fig. 4. This goal can be easily achieved by comparing the modulation waves. For example, the va vb , vc condition corresponds to the A1 region. Such operations can be very easily performed with the PWM units of the modern digital signal processors used in ac motor drives and PWM rectiers. Before getting involved in implementation details and experimental results, the aforementioned discussed PWM methods will be reviewed in terms of pulse patterns and performance. IV. PULSE PATTERNS AND PERFORMANCE CHARACTERISTICS OF POPULAR PWM METHODS Since a large number of PWM methods exist and each method with unique pulse pattern yields unique performance characteristics, full investigation of all PWM methods in regard to their pulse pattern and performance is a laborious task. However, the theoretically innite choice of methods, in practice reduces to a relatively small count when a systematic evaluation and performance comparison (among the many methods) is made. References [1], [2], and [16] involve such thorough investigation of large count of PWM methods and in conclusion it appears that only the popular methods discussed in this paper deserve signicant attention. This section aims to review the popular PWM methods with the focus on their pulse patterns such that in the following section the practical implementation can be discussed to sufcient depth. Observing the pulse patterns, the performance characteristics can be studied, and thus major advantages of these methods can be recognized. Therefore, while reviewing the pulse patterns of the popular methods, it will also be possible to demonstrate why these methods are so well accepted. The pulse pattern of SVPWM is illustrated in Fig. 8 for the region A1 [see Fig. 4(a)]. With equally partitioned two zero states [(0 0 0) and (1 1 1)], SVPWM provides very low PWM ripple and provides voltage linearity for the modulation index range of 0 < Mi < 0.907. As it has symmetric zero stages, from the PWM ripple reduction perspective SVPWM is the best method. But as Mi increases the ripple also increases and it looses its advantage around Mi 0.6 where discontinuous PWM methods can be used [1]. For example increasing the switching frequency by 50% and employing the DPWM1 method (of which the pulse pattern is illustrated in Fig. 9(a) for region A1B2 of Fig. 4), the switching count and, therefore, the switching losses remain the same (as one of the phases ceases switching during the PWM period) while the ripple of DPWM1 becomes less compared to SVPWM. Due to reduction of the total zero state duty cycles at high Mi and 50% increase of the carrier frequency (decrease of the carrier cycle), the effect of the zero states on ripple decreases and they can be lumped as one [1]. Thus, low ripple or low loss results. Consequently, SVPWM at low Mi , and DPWM1 at high Mi have been widely used. It has been illustrated that transition

injection CPWM and DPWM method waveforms are shown in Fig. 7 along with the zero-sequence signal. SPWM is the naive form, where no zero-sequence signal is injected. Using the discussed CPWM modulation wave along with a common triangular carrier wave for all phases, SVPWM method yields. Likewise, using the discussed DPWM modulation wave along with a common triangular carrier wave for all phases, DPWM1 yields. Using the same modulation waves, but varying the triangle polarities (resulting in multicarrier waves, vtri -a , vtri -b , vtri -c ) additional methods yield. For example, the triangular carrier wave polarities can be alternated according to the regions dened in Fig. 4. Taking the common triangular carrier vtri as reference, three carrier wave alternating (multicarrier) patterns are given in Table I. The rst pattern along with the CPWM modulation waveform yields AZSPWM1. The second pattern with the same modulation wave yields AZSPWM3 [12]. The third pattern along with the DPWM waveform yields NSPWM. Thus, with only the two modulation waves, and polarity controlled triangular carrier waves, all the high-performance PWM methods could be covered. Note that all the popular PWM methods reported in [1] which have different modulation waves than the aforementioned methods use common triangle and fall under the same umbrella and can be treated with the generalized scalar PWM approach. Thus, the proposed approach is broad and covers most methods reported in the literature. Considering that the methods reported in this paper (both conventional and the recently developed RCMVPWM methods) and the other conventional methods reviewed in [1] are the most popular methods (due to their superior performance when compared to other methods), the approach yields sufcient results from the practical utilization perspective. Using the proposed approach and creating a variety of triangular carrier wave patterns and modulation wave shapes, further PWM pulse patterns, and thus new methods can be invented. This paper will be conned to the methods discussed in this paragraph. Also note that SPWM with multicarrier signals, which has been studied in [23] and found to have quite limited performance, is not discussed in this paper. RSPWM1-23 [15], [16] and AZSPWM2 [13] are two RCMV-PWM methods reported that are not included in the study either. These methods have simultaneous phase switching problem constraining their

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Fig. 8. The PWM cycle view of modulation signals, inverter upper switch logic signals, phase and line-to-line voltages, and common mode voltage of SVPWM.

Fig. 9. Pulse patterns of various PWM methods. (a) DPWM1 in region A1B2. (b) NSPWM in region B2. (c) AZSPWM1 in region A1. (d) AZSPWM3 in region A1.

between methods is seamless (the load current is not disturbed) and a combination of the two methods has been successfully used in commercial drives. However, for both SVPWM and DPWM1, as shown at the bottom of the pulse pattern diagrams, the inverter CMV is high. In motor drive applications, higher CMV is associated with increased common mode current (motor leakage current), higher risk of nuisance trips, and reduced bearing life [24][26]. The CMV of the three-phase VSI is dened as the potential of load star point with respect to the midpoint of dc bus of the inverter and the CMV at the inverter output can be expressed as follows: vcm = vao + vbo + vco . 3 (10)

According to (10), the CMV of SPWM, SVPWM, and DPWM1 methods (and all other common carrier wave PWM methods), may take the values of Vdc /6 or Vdc /2, depending on the inverter switch states. As these methods utilize zero vectors V0 and V7 , a CMV of Vdc /2 and Vdc /2 can be created. This high CMV is illustrated in Figs. 8 and 9(a) at the bottom traces. Since they do not utilize zero states, NSPWM, AZSPWM1, and AZSPWM3 (and all other RCMV PWM methods) avoid a CMV with a magnitude of Vdc /2 and their CMV magnitude is conned to Vdc /6. The CMV traces of Fig. 9(b)(d) demonstrate this advantage. Thus, these methods can be favorable over SVPWM and DPWM1 in CMV sensitive applications.

Comparing the pulse patterns of Fig. 9(a) and (b), it can be observed that NSPWM is a discontinuous PWM method and it yields equivalent advantages to DPWM1 in terms of switching loss reduction. This is obtained differently from the DPWM1 method. While in DPWM1 one of the zero states is avoided, in NSPWM both zero states are avoided and an active vector is introduced instead. The switching count reduction is obtained by proper sequencing the voltage vectors. Similar to DPWM1, its ripple is low in the high Mi range as the active vectors close to the reference voltage vector dominate [14]. The main disadvantage of NSPWM involves voltage linearity. NSPWM is only linear in the range of 0.61 Mi 0.907 (DPWM1 linearity range: 0 < Mi < 0.907). While in PWM rectier applications this range is sufcient, in motor drives operation at low Mi is required and NSPWM must be combined with another method [27]. In motor drive applications, operating at low Mi and obtaining low CMV is possible by employing AZSPWM1 or AZSPWM3 in this range. As shown in Fig. 9(c) and (d), the two AZSPWM methods yield low CMV with Vdc /6 magnitude and AZSPWM3 has a lower CMV frequency which is favorable. However, it has simultaneous switching actions which may yield undesirable results of motor terminal overvoltages or increased leakage current during switching instants (similar to RSPWM and AZSPWM2). As a result, while AZSPWM1 has found application [24], AZSPWM3 has been cautiously approached. It should also be noted that AZSPWM methods have very high ripple at low Mi (due to the fact that the zero states are replaced with active vectors with opposite direction to the reference voltage vector) and at high Mi they are inferior to NSPWM as the

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switching losses are higher [16]. Thus, although they are linear in the range of 0 < Mi < 0.907, AZSPWM methods should only be used in regions where all other methods do not meet the performance requirements of an inverter drive. It should be noted that in all PWM methods, the injected zerosequence signal is a low-frequency signal (periodic at 3 e and/or its multiples, lower than the carrier frequency by at least an order of magnitude) which causes low-frequency CMV. At such frequencies the parasitic circuit components (capacitances) are negligible (open-circuit) and, therefore, the zero-sequence voltage has no detrimental effect on the drive and yields no common mode current (CMC), unless low common mode impedance path is provided by lter congurations included in the drive for the purpose of ripple reduction [28], [29]. High-frequency CMV, on the other hand, can be harmful and can be reduced by PWM pulse pattern modication. Thus, the high-frequency CMV effects (at the carrier frequency and higher) have been considered here. V. IMPLEMENTATION In this section, the practical implementation of the PWM methods of Section IV is discussed. The modulation waves of the discussed methods, which are shown in Fig. 7 are generated according to the simple magnitude rule approach discussed in Section III. Only several comparisons among the three sinusoidal references (original modulation waves) and several algebraic operations are necessary to obtain the zero-sequence signal, as shown in Section III via examples. Having obtained the zerosequence signal, it is added to the original modulation waves and the nal modulation signals result. From these signals, the duty cycles are calculated according to (7) and (8). The duty cycles are checked and bounded to the range of 0 to 1 (in case overmodulation condition occurs). For SVPWM and DPWM1, a common triangular carrier wave and for AZSPWM1, AZSPWM3, and NSPWM using a common triangular carrier wave but alternating its polarity according to Table I, are generated. Determining the triangle polarity also involves only a comparison of the sinusoidal references. These operations can be lumped together with the zero-sequence signal determination stage to further minimize the computational burden. This task is left to the implementation engineer as a straightforward procedure. Once the nal modulation signals and triangles are obtained, the remaining task involves the sine-triangle comparison stage. This comparison is performed to determine the switching instants via a comparator for each phase. The scalar PWM implementation of all the discussed methods is an easy task compared to the space vector implementation (discussed at the end of Section II). The implementation can be best realized on digital PWM units such as the modern motion control or power management microcontrollers and DSP chips (which involve a well developed software programmable digital PWM unit) [30] or dedicated FPGA units [31][33]. Most modern commercial drives and power converters utilize such control chips which are offered at economical price. Thus, the approach can be readily employed in most power converter control platforms. Employing such digital platforms, and con-

Fig. 10. PWM pulse pattern generation mechanism of the EPWM unit of the TMS320F2808 for (a) active high (vtri ), (b) active low (vtri ).

sidering the simplicity of the scalar PWM algorithms, it is easy to program (combine) two or more PWM methods and online select a modulator in each operating region in order to obtain the highest performance [1]. Combination of SVPWM at low Mi and DPWM1 at high Mi is common in industrial drives. Combination of AZSPWM methods at low Mi and NSPWM at high Mi is an alternative approach for low CMV requiring applications [27]. While operating at high Mi (such as full speed operation of a drive or PWM rectier operating under the normal operating range), overmodulation condition may occur due to dynamics or other line or load variation conditions. In such cases, the treatment of overmodulation can be included in the algorithm as a gain correction step as reported in [20], [21]. Since the gain functions of the discussed modulation waves are provided in [21] the compensation is an easy task. VI. EXPERIMENTAL RESULTS In the laboratory, the discussed PWM methods are implemented using the Texas Instruments TMS320F2808 xed-point DSP chip. In this chip, the PWM signals are generated by the enhanced PWM (EPWM) module of the DSP [30] which is a hardware digital circuit dedicated for the purpose of generating the PWM signals. The PWM period (thus the switching frequency), the deadtime, etc. are all parameters that are controlled by the user via software. The EPWM module includes an internal counter clock (termed as PERIOD) which corresponds to the triangular carrier wave. The value of this counter denes the half of the PWM period. One carrier cycle is completed as the counter counts up from 0 to PERIOD and then decrements down to 0 again. For every PWM cycle, the perphase duty cycles are calculated rst. Then, the duty cycles are converted to the count number as they are scaled with the PERIOD. Since the EPWM module has two comparator registers (COMPA and COMPB) per phase, the count number, its complementary, zero (0), or PERIOD value are loaded to these counters depending on the pulse pattern to be generated. In this application, the switching rule is dened as the PWM signal of the upper switch of an inverter phase (for instance, Sa + ) is at logic level 1 when the counter value is between the loaded values of comparator register A (COMPA) and comparator register B (COMPB) comparator registers (see Fig. 10), and at logic 0 otherwise (Sa logic is complementary of Sa + ).

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The conventional PWM pulse patterns [see Figs. 8 and 9(a)] are generated such that the PWM cycle starts and ends with the upper switches in the high 1 state, (often termed as active high [24]) except for the PWM periods where the switching ceases in DPWM methods. Generating this pulse pattern, which is shown in Fig. 10(a), involves loading register COMPB with the zero 0 value, and register COMPA with the Sa + duty cycle da + PERIOD. Methods involving PWM periods with active low (corresponding to the vtri case), corresponding to the pulse pattern of Fig. 10(b), require loading the register COMPA with the value PERIOD and the register COMPB with its complementary (1 da + )PERIOD. Thus, conventional methods use only the pulse pattern of Fig. 10(a), while RCMV-PWM methods use both. The PWM pulse pattern generation procedure is summarized in the owchart of Fig. 11 for AZSPWM1. Note that the zero-sequence signal generation and the alternating triangle determination (region R determination) stages are gathered for reduced computations. While the owchart is generated for AZSPWM1, the approach is the same and straightforward for all other discussed methods. Employing the scalar implementation approach and utilizing the TMS320F2808 DSP platform, PWM signals are programmed and applied to a three-phase VSI. Inverter upper switch (Sa + , Sb + , and Sc + ) logic signals and the inverter output common mode voltage (vcm ) waveforms for two PWM periods are shown in Fig. 12(a) and(b) for SVPWM and AZSPWM1, respectively (compare with Figs. 8 and 9(c), respectively). This demonstrates that all the intended pulse patterns can be easily generated. Note that SVPWM utilizes zero vectors (000) and (111) which cause a CMV of Vdc /2 and Vdc /2, respectively. In AZSPWM1, only active switch states are utilized; thus, the CMV is limited to Vdc /6. Fig. 13 shows inverter output voltages (vao , vbo , vco ) and the line-to-line voltages (vab ) of SVPWM and AZSPWM1. While in SVPWM the line-toline voltages are unipolar, AZSPWM1 line-to-line voltages are bipolar [16]. Bipolar voltage pulses result in higher output current ripple compared to unipolar voltage pulses, and they may cause overvoltages at the motor terminals in long-cable applications [14]. However, solutions for these problems have been provided in [24] and [27] as a part of the PWM algorithm. A 4 kW, 1440 min1 , 380 Vllrm s induction motor is driven from the VSI in the constant V/f mode (176.7 Vrm s /50 Hz) and the PWM frequency is 6.6 kHz for CPWM methods and 10 kHz for DPWM methods to provide equal average switching frequency. Operation at Mi = 0.8 (180.3 Vrm s /51 Hz, 1510 min1 ) is discussed. The modulation waves (obtained by passing switch logic signals through a low-pass lter designed for the purpose of illustration of the modulation method), phase currents, common mode voltage and currents of the considered methods are shown in Fig. 14. As can be seen from the diagrams all the discussed methods provide satisfactory performance at the high Mi . NSPWM provides low motor current ripple and CMV/CMC. SVPWM and DPWM1 have low current ripple but high CMV/ CMC. AZSPWM3 has high CMV and CMC magnitude compared to NSPWM, but its CMV/CMC frequency is less. AZSPWM1 has higher PWM current ripple and comparable CMV/CMC to NSPWM.

Fig. 11.

PWM pulse pattern generation owchart for AZSPWM1.

The aforementioned waveforms demonstrate that the various PWM methods can be easily implemented with the generalized scalar PWM approach. As a result, the inverter design engineers can choose among the offered various PWM methods based on the performance requirement of the application and easily implement one of the methods or a combination of various methods. Thus, the PWM method implementation procedure becomes an easy task. It should be noted that various choices exist in terms

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Fig. 12. Experimental inverter upper switch (Sa + , Sb + , Sc + ) logic signals (top three, 5 V/div) and the inverter output CMV (vc m ) (bottom, 200 V/div) waveforms: (a) SVPWM and (b) AZSPWM1 (time scale: 20 s/div).

Fig. 13. Experimental inverter output voltages (va o , vb o , vc o ) (top three, 100 V/div) and the line-to-line voltage (va b ) (bottom, 200 V/div) waveforms: (a) SVPWM and (b) AZSPWM1 (time scale: 20 s/div).

of implementation platforms. Especially high control bandwidth applications such as servodrives and vector controlled industrial drives are increasingly employing FPGA units for current regulation and PWM pulse pattern generation due to fast response and exible programming capability of FPGA units [31][33].

Fig. 14. Experimental phase current (top, 2 A/div), CMC (top, 500 mA/div), CMV (bottom, 200 V/div), and modulation signal (bottom, 0.2 unit/div), waveforms (Mi = 0.8, fs -ave = 6.6 kHz). (a) SVPWM. (b) AZSPWM1. (c) AZSPWM3. (d) DPWM1. (e) NSPWM. (time scale: 2 ms/div).

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In FPGAs, it is possible to program any pulse pattern that generalized scalar PWM approach covers.

VII. CONCLUSION PWM principles are reviewed for three-phase, three-wire inverter drives. The characteristics, pulse patterns, and implementation of the popular PWM methods are discussed. The generalized scalar PWM approach is established and it is shown that it unites the conventional PWM methods and most recently developed reduced common mode voltage PWM methods under one umbrella. Through a detailed example, the method to generate the pulse patterns of these PWM methods via the generalized scalar PWM approach is illustrated. It is shown that the generalized scalar approach yields a simple and powerful implementation with modern control chips which have digital PWM units. With this approach, it becomes an easy task to program the pulse patterns of various high performance PWM methods and benet from their performance in modern VSIs for applications such as motor drives, PWM rectiers, and active lters. The theory is veried by laboratory experiments. It is demonstrated that with the proposed approach both the conventional PWM pulse patterns (such as those of SVPWM and DPWM1) and the recently developed improved high-frequency common mode voltage/current performance method pulse patterns (NSPWM, AZSPWM1, and AZSPWM3) can be easily generated. Applying such pulse patterns to motor drives, it has been demonstrated that NSPWM, AZSPWM1, and AZSPWM3 methods provide good performance. Thus, the inverter design engineers are encouraged to include such pulse patterns in their designs.

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Ahmet M. Hava (S91M98) was born in Mardin, Turkey, in 1965. He received the B.S. degree from Istanbul Technical University, Istanbul, Turkey, in 1987, and the M.Sc. and Ph.D. degrees from the University of Wisconsin, Madison, in 1991 and 1998, respectively, all in electrical engineering. In 1995, he was with Rockwell AutomationAllen Bradley Company, Mequon, WI,. From 1997 to 2002, he was with Yaskawa Electric America, Inc., Waukegan,IL,. Since 2002, he has been with the Department of Electrical and Electronics Engineering, Middle East Technical University, Ankara, Turkey, where he is currently an Associate Professor. His research interests include power electronics, motor drives, and power quality.

N. Onur Cetin (S10) was born in Ankara, Turkey, in 1985. He received the B.S. degree from Baskent University, Ankara, in 2007, and the M.Sc. degree from Middle East Technical University, Ankara, in 2010, both in electrical engineering. Since 2008, he has been a Research Assistant with the Department of Electrical and Electronics Engineering, Middle East Technical University. His current research interests include voltage-source inverters, PWM methods, and common-mode noise, and its reduction techniques in ac motors.