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SG3526 Pulse Width Modulation Control Circuit

The SG3526 is a high performance pulse width modulator integrated circuit intended for fixed frequency switching regulators and other power control applications. Functions included in this IC are a temperature compensated voltage reference, sawtooth oscillator, error amplifier, pulse width modulator, pulse metering and steering logic, and two high current totem pole outputs ideally suited for driving the capacitance of power FETs at high speeds. Additional protective features include soft start and undervoltage lockout, digital current limiting, double pulse inhibit, adjustable dead time and a data latch for single pulse metering. All digital control ports are TTL and Bseries CMOS compatible. Active low logic design allows easy wiredOR connections for maximum flexibility. The versatility of this device enables implementation in singleended or pushpull switching regulators that are transformerless or transformer coupled. The SG3526 is specified over a junction temperature range of 0 to +125C. 8.0 V to 35 V Operation

PULSE WIDTH MODULATION CONTROL CIRCUIT

SEMICONDUCTOR TECHNICAL DATA

18 1

5.0 V 1% Trimmed Reference 1.0 Hz to 400 kHz Oscillator Range Dual Source/Sink Current Outputs: 100 mA Digital Current Limiting Programmable Dead Time Undervoltage Lockout Single Pulse Metering Programmable SoftStart Wide Current Limit Common Mode Range Guaranteed 6 Unit Synchronization

N SUFFIX PLASTIC PACKAGE CASE 707

PIN CONNECTIONS
+Error Error Compensation 1 2 3 4 5 6 7 8 9 (Top View) 18 Vref 17 VCC 16 Output B 15 Ground 14 VC 13 Output A 12 Sync 11 RDeadtime 10 CT

Representative Block Diagram

CSoftStart
Vref VCC Ground Sync RDeadtime RT CT Reset CSoftStart 18 17 Reference Regulator 15 12 11 9 Oscillator 10 Under Voltage Lockout To Internal Circuitry 14 VC 13 Output A 5 4 3 VCC 1 2 7 6 8 + + Amp + SQ D Q Soft Start Memory F/F S RQ Toggle F/F Q T Q 16 Output B

Reset CS +CS Shutdown RT

Compensation

+Error Error +C.S. C.S. Shutdown

ORDERING INFORMATION
Device SG3526N Operating Temperature Range TJ = 0 to +125C Package Plastic DIP
Rev 2

Metering F/F

Motorola, Inc. 1996

MOTOROLA ANALOG IC DEVICE DATA

SG3526
MAXIMUM RATINGS (Note 1)
Rating Supply Voltage Collector Supply Voltage Logic Inputs Analog Inputs Output Current, Source or Sink Reference Load Current (VCC = 40 V, Note 2) Logic Sink Current Power Dissipation TA = +25C (Note 3) TC = +25C (Note 4) Thermal Resistance JunctiontoAir Thermal Resistance JunctiontoCase Operating Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10 Seconds) PD 1000 3000 RJA RJC TJ Tstg TSolder 100 42 +150 65 to +150 300 C/W C/W C C C IO Iref Symbol VCC VC Value +40 +40 0.3 to +5.5 0.3 to VCC 200 50 15 Unit Vdc Vdc V V mA mA mA mW

NOTES: 1. Values beyond which damage may occur. 2. Maximum junction temperature must be observed. 3. Derate at 10 mW/C for ambient temperatures above +50C. 4. Derate at 24 mW/C for case temperatures above +25C.

RECOMMENDED OPERATING CONDITIONS

Characteristics Supply Voltage Collector Supply Voltage Output Sink/Source Current (Each Output) Reference Load Current Oscillator Frequency Range Oscillator Timing Resistor Oscillator Timing Capacitor Available Deadtime Range (40 kHz) Operating Junction Temperature Range Symbol VCC VC IO Iref fosc RT CT TJ Min 8.0 4.5 0 0 0.001 2.0 0.001 3.0 0 Max 35 35 100 20 400 150 20 50 +125 Unit Vdc Vdc mA mA kHz k F % C

MOTOROLA ANALOG IC DEVICE DATA

SG3526
ELECTRICAL CHARACTERISTICS (VCC = +15 Vdc, TJ = Tlow to Thigh [Note 5], unless otherwise noted.)
Characteristics REFERENCE SECTION (Note 6) Reference Output Voltage (TJ = +25C) Line Regulation (+8.0 V VCC +35 V) Load Regulation (0 mA IL 20 mA) Temperature Stability Total Reference Output Voltage Variation (+8.0 V VCC +35 V, 0 mA IL 20 mA) Short Circuit Current (Vref = 0 V) (Note 2) UNDERVOLTAGE LOCKOUT Reset Output Voltage (Vref = +3.8 V) Reset Output Voltage (Vref = +4.8 V) OSCILLATOR SECTION (Note 7) Initial Accuracy (TJ = +25C) Frequency Stability over Power Supply Range (+8.0 V VCC +35 V) Frequency Stability over Temperature (TJ = Tlow to Thigh) Minimum Frequency (RT = 150 k, CT = 20 F) Maximum Frequency (RT = 2.0 k, CT = 0.001 F) Sawtooth Peak Voltage (VCC = +35 V) Sawtooth Valley Voltage (VCC = +8.0 V) ERROR AMPLIFIER SECTION (Note 8) Input Offset Voltage (RS 2.0 k) Input Bias Current Input Offset Current DC Open Loop Gain (RL 10 M) High Output Voltage (VPin 1VPin 2 +150 mV, Isource = 100 A) Low Output Voltage (VPin 2VPin 1 +150 mV, Isink = 100 A) Common Mode Rejection Ratio (RS 2.0 k) Power Supply Rejection Ratio (+12 V VCC +18 V)
NOTES: 2. Maximum junction temperature must be observed. 5. Tlow = 0C Thigh = +125C 6. IL = 0 mA unless otherwise noted. 7. fosc = 40 kHz (RT = 4.12 k 1%, CT = 0.01 F 1%, RD = 0 ) 8. 0 V VCM +5.2 V.

Symbol

Min

Typ

Max

Unit

Vref Regline Regload Vref/T Vref ISC

4.90 4.85 25

5.00 10 10 10 5.00 80

5.10 30 50 5.15 125

V mV mV mV V mA

2.4

0.2 4.8 3.0 0.5

0.4 8.0 1.0

V V

fosc V CC fosc TJ fmin fmax Vosc(P) Vosc(V)

% %

2.0

400 0.45

0.5 3.0 0.8

3.5

Hz kHz V V

VIO IIB IIO AVOL VOH VOL CMRR PSRR

60 3.6 70 66

2.0 350 35 72 4.2 0.2 94 80

10 2000 200 0.4

mV nA nA dB V V dB dB

MOTOROLA ANALOG IC DEVICE DATA

SG3526
ELECTRICAL CHARACTERISTICS (continued)
Characteristics PWM COMPARATOR SECTION (Note 7) Minimum Duty Cycle (VCompensation = +0.4 V) Maximum Duty Cycle (VCompensation = +3.6 V) DIGITAL PORTS (SYNC, SHUTDOWN, RESET) Output Voltage (High Logic Level) (Isource = 40 A) (Low Logic Level) (Isink = 3.6 mA) Input Current High Logic Level (High Logic Level) (VIH = +2.4 V) (Low Logic Level) (VIL = +0.4 V) CURRENT LIMIT COMPARATOR SECTION (Note 9) Sense Voltage (RS 50 ) Input Bias Current SOFTSTART SECTION Error Clamp Voltage (Reset = +0.4 V) CSoftStart Charging Current (Reset = +2.4 V) OUTPUT DRIVERS (Each Output, VC = +15 Vdc, unless otherwise noted.) Output High Level Isource = 20 mA Isource = 100 mA Output Low Level Isink = 20 mA Isink = 100 mA Collector Leakage, VC = +40 V Rise Time (CL = 1000 pF) Fall Time (CL = 1000 pF) Supply Current (Shutdown = +0.4 V, VCC = +35 V, RT = 4.12 k)
NOTES: 7. fosc = 40 kHz (RT = 4.12 k 1%, CT = 0.01 F 1%, RD = 0 ) 8. 0 V VCM +5.2 V 9. 0 V VCM +12 V

Symbol

Min

Typ

Max

Unit

DCmin DCmax

45

49

% %

V VOH VOL IIH IIL 2.4 4.0 0.2 125 225 0.4 A 200 360

Vsense IIB

80

100 3.0

120 10

mA A

ICS 50

0.1 100

0.4 150

V A

VOH 12.5 12 VOL IC(leak) tr tf ICC 0.2 1.2 50 0.3 0.1 18 0.3 2.0 150 0.6 0.2 30 13.5 13

A s s mA

MOTOROLA ANALOG IC DEVICE DATA

SG3526
Figure 2. Reference Voltage as a Function Supply Voltage

Figure 1. Reference Stability over Temperature

V ref , REFERENCE VOLTAGE (V) 50 25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (C) 150

5.0 4.0 3.0 2.0 1.0 1.0 2.0 3.0 4.0 5.0 10 20 30 40 VCC, SUPPLY VOLTAGE (V)

50 mV Spec Limit

75

Figure 3. Error Amplifier Open Loop Frequency Response

8.0 7.0 A Vol , VOLTAGE GAIN (dB) SHUTDOWN VOLTAGE (V)
CComp

Figure 4. Current Limit Comparator Threshold

80 60 40 20 0 10 100
1 2 + _ 100 pF 3

6.0 5.0 4.0 3.0 2.0 1.0

1.0 k

10 k

100 k

1.0 M

10 M

0 25 50 75 100 125 150 175 200 DIFFERENTIAL INPUT VOLTAGE (mV)

f, FREQUENCY (Hz)

8.0 7.0 RESET VOLTAGE (V) 6.0 5.0 4.0 3.0 2.0 1.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 Vref, REFERENCE VOLTAGE (V)

V sat , OUTPUT DRIVER SATURATION VOLTAGE (V)

Figure 5. Undervoltage Lockout Characteristic

Figure 6. Output Driver Saturation Voltage as a Function of Sink Current

2.5

2.0 1.5 1.0 0.5 0 2.0

5.0

10

20

50

100

200

OUTPUT DRIVER SINK CURRENT (mA)

MOTOROLA ANALOG IC DEVICE DATA

SG3526
Figure 7. VC Saturation Voltage as a Function of Sink Current
2.5 V SAT , SATURATION VOLTAGE (V) 2.0 1.5 1.0 0.5 0 2.0 200 R T, TIMING RESISTOR (k ) 100 50 20 10 5.0 2.0 0.005 0.01 0.02 0.002
RD = 0

Figure 8. Oscillator Period

0.05 0.1 0.2 0.5

1.0 2.0

OSCILLATOR PERIOD (ms)

Figure 9. Error Amplifier

VCC

Figure 10. Undervoltage Lockout

Vref

Q6 To Reset R1 + 1.2V Bandgap Reference Q12 100A 14A Q10 Q2 1.0k 500 1.0k 1 + Error 500 3 Compensation 100A R2 To Driver A To Driver B

Q5 125 A Q3 50A 50A Q4

Vref

Q11

14A Q7 Q1 Q8

100 A Q9

Error

Figure 11. Pulse Processing Logic

Memory F/F Sync S Q PWM D Q Metering F/F PWM The memory FlipFlop prevents double pulsing in a pushpull configuration by remembering which output produced the last pulse. S R Q Clock

The metering FlipFlop is an asynchronous data latch which suppresses high frequency oscillations by allowing only one PWM pulse per oscillator cycle.

MOTOROLA ANALOG IC DEVICE DATA

100 200 500 1000

5.0

10 20 50 IC, SINK CURRENT (mA)

100

200

5.0 10 20 50

SG3526
APPLICATIONS INFORMATION Figure 12. Extending Reference Output Current Capability Figure 13. Error Amplifier Connections
Negative Output Voltage

C* Vref 27 VCC 17 Reference Regulator 15 Gnd * May be required with some types of transistors Vout = Vref R1 + R2 R2 R3 = R1R2 R1 + R2 18 + 10F Gnd Vref R3 1 + 2 R2 R1 Positive Output Voltage Gnd R3 Vref R2

R1 1 + 2

Vout = Vref

R1 R2

Figure 14. Oscillator Connections

Figure 15. Foldback Current Limiting

Output Filter RS +

11

SG3526

12

Sync 8

6 R1 + 7 R2 Vout

RD

10

RT

CT 0.1 V + I(max) =

Gnd Vout R1 R1 + R2 RS ISC =

0.1 V RS

Figure 16. SoftStart Circuity

Figure 17. Driving VMOS Power FETs

+12V

Vref 100 A

+ Error Error Reset

1 2 5

Ramp

PWM +

Error Amp Q2 Q1

14 VC A 13 SG3526 B 16

Gnd To Undervoltage Lockout

Q3

CSoftStart The totem pole output drivers of the SG3526 are ideally suited for driving the input capacitance of power FETs at high speeds.

MOTOROLA ANALOG IC DEVICE DATA

SG3526
Figure 18. HalfBridge Configuration
+V Supply R1 C1 14 VC A 13 SG3526 Gnd 15 B 16 T1 Q1 T2 Q2 C2 8 4 C1 S 5 14 VC A B SG3526 +CS 13 16 7 6 R3 D1 D2 Q1 +V Supply R1 C2 R4 T1

Figure 19. Flyback Converter with Current Limiting

CS CS Gnd 15

R2

In the above circuit, current limiting is accomplished by using the current limit comparator output to reset the softstart capacitor.

Figure 20. SingleEnded Configuration

+V Supply R1 Q1 To Output Filter R2 14 VC SG3526 B Gnd 15

Figure 21. PushPull Configuration

+V Supply R1 C1 14 VC 13 R2 Q1 C2 16 R3 Q2 T1

13 16

SG3526 B

Gnd 15

MOTOROLA ANALOG IC DEVICE DATA

SG3526
OUTLINE DIMENSIONS
N SUFFIX PLASTIC PACKAGE CASE 70702 ISSUE C
NOTES: 1. POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. MILLIMETERS MIN MAX 22.22 23.24 6.10 6.60 3.56 4.57 0.36 0.56 1.27 1.78 2.54 BSC 1.02 1.52 0.20 0.30 2.92 3.43 7.62 BSC 0_ 15_ 0.51 1.02 INCHES MIN MAX 0.875 0.915 0.240 0.260 0.140 0.180 0.014 0.022 0.050 0.070 0.100 BSC 0.040 0.060 0.008 0.012 0.115 0.135 0.300 BSC 0_ 15 _ 0.020 0.040

18 1

10

B
9

A C L
DIM A B C D F G H J K L M N

N F H G D
SEATING PLANE

K M J

MOTOROLA ANALOG IC DEVICE DATA

SG3526

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10

MOTOROLA ANALOG IC DEVICE DATA SG3526/D

*SG3526/D*