74HC164; 74HCT164

8-bit serial-in, parallel-out shift register

Rev. 03 4 April 2005 Product data sheet

1. General description
The 74HC164; 74HCT164 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specied in compliance with JEDEC standard no. 7A. The 74HC164; 74HCT164 are 8-bit edge-triggered shift registers with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (DSA or DSB); either input can be used as an active HIGH enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied HIGH. Data shifts one place to the right on each LOW-to-HIGH transition of the clock (CP) input and enters into Q0, which is the logical AND of the two data inputs (DSA and DSB) that existed one set-up time prior to the rising clock edge. A LOW level on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs LOW.

2. Features
s s s s Gated serial data inputs Asynchronous master reset Complies with JEDEC standard no. 7A ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Specied from 40 C to +85 C and 40 C to +125 C.

3. Quick reference data

Table 1: Quick reference data GND = 0 V; Tamb = 25 C; tr = tf = 6 ns. Symbol Type 74HC164 tPHL, tPLH propagation delay CP to Qn MR to Qn CL = 15 pF; VCC = 5 V CL = 15 pF; VCC = 5 V 12 11 ns ns Parameter Conditions Min Typ Max Unit

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 1: Quick reference data continued GND = 0 V; Tamb = 25 C; tr = tf = 6 ns. Symbol fmax CI CPD Type 74HCT164 tPHL, tPLH propagation delay CP to Qn MR to Qn fmax CI CPD maximum clock frequency input capacitance power dissipation capacitance per package
CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz fo = output frequency in MHz N = number of inputs switching (CL VCC2 fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in Volts For HC the condition is VI = GND to VCC. For HCT the condition is VI = GND to VCC 1.5 V.
[1] [3]

Parameter maximum clock frequency input capacitance power dissipation capacitance per package

Conditions CL = 15 pF; VCC = 5 V

[1] [2]

Min -

Typ 78 3.5 40

Max -

Unit MHz pF pF

CL = 15 pF; VCC = 5 V CL = 15 pF; VCC = 5 V CL = 15 pF; VCC = 5 V

14 16 61 3.5 40

ns ns MHz pF pF

[1]

[2] [3]

4. Ordering information
Table 2: Ordering information Package Temperature range 74HC164N 74HC164D 74HC164DB 74HC164PW 74HCT164N 74HCT164D 40 C to +125 C 40 C to +125 C 40 C to +125 C 40 C to +125 C 40 C to +125 C 40 C to +125 C Name DIP14 SO14 SSOP14 TSSOP14 DIP14 SO14 Description plastic dual in-line package; 14 leads (300 mil) plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm plastic shrink small outline package; 14 leads; body width 5.3 mm Version SOT27-1 SOT108-2 SOT337-1 Type number

plastic thin shrink small outline package; 14 leads; body SOT402-1 width 4.4 mm plastic dual in-line package; 14 leads (300 mil) plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm SOT27-1 SOT108-2

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

2 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 2:

Ordering information continued Package Temperature range Name SSOP14 TSSOP14 Description plastic shrink small outline package; 14 leads; body width 5.3 mm Version SOT337-1

Type number

74HCT164DB 74HCT164PW 74HCT164BQ

40 C to +125 C 40 C to +125 C 40 C to +125 C

plastic thin shrink small outline package; 14 leads; body SOT402-1 width 4.4 mm SOT762-1

DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad at package; no leads; 14 terminals; body 2.5 3 0.85 mm

5. Functional diagram
SRG8 8 9 1 2

C1/ R
3 4 5 6 10 11 12 13
001aac424

DSA DSB

3 1 2 4 5 6 10

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

&

1D

CP MR

8 9

11 12 13
001aac423

Fig 1. Logic symbol

Fig 2. IEC logic symbol

DSA DSB CP MR

1 2 8 9 3 4 5 6 10 11 12 13 8-BIT SERIALIN/PARALLELOUT SHIFT REGISTER

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
001aac425

Fig 3. Logic diagram

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

3 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

DSA D DSB Q D Q D Q D Q D Q D Q D Q D Q

CP FF1 RD

CP FF2 RD

CP FF3 RD

CP FF4 RD

CP FF5 RD

CP FF6 RD

CP FF7 RD

CP FF8 RD

CP MR

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7
001aac616

Fig 4. Functional diagram

6. Pinning information
6.1 Pinning
DSA 2 3 4 5 6 7 GND CP 8 1 14 VCC 13 Q7 12 Q6 11 Q5 10 Q4 9 MR

terminal 1 index area DSA DSB Q0 Q1 Q2 Q3 GND 1 2 3 4 5 6 7

001aac422

14 VCC 13 Q7 12 Q6

DSB Q0 Q1 Q2

164
GND(1)

164

11 Q5 10 Q4 9 8 MR CP

Q3

001aac828

Transparent top view

(1) The die substrate is attached to the exposed die pad using conductive die attach material. It can not be used as a supply pin of input.

Fig 5. Pin conguration DIP14, SO14, SSOP14 and TSSOP14

Fig 6. Pin conguration DHVQFN14

6.2 Pin description

Table 3: Symbol DSA DSB Q0 Q1 Q2 Q3
9397 750 14693

Pin description Pin 1 2 3 4 5 6 Description data input data input output output output output
Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

4 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register
Pin description continued Pin 7 8 9 10 11 12 13 14 Description ground (0 V) clock input (LOW-to-HIGH, edge-triggered) master reset input (active LOW) output output output output positive supply voltage

Table 3: Symbol GND CP MR Q4 Q5 Q6 Q7 VCC

7. Functional description
7.1 Function selection
Table 4: Operating modes Function table [1] Input MR H H H H
[1]

Output CP X DSA X l l h h DSB X l h l h Q0 L L L L H Q1 to Q7 L to L q0 to q6 q0 to q6 q0 to q6 q0 to q6

Reset (clear) L Shift

H = HIGH voltage level h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition L = LOW voltage level I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition q = lower case letters indicate the state of the referenced input one set-up time prior to the LOW-to-HIGH clock transition = LOW-to-HIGH clock transition

8. Limiting values
Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC IIK IOK IO ICC, IGND Tstg
9397 750 14693

Parameter supply voltage input diode current output diode current output source or sink current VCC or GND current storage temperature

Conditions VI < 0.5 V or VI > VCC + 0.5 V VO < 0.5 V or VO > VCC + 0.5 V VO = 0.5 V to VCC + 0.5 V

Min 0.5 65

Max +7 20 20 25 50 +150

Unit V mA mA mA mA C

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

5 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 5: Limiting values continued In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Ptot Parameter total power dissipation DIP14 package SO14; SSOP14; TSSOP14; DHVQFN14 package
[1] [2] For DIP14 packages: Ptot derates linearly with 12 mW/K above 70 C. For SO14 packages: Ptot derates linearly with 8 mW/K above 70 C. For SSOP14 and TSSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
[1] [2]

Conditions

Min -

Max 750 500

Unit mW mW

9. Recommended operating conditions

Table 6: Symbol VCC VI VO tr, tf Recommended operating conditions Parameter supply voltage input voltage output voltage input rise and fall time VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Tamb VCC VI VO tr, tf Tamb ambient temperature supply voltage input voltage output voltage input rise and fall time ambient temperature VCC = 4.5 V Type 74HCT164 4.5 0 0 40 5.0 6.0 6.0 VCC VCC 500 +125 V V V ns C Conditions Min 2.0 0 0 40 Typ 5.0 6.0 Max 6.0 VCC VCC 1000 500 400 +125 Unit V V V ns ns ns C

Type 74HC164

10. Static characteristics

Table 7: Static characteristics for 74HC164 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter HIGH-level input voltage Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V Min 1.5 3.15 4.2 Typ 1.2 2.4 3.2 Max Unit V V V Tamb = 25 C

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

6 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 7: Static characteristics for 74HC164 continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIL Parameter LOW-level input voltage Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V ILI ICC CI VIH input leakage current quiescent supply current input capacitance HIGH-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V ILI ICC
9397 750 14693

Min 1.9 4.4 5.9 3.98 5.48 1.5 3.15 4.2 1.9 4.4 5.9 3.84 5.34 -

Typ 0.8 2.1 2.8 2.0 4.5 6.0 4.32 5.81 0 0 0 0.15 0.16 3.5 -

Max 0.5 1.35 1.8 0.1 0.1 0.1 0.26 0.26 0.1 8.0 0.5 1.35 1.8 0.1 0.1 0.1 0.33 0.33 1.0 80

Unit V V V V V V V V V V V V V A A pF V V V V V V V V V V V V V V V V A A

VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V

Tamb = 40 C to +85 C

input leakage current quiescent supply current

VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V

Rev. 03 4 April 2005

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

7 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 7: Static characteristics for 74HC164 continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter HIGH-level input voltage Conditions VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VIL LOW-level input voltage VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V VOH HIGH-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 2.0 V IO = 20 A; VCC = 4.5 V IO = 20 A; VCC = 6.0 V IO = 4 mA; VCC = 4.5 V IO = 5.2 mA; VCC = 6.0 V ILI ICC input leakage current quiescent supply current VI = VCC or GND; VCC = 6.0 V VI = VCC or GND; IO = 0 A; VCC = 6.0 V 1.9 4.4 5.9 3.7 5.2 Min 1.5 3.15 4.2 Typ 0.1 0.1 0.1 0.4 0.4 1.0 160 V V V V V A A V V V V V Max 0.5 1.35 1.8 Unit V V V V V V Tamb = 40 C to +125 C

Table 8: Static characteristics for 74HCT164 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH VIL VOH Parameter HIGH-level input voltage LOW-level input voltage HIGH-level output voltage Conditions VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = 20 A; VCC = 4.5 V IO = 4 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 4.5 V IO = 4 mA; VCC = 4.5 V ILI ICC ICC input leakage current quiescent supply current additional quiescent supply current per input pin input capacitance
Rev. 03 4 April 2005

Min 2.0 4.4 3.98 -

Typ 1.6 1.2 4.5 4.32 0 0.15 100

Max 0.8 0.1 0.26 0.1 8.0 360

Unit V V V V V V A A A

Tamb = 25 C

VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC 2.1 V; other inputs VI = VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A

CI
9397 750 14693

3.5

pF
8 of 24

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 8: Static characteristics for 74HCT164 continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH VIL VOH Parameter HIGH-level input voltage LOW-level input voltage HIGH-level output voltage Conditions VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = 20 A; VCC = 4.5 V IO = 4 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 4.5 V IO = 4 mA; VCC = 4.5 V ILI ICC ICC input leakage current quiescent supply current additional quiescent supply current per input pin VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC 2.1 V; other inputs VI = VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = 20 A; VCC = 4.5 V IO = 4 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 20 A; VCC = 4.5 V IO = 4 mA; VCC = 4.5 V ILI ICC ICC input leakage current quiescent supply current additional quiescent supply current per input pin VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = VCC 2.1 V; other inputs VI = VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A 0.1 0.4 1.0 160.0 490 V V A A A 4.4 3.7 V V 0.1 0.33 1.0 80.0 450 V V A A A 4.4 3.84 V V Min 2.0 Typ Max 0.8 Unit V V Tamb = 40 C to +85 C

Tamb = 40 C to +125 C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage 2.0 0.8 V V

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

9 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

11. Dynamic characteristics

Table 9: Dynamic characteristics for 74HC164 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specied Symbol Parameter Conditions see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tPHL propagation delay MR to Qn see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tTHL, tTLH output transition time see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW clock pulse width; HIGH or LOW see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V master reset pulse width; see Figure 8 LOW VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V trem removal time MR to CP see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tsu set-up time DSA, and DSB to CP see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V th hold time DSA and DSB to CP see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V fmax maximum clock pulse frequency see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 6 30 35 23 71 85 MHz MHz MHz +4 +4 +4 6 2 2 ns ns ns 60 12 10 8 3 2 ns ns ns 60 12 10 17 6 5 ns ns ns 80 16 14 60 12 10 14 5 4 17 6 5 ns ns ns ns ns ns 19 7 6 75 15 13 ns ns ns 39 14 11 140 28 24 ns ns ns 41 15 12 170 34 29 ns ns ns Min Typ Max Unit Tamb = 25 C tPHL, tPLH propagation delay CP to Qn

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

10 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 9: Dynamic characteristics for 74HC164 continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specied Symbol Parameter Conditions see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tPHL propagation delay MR to Qn see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tTHL, tTLH output transition time see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW clock pulse width; HIGH or LOW see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V master reset pulse width; see Figure 8 LOW VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V trem removal time MR to CP see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tsu set-up time DSA and DSB to CP see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V th hold time DSA and DSB to CP see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V fmax maximum clock pulse frequency see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 5 24 28 MHz MHz MHz 4 4 4 75 15 13 ns ns ns ns ns ns 75 15 13 ns ns ns 100 20 17 75 15 13 ns ns ns ns ns ns 95 19 16 ns ns ns 175 35 30 ns ns ns 215 43 37 ns ns ns Min Typ Max Unit Tamb = 40 C to +85 C tPHL, tPLH propagation delay CP to Qn

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

11 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 9: Dynamic characteristics for 74HC164 continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specied Symbol Parameter Conditions see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tPHL propagation delay MR to Qn see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tTHL, tTLH output transition time see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tW clock pulse width; HIGH or LOW see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V master reset pulse width; see Figure 7 LOW VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V trem removal time MR to CP see Figure 8 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V tsu set-up time DSA and DSB to CP see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V th hold time DSA and DSB to CP see Figure 9 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V fmax maximum clock pulse frequency see Figure 7 VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V 4 20 24 MHz MHz MHz 4 4 4 ns ns ns 90 18 15 ns ns ns 90 18 15 ns ns ns 120 24 20 90 18 15 ns ns ns ns ns ns 110 22 19 ns ns ns 210 42 36 ns ns ns 255 51 43 ns ns ns Min Typ Max Unit Tamb = 40 C to +125 C tPHL, tPLH propagation delay CP to Qn

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

12 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 10: Dynamic characteristics for 74HCT164 GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specied Symbol Parameter Conditions VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 8 VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 7 Min 18 18 16 12 +4 27 Typ 17 19 7 7 10 7 6 2 55 Max 36 38 15 Unit ns ns ns ns ns ns ns ns MHz Tamb = 25 C tPHL, tPLH propagation delay CP to Qn tPHL propagation delay MR to Qn

tTHL, tTLH output transition time tW clock pulse width; HIGH or LOW

master reset pulse width; VCC = 4.5 V; see Figure 8 LOW trem tsu th fmax removal time MR to CP set-up time DSA, and DSB to CP VCC = 4.5 V; see Figure 8 VCC = 4.5 V; see Figure 9

hold time DSA, and DSB VCC = 4.5 V; to CP see Figure 9 maximum clock pulse frequency VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 8 VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 7

Tamb = 40 C to +85 C tPHL, tPLH propagation delay CP to Qn tPHL propagation delay MR to Qn 23 23 20 15 4 22 45 48 19 ns ns ns ns ns ns ns ns MHz

tTHL, tTLH output transition time tW clock pulse width; HIGH or LOW

master reset pulse width; VCC = 4.5 V; see Figure 8 LOW trem tsu th fmax removal time MR to CP set-up time DSA, and DSB to CP VCC = 4.5 V; see Figure 8 VCC = 4.5 V; see Figure 9

hold time DSA, and DSB VCC = 4.5 V; to CP see Figure 9 maximum clock pulse frequency VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 7 VCC = 4.5 V; see Figure 8 VCC = 4.5 V; see Figure 7

Tamb = 40 C to +125 C tPHL, tPLH propagation delay CP to Qn tPHL propagation delay MR to Qn 54 57 22 ns ns ns

tTHL, tTLH output transition time

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

13 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

Table 10: Dynamic characteristics for 74HCT164 continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF; test circuit see Figure 10; unless otherwise specied Symbol tW Parameter clock pulse width; HIGH or LOW Conditions VCC = 4.5 V; see Figure 7 Min 27 27 24 18 4 18 Typ Max Unit ns ns ns ns ns MHz

master reset pulse width; VCC = 4.5 V; see Figure 8 LOW trem tsu th fmax removal time MR to CP set-up time DSA and DSB to CP hold time DSA and DSB to CP maximum clock pulse frequency VCC = 4.5 V; see Figure 8 VCC = 4.5 V; see Figure 9 VCC = 4.5 V; see Figure 9 VCC = 4.5 V; see Figure 7

1/fmax VI CP input GND tW t PHL VOH Qn output VOL VM

001aac426

VM

t PLH

(1) 74HC164: VM = 50 %; VI = GND to VCC. 74HCT164: VM = 1.3 V; VI = GND to 3 V.

Fig 7. Waveforms showing the clock (CP) to output (Qn) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

14 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

VI MR input GND tW VI CP input GND t PHL VOH Qn output VOL VM

001aac427

VM

t rem

VM

(1) 74HC164: VM = 50 %; VI = GND to VCC. 74HCT164: VM = 1.3 V; VI = GND to 3 V.

Fig 8. Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the master reset to clock (CP) removal time

VI CP input GND t su th VI Dn input GND VM t su th VM

VOH Qn output VOL

001aac428

VM

(1) 74HC164: VM = 50 %; VI = GND to VCC. 74HCT164: VM = 1.3 V; VI = GND to 3 V. The shaded areas indicate when the input is permitted to change for predictable output performance.

Fig 9. Waveforms showing the data set-up and hold times for Dn inputs

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

15 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

VCC PULSE GENERATOR VI D.U.T. RT CL

mna101

VO

Denitions test circuit. RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance.

Fig 10. Load circuitry for switching times

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

16 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

12. Package outline

DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1

D seating plane

ME

A2

A1

c Z e b1 b 14 8 MH w M (e 1)

pin 1 index E

5 scale

10 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 4.2 0.17 A1 min. 0.51 0.02 A2 max. 3.2 0.13 b 1.73 1.13 0.068 0.044 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.1 e1 7.62 0.3 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087

Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT27-1 REFERENCES IEC 050G04 JEDEC MO-001 JEITA SC-501-14 EUROPEAN PROJECTION

ISSUE DATE 99-12-27 03-02-13

Fig 11. Package outline SOT27-1 (DIP14)

9397 750 14693 Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

17 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

SO14: plastic small outline package; 14 leads; body width 3.9 mm; body thickness 1.47 mm

SOT108-2

A X

c y HE v M A

Z 14 8

A2 pin 1 index

A1

(A 3) Lp L

1 e bp

7 w M

detail X

2.5 scale

5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.55 1.40 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3

0.010 0.061 inches 0.069 0.004 0.055

0.019 0.0100 0.35 0.014 0.0075 0.34

0.244 0.039 0.041 0.228 0.016

0.028 0.004 0.012

8 o 0

Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. OUTLINE VERSION SOT108-2 REFERENCES IEC JEDEC MS-012 JEITA EUROPEAN PROJECTION

ISSUE DATE 01-05-29 03-02-19

Fig 12. Package outline SOT108-2 (SO14)

9397 750 14693 Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

18 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm

SOT337-1

A X

c y HE v M A

Z 14 8

Q A2 A1 pin 1 index Lp L 1 bp 7 w M detail X (A 3) A

2.5 scale

5 mm

DIMENSIONS (mm are the original dimensions) UNIT mm A max. 2 A1 0.21 0.05 A2 1.80 1.65 A3 0.25 bp 0.38 0.25 c 0.20 0.09 D (1) 6.4 6.0 E (1) 5.4 5.2 e 0.65 HE 7.9 7.6 L 1.25 Lp 1.03 0.63 Q 0.9 0.7 v 0.2 w 0.13 y 0.1 Z (1) 1.4 0.9 8 o 0
o

Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC MO-150 JEITA EUROPEAN PROJECTION

ISSUE DATE 99-12-27 03-02-19

Fig 13. Package outline SOT337-1 (SSOP14)

9397 750 14693 Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

19 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm

SOT402-1

c y HE v M A

14

Q A2 pin 1 index A1 Lp L (A 3) A

1
e bp

7
w M detail X

2.5 scale

5 mm

DIMENSIONS (mm are the original dimensions) UNIT mm Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 A max. 1.1 A1 0.15 0.05 A2 0.95 0.80 A3 0.25 bp 0.30 0.19 c 0.2 0.1 D (1) 5.1 4.9 E (2) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1 Lp 0.75 0.50 Q 0.4 0.3 v 0.2 w 0.13 y 0.1 Z (1) 0.72 0.38 8 o 0
o

Fig 14. Package outline SOT402-1 (TSSOP14)

9397 750 14693 Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

20 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT762-1 14 terminals; body 2.5 x 3 x 0.85 mm

A A1 E c

terminal 1 index area

detail X

terminal 1 index area e 2 L

e1 b 6 v M C A B w M C y1 C

C y

1 Eh 14

7 e 8

13 Dh 0

9 X 2.5 scale 5 mm

DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. 1 A1 0.05 0.00 b 0.30 0.18 c 0.2 D (1) 3.1 2.9 Dh 1.65 1.35 E (1) 2.6 2.4 Eh 1.15 0.85 e 0.5 e1 2 L 0.5 0.3 v 0.1 w 0.05 y 0.05 y1 0.1

Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. OUTLINE VERSION SOT762-1 REFERENCES IEC --JEDEC MO-241 JEITA --EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27

Fig 15. Package outline SOT762-1 (DHVQFN14)

9397 750 14693 Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

21 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

13. Revision history

Table 11: Revision history Release date 20050404 Data sheet status Product data sheet Change notice Doc. number 9397 750 14693 Supersedes 74HC_HCT164_ CNV_2 Document ID 74HC_HCT164_3 Modications:

The format of this data sheet is redesigned to comply with the current presentation and information standard of Philips Semiconductors Added SOT762-1 and Ordering information Product specication -

74HC_HCT164_CNV_2

19901201

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

22 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

14. Data sheet status

Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualication Denition This data sheet contains data from the objective specication for product development. Philips Semiconductors reserves the right to change the specication in any manner without notice. This data sheet contains data from the preliminary specication. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specication without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specication. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notication (CPCN).

III

Product data

Production

[1] [2] [3]

Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

15. Denitions
Short-form specication The data in a short-form specication is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values denition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specication is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specied use without further testing or modication.

16. Disclaimers
Life support These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status Production), relevant changes will be communicated via a Customer Product/Process Change Notication (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specied.

17. Contact information

For additional information, please visit: http://www.semiconductors.philips.com For sales ofce addresses, send an email to: sales.addresses@www.semiconductors.philips.com

9397 750 14693

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 03 4 April 2005

23 of 24

Philips Semiconductors

74HC164; 74HCT164
8-bit serial-in, parallel-out shift register

18. Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 8 9 10 11 12 13 14 15 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Function selection. . . . . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 23 Denitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contact information . . . . . . . . . . . . . . . . . . . . 23

Koninklijke Philips Electronics N.V. 2005

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 4 April 2005 Document number: 9397 750 14693

Published in The Netherlands