A 3G Strategy for Multi-Module Inverters in Parallel Operation to Achieve an Equal Current Distribution

T.-F. Wu, Y.-H. Huang, Y.-K. Chen and Z.-R. Liu

Power Electronics Applied Research Laboratory (PEARL) Department of Electrical Engineering National Chung Cheng University Ming-Hsiung, Chia-Yi, Taiwan, R.O.C. E-mail: tfwu@ee.ccu.edu.tw Tel: 886-5-2428159; Fax: 886-5-2720862
Abstract-A circular chain control (CCC or 3C) strategy for multi-module inverters in parallel operation to achieve an equal current distribution is presented in the paper. In the proposed inverter system, all the modules have the same control configuration and each module includes inner current loop and outer voltage loop controls. The PI controller is adopted as the inner current loop controller to expedite the dynamic response; the H" robust control is adopted to reduce the interactive effect among the inverters connected in parallel. With the 3C stratea, the modules are in circular chain connection and each module has an extra control to track the inductor current o f its previous module to achieve an equal current distribution. Simulation results o a two-module f and a three-module inverter systems with different kinds o loads and with module discrepancy have f demonstrated the feasibility of the proposed control scheme in equal current distribution and fast regulation. Hardwave measurements are also presented to veri& the theoretical discussion.

I. INTRODUCTION In recent years, sinusoidal pulsewidth modulated (SPWM) inverters have found their wide applications in various types of ac power conditioning systems, such as automatic voltage regulator (AVR) and uninterruptible power supply (UPS). Parallel operation of inverters to obtain a larger power capacity and to improve the system reliability becomes the trend of power system design. Two or more inverters operating in parallel must satisfy the following conditions: 1) Proper current distribution among inverters according to their capacities, and tight output regulation. 2) Accommondation with various types of loads.

To meet the above conditions, there are several types of control strategies were proposed in the literature [I]-[ 101. Phase locked loop (PLL) control technique was used to synchronize the output voltage among inverters [l], [2], [SI-[lo]. The response to load change, however, is sluggish. Multi-loop control scheme [6] was proposed to improve its current distribution among inverter modules. For those inverter modules with nonidentical component characteristics, certain control strategies are adopted to distribute the output current among the modules connected in parallel. These strategies can be roughly classified into master-slave control (MSC) and central-limit control (CLC). In an MSC controlled system, the master module is responsible for output voltage regulation, while the slave ones will track the current command sensed from the master to achieve an equal current distribution. For a multi-module inverter system with a CLC, all the modules can have the same configuration and each module will track the average current of all the modules to achieve an equal current distribution. Each of these two controls has its own merits. In this paper, a control algorithm named circular chain control (CCC or 3C) is proposed. With this control, the successive module will track the
current of its previous module to achieve an equal

current distribution. The first module will track the last one to form a circular chain connection. A system with this control can yield the performance in between those of MSC and CLC. The performance of these three controls are qualitatively characterized in Table I. Note that in the proposed system, each inverter module is regulated by an inner current loop and an outer voltage loop. The

0-7803-4489-8/98/$10.00 0 1998 IEEE

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proposed control method with the inner loop can achieve a fast dynamic response readily. Therefore, amplitude, frequency and phase can be synchronized and proper current distribution among inverters can be achieved. In addition, an H"' YObust control [I I]-[14] is adopted to reduce interactive effects among the inverters connected in parallel; thus, the output voltage can be well regulated. Table I Comparison among the Performance of the MSC, CLC and CCC controlled inverters in
Performance Index rise-time I settling time I overshoot steady state error I II rivole I control cost reliability redundancv robustness at 1. v a r i a t i o n o f t h e n u m b e r of modules 2. variation o f the module characteristic 3. load variation 4. input voltage variation I flexibility MSC short long large small laree low low low low low high high high Control Scheme CLC CCC(3C) I short I short I short I short sinall small I small I I small I moderate moderate high high high hieh high

Module

Fig. 1 Circuit configuraition of the proposed multimodule inverter system

II

11
II

..

80196KC Invertel Controllers

high high

high moderate

Fig.:! Circuit schematic of a single-module inverter III.3c STRATEGY FOR MULTI-MODULE

~NVERTERS

I
I

high high low

I
I

high high high

11. CONFIGURATION OF THE MULTI-MODULE INVERTER SYSTEM The proposed multi-module inverter system can be conceptually illustrated by Fig. 1, in which the detailed schematic of each module and controllers are depicted in Fig. 2. The controllers of the proposed system consist of 1) an inner current loop controller for regulating the inductor current, 2) an outer voltage loop controller senses for regulating the amplitude and frequency of a sinusoidal output voltage. In the proposed system with 3C strategy, the inductor current of inverter n-I is used as the reference of inverter n. Note that the reference current of inverter I is obtained from that of inverter n. That is, all the inverters form a chain. The full-bridge switches and L-C filter are included in each inverter module. The 3C algorithm is realized with a 16-bit single chip microprocessor (80196KC), which also generates the SPWM driving signals for the switches.

Each inverter with the 3C strategy includes two compensators; one is for inner current loop and the other is for outer voltage loop. PID and H" robust control techniques are adopted to design compensators for regulating filter-inductor current and output voltage, respectively. A. Modeling o Multi-module Inverters f Investigating the dynamic behavior of the proposed multi-module iinverters will help to devise a system with desired performance. This usually involves deriving small-signal model of the inverter and designing a suitable controller. The small-signal model of an inverter module with contollers represented in the block diagram is shown in Fig. 3(a), where Kef is the reference voltage, is the output voltage, vfi is the feedback voltage, i, is the feedback current, ifl is the inductor current, and G,,(s) and G,,(s) are the outer loop and inner loop controllers, respectively. H , and H , represent the feedback gains, m, is is the gain of the the modulation ratio and K,, power stage. The small-signal model of the proposed two-module inverter system, thus, can be derived, as shown in Fig. 3(b).

v,

187

G,(s)= K p + - K K d * S + L
S

(1)

where K,, is a proportional gain, K , is an integral gain and K , is a derivative one. The derivative part of a PID compensator can improve the transient response of a system, but it may accentuate noises at higher frequency. Thus, only an PI compensator is designed and implemented in the proposed system.
1 o2

oo 1

oo

E
IO2

I -

I
lreq

Fig. 4 The plot of the magnitudes of control-toinductor current transfer function ( i,/ d ) versus frequency under several different load conditions.
15
10
..........._____.........

Fig.3 Control block diagram of (a) the single-module inverter (b) the two-module inverter.

F
1 - - - - - - - - - - -

It can be observed from Fig. 3(b) that interactions between the two modules may occur. The analytical expression of the transfer functions of control to the desired outputs can not be a simple form. Thus, for practice and simplicity while without loss of physical meaning, numerical solutions are used to illustrate the required information for controller designs. Figs. 4 and 5 show the plots of the magnitudes of control-to-inductor current transfer function ( i,/ d ) and control-tooutput voltage transfer function ( V ,/ d ) versus frequency under several different load conditions, respectively. Note that as shown in Fig. 4, the inner-loop small-signal transfer characteristic of the two-inverter system is the same as that of a single inverter. However, the outer-loop smallsignal transfer characteristic of the two-inverter system is different from that of a single inverter.

IO2

1 oo

1o2 freq

1o+

1 Oh

Fig. 5 The plot of the magnitudes of control-to-output voltage transfer function ( / d ) versus frequency under several different load conditions. C. Design o a robust controller for outer voltage f

e,,

B. Design o a proper controller for inner f

current Loop

PID compensation technique has been used relatively often in industrial application for its simplicity and easy implementation. In this study, it is adopted to design a controller for the inner current loop. Consider the transfer function of a PID compensator:

loop A block diagram used to illustrate the proposed H" robust control is depicted in Fig. 6, in which the uncertainty-plant is with three uncertainties, the variation of component value, load variation and interaction among the multi-module inverters. In the discussion, the variation of the component value is combined with the variation of the load. The design procedure of robust control is outlined as follows: 1) Augment the plant G(s) with weighting functions W,(s) and W2(s) based on the desired performance indices. The augmented plant P ( s ) can be conceptually illustrated by Fig. 7. Generally, weighting function W,(s) is a typical low-pass filter, shaping the sensitivity function S at low fi-equency to reject disturbances and reduce tracking errors. Weighting function W,(s) is chosen to be a high-pass filter, shaping T at high frequency to minimize the instability effects.

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2) Find a robust controller K(s) such that

B. Outer loop 1) PM2 45" and GM2 40 dB, 2) bandwidth2 5 Wz, 3) Minimize the sensitivity to load variation and interaction among the inverters in parallel.

where S and T denote the sensitivity function and the complementary sensitivity function, respectively. 3) Verify if the design is close to the desired performance indexes based on the evaluation of the singular value bode plot. If it is not we need to go back to step 1) to select another set of weighting functions and go through all steps.

Example 1: Single-M[odule Inverter The electrical specifications and component values of a single module are collected in Table 11. The PI controller of the inner loop can be designed according to the bode plot shown in Fig. 4. In addition, weighting functions W, (s) and W,(s) of the outer loop are slelected as

(3)
1
VI
1
-1

Inverted

I I Inverter'
2

- -I
Inverter' n

and
I

vo

e..

>

0 . 4 ~-+1

W20) =

s (6;00 + 10-6

1.

(4)

Fig. 6 Control block diagram of the proposed multimodule inverter with an H" robust controller.

The H" robust controller can be derived with MATLAB Robust Control Toolbox. The inner and outer loops are controlled by PI and H" robust controllers, respectively. With the specified parameters, these two controllers are shown as follows:

G d S )=
lo4 10114s4 +1 1 6 ~ 1 0 - ~ s ~ 4 ~ 1 0 - ~ s ~ 1 0 - ~ s + 2 2 4 +68 +2
5 ~ X I O - ' ~ +1~~ ~ x I O - ~ 6 S +~l 6 S +1 s

~ 1 0 ~ ~

(outer loop) and

100 Gc2(s) = 20 + - (inner loop).
S

(5)

(6)

Fig. 7 Illustration of an augmented plant with a robust controller.

IV. ILLUSTRATION EXAMPLES Two examples of a single-module inverter and a two-module inverter system with PI and H" robust controllers are used to illustrated the previous discussion. The design specifications of the above examples are given as follows:

Simulated and measured results of such a system loaded with a resistor are shown in Fig. 8, where the voltage and current waveforms are sinusoidal and in phase. They appear highly consistent with each other. Table 11. Specifications and component values of a single-module inverter.

A. Inner loop
1) phase margin (PM)2 60" and gain margin (GM) 2 40 dB, 2) bandwidth2 5 kHz, 3) Minimizing the sensitivity to load variation.

output voltage (v) switching frequency ( P ) output frequency output power

inductor ESR capacitor (c,)

I I

60 1

I I MY

H=

IcapacitorESR 0.1 ]resistance load(4 12.1

<>

189

100% of the full load

(SOVIdiv, SAIdiv, Smsldiv) (a)

100% of the fdl load

be achieved regardless of the types of loads and component discrepancy between modules. Fig. 13 shows the simulation results of the output voltage and current responses to a step load change from 50% to 100%. In this figure, the output current changes dramatically while individual inductor currents still precisely follow each other and the output voltage is still in tight regulation. Fig. 14 illustrates the measured results of the proposed system with a pure resistance. These results also show the same output regulation and current distribution as those of the simulated results. rable 1II.Circuitparameters of two module inverters.
inverter linductor (L,) capacitor (C,) load 70 ~ f i pure resistant load module 1 1.35 mH 75 f i module2 1.3 mH RLC load 7ofl inodtile 1 1.35 mH

7
T,.,, I

module 2

1.3

mH

75 PF

(SOVIdiv, SAIdiv, Smsldiv)

(b) Fig. 8 The output voltage and current waveforms of the single-module inverter system at the full load (pure resistantce) (a) simulation (b) meas-

urement. Fig. 9(a) and (b) show the measured output current and voltage responses to step load change from 100% to 50% and from 50% to loo%, respectively. It can be observed from the waveforms that a fast regulation can be achieved.

(SOVIdiv, SAIdiv, 20msldiv) (a>

Example 2: Parallel Two-Module Inverter System To investigate the current distribution between modules, a two-module inverter system with the circuit parameters collected in Table 111 is simulated and implemented. The controllers of this example are the same as those in example 1.
The voltage and current simulated waveforms for different kinds of loads are illustrated in Figs. 10 and 11. Fig. 10 shows the results from a system with pure resistance, Fig. 11 illustrated those with a RLC load, and Fig. 12 shows those with a high crest factor load. It can be observed from these plots that equal current distribution can
I
I

(SOVIdiv, SAIdiv, 2Omsldiv)

(b)

Fig. 9 Transient responses of the output current and output voltage to a step load change (a) from 100% to 50% (b) from 50% to 100%.

190

(SOVIdiv, SAIdiv, Smsldiv) Fig. 10 The output voltage land current waveforms of the two-module inverter system with a pure resistant load ( l , , : load current, i, : output current of module 1, and i, : output current of module 2).

(SOVIdiv, SAIdiv, Smsldiv) Fig. 13 The output voltage and current waveforms of the two-module inverter system with a step load change from 50% to 1010%(IUC load) in the parallel system of two modules (i,, : load current, i, : output current of module 1, and i, : output current of module 2).

(5OV/div, 5A/div, Smsldiv) Fig. 11 The output voltage and current waveforms of the two-module inverter system with a RLC load ( I , , : load current, i, : output current of module 1, and i2 : output current of module 2).

(SOVIdiv, SAldiv, Smsldiv) (a>

(SOVIdiv, SAIdiv, Smsldiv) (b) Fig. 14 Measured results of the two-module inverter system with a pure resistant load: (a) output voltage and current (b) output currents of modules 1 and 2. Fig. 12 The output voltage and current waveforms of the two-module inverter system with a high crest factor load ( i , , : load current, i, : output current of module 1, and i2 : output current of module 2). For further verifying the feasibility of the proposed control scheme, a three-module inverter system with an RLC load is simulated, whose results are plotted in Fig. 15. The three output currents are tracking each other precisely and the output voltage waveform sustains sinusoidal.

_ _ _ _ _ _ L ______ I _ _ _ _ _ I _ _ _ _ _ _ (SOVIdiv, SAIdiv, Smsldiv) Fig. 15 The output voltage and current waveforms of the three-module inverter system with an RLC load (i,, : load current, i, : output current of module 1, i, : output current of module 2, and i, : output current of module 3 ) .
L

_ _ _ _ _ _______2______
I

191

V. CONCLUSION A 3C strategy for inverters in parallel operation to achieve an equal current distribution has been studied. Each inverter in the proposed system consists of a PI controller to achieve a fast dynamic response, and a robust controller to reduce the interactive effects among inverters. It has been verified that a system with 3C strategy can accommondate various types of loads. Simulation results and experiment measurements have shown that fast dynamic response, tight output regulation and equal current distribution can be achieved in the proposed multimodule inverter system.
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