VI-Btech, (Regular and Back) MP EC 602 (CSE)

SIXTH SEMESTER EXAMINATION-2011

MICROPROCESSORS
[EC 602]

Full Marks: 60

Time: 3 Hours

Answer any SIX including question number 1 which is compulsory. The figures in the margin indicate full marks. Candidates are required to give their answers in their own words as far as practicable and all parts of a question should be answered at one place only.

1. I.

Answer ALL questions: The content of accumulator is presently 7BH. What would be the content of accumulator after execution of CMP A instruction? State the function of HOLD pin in 8085 Microprocessor. Name the machine cycle(s) used to fetch and execute the instructions ADD M. Specify the number of address lines available in a 27128 EPROM chip.

[1X10

II. III. IV. V. VI.

What would be the control word to reset bit PC6 of PORT C in 8255 in the BSR mode? What are the addressing modes used in the following instructions :(a) STAX B (b) LXI H,7015H How many 8259 chips would be required to service upto 64 number of interrupt devices? Determine the OCW1 for a 8259 PIC to unmask only IR4 and mask the rest of interrupt inputs. Find the 20 bit physical address in a 8086 system if the contents of [CS]=3000H and [IP] = F304H. What is the use of EA Pin in 8051 microcontroller?

VII.

VIII.

IX.

X.

2. a)

How is the lower address bus and data bus demultiplexed externally in a 8085 Microprocessor system? What is the role of status flag in 8085 Microprocessor? What are the different control and status signals available in 8085 Microprocessor?

[3

b) c) d)

[3 [2

Describe the various rotate instructions of 8085 with proper diagrams showing the bit [2 movement. Draw the timing diagram for fetching and executing the instruction ANI 40H. Explain [3 the various signals shown in the timing diagram. Discuss the role of assembler and debugger. Explain the asynchronous data transfer scheme with suitable example. Explain the following 8085 instructions: (i) DAA (ii) SHLD 7000H (iii) CALL 5000H How can the programmer selectively mask some of the hardware interrupts in a 8085 Microprocessor? What could be the necessity for such masking? Write an assembly language program to load a data byte 7FH in register C and mask the higher order bits and then store the result at memory location 5027H. [2+2 [3 [3

3. a)

b) c) 4. a)

b)

[3

c)

[2

d)

Frame a control word for 8255 PPI where PORT A should be configured as output port [2 in Mode 1, Port B as output port in Mode 1 and the rest of the pins of Port C as output Port. Design a suitable interface circuit with a 3 to 8 decoder chip to interface the following [4 memory chips to a 8085 Microprocessor. 1 no. of 4K X 8 EPROM 1 no. of 8K X 8 RAM Starting address of EPROM should be from 0000H and the RAM chip from 4000H. Show the memory map also. A crystal of 4MHz is connected to the pins X1 and X2 of a 8085 Microprocessor. In this [3 system, a Delay subroutine as given below is to be implemented. Find the exact time delay that would be generated with following subroutine. T States DELAY: LXI B, 0258H 10 LOOP: DCX B 6 MOV A, C 4

5. a)

b)

ORA JNZ RET

B LOOP

4 10/7 10 [3 [2+1+2

c) Describe the control flags of 8086. 6. a) (i) Identify the port addresses in the following figure. (ii) Identify the Mode 0 control word to configure Port A, Port CU as output Ports and Port B, Port CL as input Ports.

(iii) Write a program to read the DIP switches and display the reading from Port B at Port A and from Port CL at Port CU.

b)

Draw the internal block diagram of a 8259 PIC and describe the sequence of operation of a 8259, when an interrupting device connected to IR2 pin of 8259 requests for service, when IR4 interrupt is being serviced by 8259.

[5

7. a)

(i) What is framing in serial data transmission? [1+3 (ii) Determine the mode word for a 8251 to transmit characters with the following parameters :- Async mode with 9600 baud, when clock frequency at T X C is 153.6 KHz. - Character length 7 bits and 1 stop bit - No parity Explain the role of BIU (Bus Interface Unit) part of 8086. [2

b)

c)

Briefly describe the addressing modes of 8051 microcontroller with suitable examples.

[4

8. Short notes (on any four) a) Assembler directives DB and EQU b) Memory mapped I/O and I/O mapped I/O c) B register and PSW of 8051 Microcontroller d) Memory segmentation in 8086 Microprocessor e) Direct addressing and implicit addressing modes of 8085 Microprocessor XXXXX

[2.5 X 4