2004 35th Annual IEEE Power Electronics Specialists Conference

Aachen, Germany, 2004

Optimal Control of Three-Phase PWM Inverter for UPS Systems

J. W. Jung, M. Dai, A. Keyhani, Fellow, IEEE Department of Electrical and Computer Engineering The Ohio State University, Columbus, OH43210, USA Phone: +1 614 292 4430; Fax: +1 614 292 7596 Email: keyhani.1@osu.edu weighting matrices of two linear quadratic regulators is proposed for the three-phase UPS systems under both linear and nonlinear loads. First of all, the proposed control scheme is easily implemented based on a discrete-time state space equation given by modeling of the given plant system. Particularly, the discrete-time optimal voltage controller includes a sliding-mode control model because of its characteristics such as the good transient and no-overshoot response. First, a circuit model of the three-phase UPS system and a discrete-time state space equation are given in a stationary qd reference frame. Next, two discrete-time state feedback controllers are designed: a discrete-time optimal + sliding-mode voltage controller in outer loop and a discrete-time optimal current controller in inner loop. Also, Space Vector Pulse-Width Modulation (SVPWM) is chosen as a technique of PWM to perform this algorithm. To verify our proposed method, various simulation results using Matlab/Simulink are presented under linear/nonlinear loads. II. UPS SYSTEM MODELING Fig. 1 illustrates a circuit model of the UPS system, and the system consists of a DC voltage source (Vdc), a three-phase voltage source PWM inverter, L-C inverter output filter (Lf, Cf), and a load (RL).

AbstractThis paper presents a new digital control strategy of a three-phase PWM inverter for Uninterruptible Power Supplies (UPS) systems. To achieve a fast transient response, a good voltage regulation, nearly zero steady state inverter output voltage error, and low total harmonic distortion (THD), the proposed control method consists of two discrete-time feedback controllers: a discrete-time optimal + sliding-mode voltage controller in outer loop and a discrete-time optimal current controller in inner loop. To prove the effectiveness of the proposed technique, various simulation results using Matlab/Simulink are shown under both linear and nonlinear loads. Index Termsdigital control, optimal control, sliding-mode control, space vector PWM, uninterruptible power supplies.

I. INTRODUCTION In order to deliver a good ac power during emergency, the UPS systems that include the feedback controlled pulse-width modulated (PWM) inverter and L-C output filter have to convert a dc voltage source (batteries) to a sinusoidal ac voltage with low steady state voltage error, low voltage THD, and fast transient response under load disturbances. Furthermore, the good performance mentioned above should be guaranteed under power pollution which leads to voltage distortion due to increasing applications of power converters or nonlinear loads in industry. Recently, techniques to produce an output voltage with low total harmonic distortion (THD) in a three-phase pulse width modulation (PWM) inverter have been proposed [1-4]. Even if real-time deadbeat controllers [1-3] have low THD for linear load and a fast transient response for load disturbances, it is known that they are sensitive to parametric variations and model uncertainties as well as these techniques have a high THD under nonlinear load. On the other hand, discrete-time optimal voltage/current controllers in a rotating reference frame have been proposed for UPS applications of three-phase PWM inverter [4]. However, it does not consider a nonlinear load. Thus, a new controller is needed for the good performance such as nearly zero steady state inverter output voltage error, low THD, good voltage regulation, robustness, fast transient response, and protection of the inverter against overload under linear/nonlinear loads. In this paper, a new control strategy employing two discrete-time optimal controllers where good performance stated previously is guaranteed by the proper choice of the

Fig. 1. UPS system circuit model.

The circuit model described in Fig. 1 uses the following quantities. The inverter output line-to-line voltage is represented by the vector Vi = [ViAB ViBC ViCA]T, and the three-phase inverter output currents are iiA, iiB, and iiC. Based on these currents, a vector is defined as Ii = [iiAB iiBC iiCA]T = [iiA-iiB iiB-iiC iiC-iiA]T. Also, the line to line load voltage and phase load current vectors can be represented by VL = [VLAB VLBC VLCA]T and IL = [iLA iLB iLC]T , respectively. On the L-C output filter, the following current and voltage

0-7803-8399-0/04/$20.00 2004 IEEE.

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equations are obtained after elementary calculation:

f qd 0 = K s f abc ,

(4)

i). Current equations:

dV 1 1 (iLA iLB ) iiAB LAB = dt 3C f 3C f 1 1 dVLBC (iLB iLC ) . iiBC = dt 3C f 3C f dVLCA 1 1 iiCA (iLC iLA ) = dt 3C f 3C f
where, K s = 1 1/ 2 1/ 2 2 0 3 2 3 2, f qd 0 = [ f q f d f 0 ]T , f abc = [ f a f b f c ]T 3 1 / 2 1 / 2 1/ 2

(1)

and f denotes either a voltage or a current variable. By applying (4) to (3), transform the state equations (3) to the stationary qd reference frame below:
dVLqd dt dI iqd dt = 1 1 I iqd Tiqd I Lqd 3C f 3C f , 1 1 VLqd + Viqd Lf Lf
1 3 = 2 1 3 1 3 . 1

ii). Voltage equations:

diiAB 1 1 = V LAB + ViAB Lf Lf dt . diiBC 1 1 = V LBC + ViBC Lf Lf dt diiCA 1 1 dt = L V LCA + L ViCA f f

(5)

(2)

where, Tiqd = [K s Ti K s ] row, column, 1, 2

Rewrite (1) and (2) into a vector form, respectively:

dV L 1 1 = Ii Ti I L 3C f 3C f dt , dI i 1 1 = VL + Vi dt Lf Lf

(3)

Also, we assume that the Lf and Cf parameters in the network are constant, and then the given plant model (5) can be expressed as the following continuous-time state space equation for a linear time-invariant (LTI) system
& X(t ) = AX(t ) + Bu (t ) + Ed (t ) ,

(6)
d = [I Lqd ]21

where, Ti = 0

1 1 0

0 1 . 1

where,

VLqd X= I iqd 41

u = [Viqd ] 21

To implement space vector PWM, the above state equations (3) can be transformed from the abc reference frame into the stationary qd reference frame that consists of the horizontal (q) and vertical (d) axes. Fig. 2 shows the relationship between the abc reference frame and stationary qd reference frame.

0 22 A= 1 L I 22 f

1 0 22 I 22 1 3C f ,B= 1 , E = 3C Tiqd . I 22 f 0 22 Lf 42 0 2 2 4 2 44

Note that the line to line load voltage VLqd and inverter output current Iiqd are the state variables of the system, the inverter output line-to-line voltage Viqd is the control input (u), and the load current ILqd is defined as the disturbance (d). III. CONTROL SYSTEM DESIGN Fig. 3 shows a block diagram of the total control system proposed for digital control of the three-phase PWM inverter for UPS systems.

Fig. 2. Relationship between the abc reference frame and the stationary qd reference frame.

Based on Fig. 2, the Clarke transformation which outputs a two coordinate time-varying system (i.e., the q-axis leads the d-axis by 90) is given by (4)

Fig. 3. Block diagram of total control system.

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In Fig. 3, the proposed control system consists of two feedback controllers: a discrete-time optimal + sliding mode controller is used in the outer loop for voltage control, while a discrete-time optimal controller is in the inner loop for current regulation [5-7]. Design of each controller will be described in the following section in detail. A. Voltage Controller in the outer loop As shown in Fig. 4, a discrete-time voltage controller based on a discrete-time robustness servomechanism controller (RSC) that consists of a servo-compensator and a stabilizing compensator is used for voltage regulation in an outer loop. Furthermore, dynamics of a discrete-time sliding-mode control (DSMC) is combined with the given plant model because of the fast and no-overshoot response it provides [7]. Next, the current command signal (Icmd,iqd) is limited by maximum current predetermined to protect the system under overload.

In order to control the output y1(k) to follow the reference y1_ref(k), a sliding mode manifold may be selected in the form of

s(k ) = y1 (k ) y1 _ ref (k ) = C1X(k ) y1 _ ref (k ) ,

where, y1_ref(k) = Icmd,iqd (k).

(9)

In other words, when the discrete-time sliding mode exists, which means s(k) = 0, the output y1(k) is identical to the reference y1_ref(k). Therefore, the discrete-time sliding mode exists if the control input u(k) is designed as the solution of:
s( k + 1) = y1 ( k + 1) y1 _ ref (k + 1) = C1A*X( k ) + C1B*u(k ) + C1E*d( k ) y1 _ ref (k + 1) = 0

(10)

The control law that satisfies (10) and yields motion in the manifold s(k) = 0 is called equivalent control. For the given system, the equivalent control ueq(k) is given as follows:
u eq (k ) = C1B*

) (y
1

1 _ ref

(k + 1) C1A* X(k ) C1E*d(k ) .

(11)

Fig. 4. Block diagram of a discrete-time voltage controller.

We assume that y1_ref(k+1) y1_ref(k) because y1_ref(k) is constant over a sampling period (Tz) that is much smaller than a fundamental period (1/60 sec.). As a result, the equation (11) can be rewritten:
u eq (k ) = C1B *

The goal of designing a realistic multivariable controller to solve the robust servomechanism problem (RSP) is to achieve closed-loop stability and asymptotic regulation as well as fast response and robustness. In this paper, a discrete-time robustness servomechanism controller (RSC) that combines both the internal model principle and the optimal control theory is adopted for voltage control due to its capability to perform zero steady state tracking error under unknown load and to eliminate harmonics of any specified frequencies with guaranteed system stability [5-6]. The continuous-time state space equation (6) of the plant system can be expressed to include dynamics of DSMC below:
& X(t ) = AX(t ) + Bu(t ) + Ed(t ) , y 1 (t ) = C1 X(t )

) (I
1

cmd ,iqd

(k ) C1 A * X(k ) C1E*d(k ) .

(12)

After the dynamics (12) of the DSMC is included in (8), the overall plant for the RSC is:
X(k + 1) = A d X(k ) + B d u 1 (k ) + E d d(k ) , y v ( k ) = C v X( k )

(13)

where,

A d = A * B * C1 B *
E d = E * B * C1B *

C1 A *

B d = B * C1 B *
C v = [I 22

C1E *

, 0 22 ] ,

u 1 ( k ) = I cmd ,iqd (k ) , y v = [VLqd ] .

(7) For the given system (13), once the existence of the solution to RSP is verified according to the conditions in [5], assuming the tracking/disturbance poles are j1, j2, j3, (i.e., representing sinusoidal signals with fundamental frequency 1 and harmonic frequencies 2, 3, ), the RSC can be designed in the following. If the tracking/disturbance poles to be considered are j1, j2, and j3, a continuous-time servo-compensator is defined as

where, y 1 = [I iqd ] , C = 0 0 1 0 . 1
0 0 0 1

Given the sampling period Tz, the (7) can be transformed to the following discrete-time state space equation:
X(k + 1) = A * X(k ) + B * u(k ) + E * d(k ) , y 1 ( k ) = C 1 X( k )

(8)

& v (t ) = A c v (t ) + B c e vqd (t ) ,

(14)

where,

A * = e AT z

, B * = e A (T ) Bd , E * = e A (T ) Ed . 0 0
Tz
z

Tz

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2004 35th Annual IEEE Power Electronics Specialists Conference

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where,
evqd = V* Lqd VLqd

A c1 A c = 0 4 4 0 4 4

0 4 4 Ac2 0 2 2

0 4 4 0 4 4 A c 3 1212

B c1 Bc = B c 2 B c3 122

value calculated by the Matlab function in advance. Thus, the control input (u1) can be taken from the gain Kv and state variables (X and v):
u 1 ( k ) = K v X v ( k ) = K v _ 1 X( k ) Kv_2 . v (k ) = K v _ 1 X ( k ) K v _ 2 v ( k )

0 22 A ci = 2 i I 22

0 I 22 , B ci = 22 , i (i = 1, 2, 3), 0 22 44 I 22 42

(18)

1 = , 2 = 5, 3 = 7, = 2f, f = 60 Hz. Note that only the 5 th and 7th harmonics are chosen as the disturbance poles because the voltage harmonics such as an odd multiple of 3 and even harmonics are suppressed in a three-phase inverter and as a consequence the dominant harmonics are the 5 th and 7th. Next, a discrete-time servo-compensator is:
v (k + 1) = A * v (k ) + B * e vqd (k ) , c c
T where, A * = e A cTz and B * = 0 z e Ac (Tz ) B c d . c c

Finally, since the current command signal should be limited to protect the system against overload, the algorithm of the current limiter is included in main program as:
I cmd ,iqd (k ) I max u1 ( k ) = I cmd ,iqd (k ) I cmd ,iqd (k ) for I cmd ,iqd (k ) I max for I cmd ,iqd (k ) > I max

(19)

(15)

B. Current Controller in inner loop Similarly, the discrete-time optimal current controller can also be designed except for the sliding-mode control model included in the voltage controller.

Therefore, an augmented system combining both the new plant (13) including the dynamics of DSMC and the servo-compensator (15) can be written as:
Xv (k + 1) = Av Xv (k ) + Bvu1 (k ) + E1_ vd(k ) + E2 _ v y ref _ v (k ) ,

(16)
Fig. 5. Block diagram of a discrete-time current controller.

where, X (k ) = X(k ) , A = A d v v ( k ) B * C v c v

0 , B , Bv = d A* 0 c

0 E * E1 _ v = , E 2 _ v = * , u1 (k ) = I cmd ,iqd (k ) , B c 0 d( k ) = I Lqd (k ) , y ref _ v (k ) = V * Lqd (k ) . The stabilizing compensator , which yields the control input u1 in (16), ensures the stability of the overall system including the plant as well as the servo-compensator and desirable performance of the system through a feedback gain matrix Kv which minimizes a discrete linear quadratic performance index as follows:
J = X v ( k )Q v X v ( k ) + v u 1 ( k ) u 1 ( k ) ,
T T k =0

A discrete form of the plant (6) and the output yi(t) is:
X(k + 1) = A * X(k ) + B *u(k ) + E *d(k ) , y i ( k ) = C i X( k )

(20)

T T where, A * = e ATz , B * = 0 z e A (Tz ) Bd , E* = 0 z e A (Tz ) Ed ,

u(k ) = V *iqd (k ) , C i = [0 22

I 22 ] , y i = [I iqd ] .

Analogous to the voltage controller, the continuous-time servo-compensator is defined below

(17) where,

& i (t ) = A c i (t ) + B c e iqd (t ) ,

(21)

where, Qv is a symmetrical positive-definite matrix and v>0 is a small number, both of which should be selected by the controller designer. The feedback gain Kv can be obtained using Matlab function dlqr() which solves the algebraic Riccati equation for the system (16) such that all eigenvalues of matrix A v K v X v exist inside of unit disc. Assuming the system is a linear time-invariant (LTI), the feedback gain Kv is a constant

eiqd = I*iqd I iqd

A c1 A c = 0 4 4 0 4 4

0 4 4 Ac 2 0 2 2

0 4 4 0 4 4 A c 3 1212

B c1 Bc = B c 2 B c 3 122

0 22 A ci = 2 i I 22

0 I 22 , B ci = 22 , i (i = 1, 2, 3), 0 22 44 I 22 42

1 = , 2 = 5, 3 = 7, = 2f, f = 60 Hz.

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Also, note that the 5 and 7 harmonics are selected as the dominant disturbance poles like the voltage controller. By transforming (21) to a discrete form:
i (k + 1) = A * i (k ) + B* e iqd (k ) , c c
T where, A * = e A cTz and B * = 0 z e A c (Tz ) B c d . c c

th

th

V * iqd (k ) for V * iqd (k ) u 0 , u( k ) = u 0 V * iqd (k ) for V * iqd ( k ) > u 0 V * iqd (k )

(26)

(22)

where, u 0 = 2 Vdc and the control voltage limit u0 is also 3 determined by the SVPWM inverter. Finally, remark that the feedback gain (Ki-2) of the servo-compensator (i) in the current controller should be at least ten times larger than the feedback gain (Kv-2) of the servo-compensator (v) in the voltage controller because the current controller requires much faster response than the voltage controller. IV. SIMULATION RESULTS To validate the proposed control scheme, digital simulation has been done under various operating conditions (both linear and nonlinear loads) using Matlab/Simulink, and the system parameters are shown in Table 1.
TABLE I SYSTEM PARAMETERS DC Bus Voltage Output Power Rating AC Output Voltage Inverter Filters Switching (Sampling) Frequency Vdc= 360 V Pout = 10 kVA VL, RMS = 208 V (L-L), f = 60 Hz Lf = 600 H, Cf = 200 F fz = 5.4 kHz

Thus, an augmented system model combining both the plant (20) and the servo-compensator (22) can be expressed as follows
Xi (k + 1) = Ai Xi (k ) + Biu(k ) + E1_ id(k ) + E2_ i yref _ i (k ) ,
* where, X (k ) = X(k ) , A = A * i i

(23)

i (k )

BcCi

0 A* c

* , B = B , i

E1 _ i

E * = 0

0 E2 _ i = * B c

u(k ) = V *iqd (k )

d( k ) = I Lqd ( k ) , y ref _ i (k ) = I * iqd (k ) .

As described in the voltage controller, the stabilizing compensator of the current controller, which yields the optimal control vector u(k) in (23), can guarantee the stability of the overall system including the plant model as well as the servo-compensator and the desirable performance of the system, both of which can be achieved by choosing a proper feedback gain matrix Ki that minimizes a discrete optimization criterion (24) such that the system is stable:
T J = X i ( k )Q i X i ( k ) + i u T ( k )u ( k ) ,
k =0

(24)

where, Qi is a symmetrical positive-definite matrix and i>0 is a small number, both of which should be selected by the controller designer. By solving the Riccati equation for the system (23), the feedback gain Ki can be obtained. As a result, the optimal control input u(k) can be expressed from the gain Ki and state variables (X and i):
X( k ) u ( k ) = K i X i ( k ) = K i _ 1 K i _ 2 . i ( k ) = K i _1X(k ) K i _ 2 i (k )

Based on the above system parameters, the various simulations have been implemented under both linear and nonlinear loads. In case of the linear load, a resistive load step change at 80 msec is simulated from 0% to 100% and vice versa in Fig. 6 and 7, respectively. Next, Fig. 8 shows simulation results under an inductive load which consists of a resistor and an inductor. Finally, Fig. 9 shows simulation waveforms of the nonlinear load which is composed of an three-phase inductor (2 mH), a three-phase diode bridge, a DC-link capacitor (1000 F), and a resistor (7 ).
VLAB, VLBC VLC [V] , A 400 200 0

-200 -400 0.05 100 0.06 0.07 0.08 0.09 0.1 0.11 0.12

(25)

iiA, iiB, iiC [A]

50 0 -50 0.06 0.07 0.08 0.09 0.1 0.11 0.12

-100 0.05 50 iLA, iLB, iLC [A]

Furthermore, if the control input u(k) can vary within u(k ) u0 , then the control input should be limited by the space vector PWM inverter. So the following modified control input can be applied:

-50 0.05

0.06

0.07

0.08 0.09 T ime [sec.]

0.1

0.11

0.12

Fig. 6. Simulation results under a resistive load step change at 80 msec. (0% to 100%).

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2004 35th Annual IEEE Power Electronics Specialists Conference

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VLAB, VLBC VLCA [V] ,

400 200 0

V. CONCLUSIONS The control strategy employing a discrete-time optimal + sliding-mode voltage controller and a discrete-time optimal current controller is proposed for digital control of the UPS systems. In the paper, the UPS system circuit model was analyzed and then a discrete-time state space model of the UPS system was given. Particularly, the optimal voltage controller includes a sliding-mode control model because of its characteristics such as the good transient and no-overshoot response. First of all, the proposed control method is easily implemented, and only two state variables (VL and Ii) are measured. In designing the voltage/current controllers, the feedback gain (Ki-2) of the servo-compensator (i) in the current controller should be at least ten times larger than the feedback gain (Kv-2) of the servo-compensator (v) in the voltage controller because the response of the current controller should be much faster than that of the voltage controller. Finally, the effectiveness of the approach was validated through Fig. 6 to Fig. 9 since the simulation results show a fast response time, a low voltage THD, and a very small tracking error of the output voltages under a resistive load step change, a 100% inductive load, and even a nonlinear load.

-200 -400 0.05 100 0.06 0.07 0.08 0.09 0.1 0.11 0.12

iiA, iiB, iiC [A]

50 0 -50 0.06 0.07 0.08 0.09 0.1 0.11 0.12

-100 0.05 50 iLA, iLB, iLC [A]

-50 0.05

0.06

0.07

0.08 0.09 T ime [sec.]

0.1

0.11

0.12

Fig. 7. Simulation results under a resistive load step change at 80 msec. (100% to 0%).

VLAB, VLBC VLCA [V] ,

400 200 0

-200 -400 0.05 100 0.055 0.06 0.065 0.07 0.075 0.08 0.085 0.09 0.095 0.1

iiA, iiB, iiC [A]

50 0 -50 0.055 0.06 0.065 0.07 0.075 0.08 0.085 0.09 0.095 0.1

-100 0.05 50 iLA, iLB, iLC [A]

REFERENCES
0

[1]
0.055 0.06 0.065 0.07 0.075 T ime [sec.] 0.08 0.085 0.09 0.095 0.1

-50 0.05

[2]

Fig. 8. Simulation results under an inductive load (100%, 0.8 p.f.).

[3]

From Fig. 6 to 9, an upper figure shows the load line to line

VLAB, VLBC VLCA [V] , 400 200 0

[4]

[5]
0.055 0.06 0.065 0.07 0.075 0.08 0.085 0.09 0.095 0.1

-200 -400 0.05 100

[6]

iiA, iiB, iiC [A]

50 0 -50 0.055 0.06 0.065 0.07 0.075 0.08 0.085 0.09 0.095 0.1

[7]

-100 0.05 50 iLA, iLB, iLC [A]

P. Mattavelli, A modified dead-beat control for UPS using disturbance observers, IEEE PESC02, vol. 4, pp. 1618-1623, June 2002. O. Kukrer, Deadbeat control of a three-phase inverter with an output LC filter, IEEE Trans. on Power Electronics, vol. 11, pp. 16-23, Jan. 1996. K.P. Gokhale, A. Kawamura, and R.G. Hoft, Dead beat microprocessor control of PWM inverter for sinusoidal output waveform synthesis, Conference Record of IEEE Power Elec. Spec. Conf., 1985, pp. 28-36. F. Botteron, H. Pinheiro, H. A. Grundling, J. R. Pinheiro, and H. L. Hey, Digital voltage and current controllers for three-phase PWM inverter for UPS applications, IEEE IAS01, vol.4, pp. 2667-2674, 2001. E.J. Davison and B. Scherzinger, Perfect control of the robust servomechanism problem, IEEE Trans. on Automatic Control, vol. 32, no. 8, pp. 689-702, 1987. B. A. Francis and W. M. Wonham, The internal model principle for linear multivariable regulators, Applied Mathematics and Optimization, vol. 2, no. 2, pp. 170-194, 1975. V. Utkin, J. Guldner, and J. Shi, Sliding Mode Control in Electromechanical Systems, Taylor & Franci, Philadelphia, PA, 1999.

-50 0.05

0.055

0.06

0.065

0.07

0.075 T ime [sec.]

0.08

0.085

0.09

0.095

0.1

Fig. 9. Simulation results under a nonlinear load.

voltages (VLAB, VLBC, VLCA), a middle one is the inverter output phase currents (iiA, iiB, iiC), and a bottom one presents the load phase currents (iLA, iLB, iLC), respectively.

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