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Eres [1/m]
10
2
0 5 10 15 20 25 30 35 40 45
contour points
of the spacer.
20 1.5
contour points 30 1
40 0.5 time [ms]
Eres [1/m]
0
tions for such a switching impulse are made with
a sampling time Ta = 12:5 s and with N = 212
-5
1011
. The in
uence of surface resistivity in case -20
7.4 7.6 7.8 8 8.2 8.4 8.6
time [s]
12.5
s20 Figure 6: In
uence of resistivity
12 s13
s11
11.5 s9
s7 Improving calculation time
11
Eres [1/m]
10.5
One major drawback when doing numerical sim-
ulation of transient elds is the high amount
10
Figure 5: In
uence of resistivity used to speed up eld calculation in [5] and [6].
The target hardware environment is a cluster of
of a switching impulse voltage is shown in g- one R5000 based SGI workstation (the one that
ure 5. The peak value of the resultant stress has has been used for the sequential computations)
a maximum for a capacitive-resistive eld with and two LINUX based PCs, one with a 200MHz
109
and is clearly lower for a resisitive eld of PentiumPro CPU, the other one with a newer
107
. 400MHz AMD K6 CPU. This environment is
supposed to be representative of contemporary
standard resources which are available to engi-
neers. The widely spread parallel programming
Polarity reversal library PVM (Parallel Virtual Machine) [4] has
been used to implement the parallelization of the
code.
A further point of interest is the simulation of Parallelization of the Code
polarity reversal for HVDC systems. The sim- After transforming the (discretized) transient
ulated voltage changes between +/- 1 kV in a voltage into the frequency domain a set of N
reversal time of 125 ms. The duration of the frequencies is obtained. For each of these fre-
whole simulated voltage is 16 s and is sampled quencies the eld calculation has to be done sep-
with N = 210 discrete values. Figure 6 shows arately. Since all frequencies can be calculated
the in
uence of surface resistivity on the polarity independently from each other the task can eas-
reversal. For both a purely capacitive eld (s20) ily be parallelized based on a master slave ap-
and a purely resistive eld (s9) the electric eld proach. One node (i.e. computer) is assigned the
stress is similar to the applied voltage. However, master (who has to coordinate the parallel job)
for capacitive-resistive elds (s11-s13) the resul- while the others are the slaves (who are waiting
tant electric stress exceeds the static value tem- to receive a task from the master). Each slave
porarily after the reversal. This peak approaches is assigned a frequency that is has to calculate.
the nal static value with a time constant that Since the administrative part of the algorithm is
depends on the resistivity. not very CPU intensive a slave task can also be
started on the master node. Whenever a slave References
has nished its calculation it informs the mas-
ter that it is ready to calculate a new frequency. [1] F. Messerer, W. Boeck
The parallel program has nished its job when Field Optimization of an HVDC-GIS-
all frequencies have been processed. Spacer, Annual Report CEIDP, pp. 15-18,
1998, Atlanta
Results of Parallelization
Table 1 shows the overall calculation times for [2] H. Singer
one node (sequential calculation), two nodes and Impulse stresses of conductive dielectrics,
three nodes. The calculation example in this case 4th ISH Athen, 1983, 11.02
is a polarity reversal with N = 210 frequencies. [3] S. Chakravorti, H. Steinbigler
Capacitive-Resistive Field Calcula-
SGI Linux Linux tion around a HV Insulator using Boundary
R5000-180 PPro200 AMD K6-400 time Element Method, 10th ISH Montreal, 1997,
in use o o 9h23' Vol.3, p. 49-52
in use in use o 3h55' [4] A. Geist et al.
in use in use in use 1h21' PVM 3 User's Guide and Reference Manual,
Table 1: Results of parallelization Oak Ridge National Laboratory, Tennessee,
1994
The time can be signicantly reduced by paral-
lelization. Since there is almost no communica- [5] A. Blaszczyk, Z. Andjelic, P. Levin and A.
tion between the tasks on the parallel cluster dur- Ustundag
ing the actual calculation a very high parallel ef- Parallel Computation of Electric Fields in
ciency can be achieved as for instance by using a Heterogeneous Workstation Cluster, pp.
the R5000 SGI and the PentiumPro PC which 606-611, Lecture Notes in Computer Science
have similar performance for such applications. 919, HPCN Europe, Springer Verlag, 1995
By an additional 400MHz AMD PC a consider- [6] A. Blaszczyk and C. Trinitis
able improvement can be achieved. Experience with PVM in a Industrial Envi-
roment pp. 175-179, Lecture Notes in Com-
Conclusions puter Science 1156, EuroPVM'96, Springer
Verlag, 1996
A simulation tool for the calculation of sev-
eral transient elds is developed and tested.
Address of author
Impulse voltages can be calculated. The in-
vestigated surface resistivity has only in
u- Frank Messerer
ence on the eld distribution for switching Lehrstuhl fur Hochspannungs- u. Anlagentechnik
impulse voltage. Arcisstrasse 21
Polarity reversal voltage is simulated. Technische Universitat Munchen
Capacitive-resistive elds have an in
uence D-80290 Munchen, Germany
on the eld distribution. E-Mail: frame@hsa.ei.tum.de
An acceleration of the computations can be
achieved by parallel processing of the eld
calculation. The calculation time can be
signicantly decreased.