Maciel 0

SAP-1
Simple As Possible Computer

An experiment performed by:

Chris Luu

&

Brandon Maciel

Beginning in October 2007

Ending in December 2007

 Maciel 1

Table of Contents

Purpose 2

Preliminary Calculations and Predictions 3

Equipment 5

Procedure 6

Results 19

Conclusions 20
 Maciel 2

Purpose
The purpose of this experiment is to build a computer that can perform addition and

subtraction of numbers programmed into the SAP memory, using the simplest possible

configuration of microchips. Each major section of the computer is to be built in separate

stages and each section is tested separately to ensure proper functioning of the computer as a

whole.
 Maciel 3

Preliminary Calculations &

Predictions

The SAP is going to be used to add and/or subtract numbers that are programmed into its

memory. This is going to be done by: 1) Gathering and understanding a predetermined

program, 2) Constructing the SAP, 3) Programming the SAP with this program and finally, 4)

executing the program and troubleshooting if necessary.

The most important part of getting this SAP to do what is needed of it, namely the addition

and subtraction of numbers, is to understand the program that it needs to implement that

enables it to do the intended function. The program (figure 1) that is to be used is 16 + 20 + 24

- 32. This program consists of six steps, along with programming the numbers to be

manipulated into four of the memory addresses. The first step is to program 16 into the SAP

via loading the 16 into an accumulator register. The second step is to add 20 to the existing 16

in the accumulator by placing 20 in the B register and that will in turn trigger the

adder/subtracter to add the existing number, 16, in the accumulator to give a numeric total of

36 which replaces the former number, 16, in the accumulator. The third step is to add the

number 24 to the newly existing number in the accumulator, 36, by the same procedure as step

two, thus giving a new numeric value of 60. The forth step is to subtract the number 32 from

60 using the same procedure as steps two and three (with the exception that the

adder/subtracter will be subtracting versus adding) ending in the numeric value of 28, thus
 Maciel 4

ending the mathematic portion of this experiment. The fifth step is to then send the number

28 to the output register, where it will then be sent to the binary display LED’s displaying the

number as a binary number. The sixth and final step is a Halt function, which tells the computer

that the program is complete and to stop running.

Note that in the program, the numbers to be added or subtracted are in the high memory

and the last set of numbers in the program. This is necessary because the Program Counter

begins with 0000 and counts up. Note also LDA, ADD, SUB, HLT, and OUT are in the program.

These are just abbreviations for the functions put in mnemonic form. One final note is that the

program is written in Hexadecimal notation. This is called Assembly language and is ultimately

converted to Binary form or aka Machine language which enables the SAP to read the data.

The Machine language is therefore called the Operation Code (OP Code) because it tells the

computer what to do. In order to learn how to write the Source Program, which is the

Assembly Language version and the industry standard for writing these types of programs, each

step will be correctly translated and explained. Also, the Assembly Language must be

converted to Machine Language because this SAP is designed to understand Binary, which is

Machine Language. This also will be done with explanation when each part of the program is

written.
 Maciel 5

Equipment
Microchips

10- 7400 Quad 2 Input NAND Gates 5- 7404 Hex Inverters

5- 74126 Tri-State Buffers 9- 74173 Quad D Flip/Flops

1- 7493 OR Gate 1- 74157 Multiplexer

5- 74107 Dual J/K Flip/Flops 2- 7486 Quad EXCLUSIVE-OR Gates

2-7410 Triple Three Input NAND Gates Four Bit Adders 2- 74189 16 X 4 RAM’s

Miscellaneous

3- 8 Section DIP Switches

24- 10kΩ Pull-Up Resistors

8- LED’s

1- Hewitt-Packard Electronic Experiment Workstation

1- TTL Logic Probe

2- Large Breadboards

3- Small Breadboards

A Great Abundance of Large and Small Wire

1- Digital Computer Electronics Textbook (Malvino/Brown Third Edition)

 Maciel 6

Procedure

I. Program Counter and Control Switches

Each section of the SAP is to be built individually, tested, and finally wired together. The

first of these sections to be built is the Program Counter shown in figure 2. The microchips

used for the Program Counter are: 4- 7400 NAND GATES, 2- 74107 DUAL J-K flip/flops, 1-

74LS04 HEX INVERTER, 1- 74LS107 DUAL JK MASTER-SLAVE flip/flop, 1- 74126 TRI STATE

BUFFER. There is also a Hewitt-Packard experimental electronic workstation that is used for a

1HZ clock signal, common ground and VCC connections, and a means with which to test this

and all other sections of the SAP. There is also an eight section dip-switch that will be mounted

directly on the breadboard that will control the SAP’s ability to RUN/HALT (switch 1), SINGLE

STEP ON/OFF (switch 2), and to either use single step or automatic clock pulses with the AUTO

ON/OFF (switch 3) that either enables or disables the 1hz CLOCK signal coming from the Hewitt

Packard. The Program Counter functions as a ripple-up counter and counts up from 0000 to

1111. Four outputs are sent directly to the W-bus which then tells the MAR to activate and in

turn tells the RAM which memory address to access. CP, CLEAR BAR, and EP are the inputs of

the Program Counter; however, a note should be taken of the fact that CLOCK BAR actually runs

the clock of the Program Counter only, whereas CLOCK runs the rest of the SAP.
 Maciel 7

II. Output Register

The next section of the SAP that is built is the Output Register (figure 3). The microchips

needed to build this section are: 2- 74173 QUAD flip/flops. Other equipment needed to create

this section is 8- 1 kΩ resistors as well as 8 LED’s (Light Emitting Diodes). The purpose of the

Output Register is to take the information from the accumulator and transfer that information

in a form that can be read and understood by observers. The Output Register functions as a

Parallel Shift Register. That is, eight bits of data can be seen at the same time which enables

the observer to check the numerical value and find out if the SAP is functioning properly. The

inputs that drive this section are CLEAR, CLOCK, and Lo Bar, as well as the W0 through W7 that

come from the W-bus. As a very important note for building this Output Register, be very

careful with the pull-up resistors in that they do not touch each other because they will short

out the signal to the LED’s and cause an error to be read from the binary display.

III. State Ring Counter

The next section of the SAP to be built is the State Ring Counter, and is pictured in figure 4.

Quite possibly the simplest section of the SAP to build, the only microchips needed are 3 -74107

DUAL J/K flip/flops. The State Ring Counter functions quite simply as a ring counter. It counts

from 00000000 to 00111111. The purpose of this counter is to count each of the SAP’s six

states, or phases. Each phase of this ring counter produces one of the six T-states of the
 Maciel 8

computer run, which drives the computers fetch cycle and execute cycles. The inputs coming

into this section are the CLOCK and CLEAR Bar outputs.

IV. Instruction Decoder

The next section of the SAP is a group of several microchips that make up something called

the Instruction Decoder, as shown in figure 5. The microchips that are involved in building the

Instruction Decoder are: 2- 7404 HEX INVERTERS, 3- 7420 FOUR-INPUT NAND GATES, and 2-

74173 QUAD D flip/flops. This register is also a tri-state register, sending high, low, and no

signals through its outputs. The register also has two distinct functions. First, it operates as on

itself as four of its outputs are sent back into the Instruction Decoders inputs which in turn,

drive itself. Second, the other four outputs are sent onto the W-bus and control the SAP’s five

major operations in the SAP’s execution cycle. The five major functions are LDA (load data into

accumulator), ADD, SUB (subtract), OUT (output), and HLT (halt). Aside from self sustaining

four of its inputs, CLOCK, CLEAR,LI Bar, and EI Bar are the other major inputs to this register.

V. Control Unit

One of the most important sections of the SAP is the Control Unit. The Control Unit is

shown in figure 6. This section consists of many different microchips: 6- 7400 QUAD TWO-

INPUT NAND GATES, 2- 7404 HEX INVERTERS, 2- 7410 TRIPLE THREE INPUT NAND GATES, and 1-

7420 DUAL FOUR-INPUT NAND GATES. This Control Unit receives all six state phases and the

outputs from the Instruction Decoder and produces the control signals that keep all the
 Maciel 9

different sections of the SAP running in unison with each other. In total, there are 12 wires that

run from this matrix that is called the Control Bus. These signals are: Cp, EP, Lm Bar, CE Bar, LI Bar,

EI Bar, LA Bar, EA, Su, EU, Lo Bar, and LB Bar. The input signals that come into the Control Unit are

all six T-states from the Ring Counter, as well as LDA, ADD, SUB, and OUT from the Instruction

Decoder. If troubleshooting is necessary, a TTL logic probe will come in handy in order to find

out what signal, is any, are being sent wrong by this Control Unit.

VI. B Register

After the Control Unit is built, the B register, shown in figure is the next section to be built

in the SAP, as shown in figure 7. The B Register is another simple circuit, consisting of 2- 74173

QUAD DELAY flip/flops. The B0 through B7 outputs of this register are sent directly to the

Adder/Subtracter, or the ALU. These outputs provide the Adder/Subtracter with the data to be

added or subtracted to the numerical value stored in the Accumulator. As for the inputs that

drive this circuit, all eight lines of the W-bus are sent into the B Register. Also driving this

register are the CLOCK, LB Bar inputs, as well as the CLR input, which is grounded.

VII. ALU

The next circuit to be built in the SAP is the ALU circuit shown in figure 8. This section is

compromised of 2- 7483 FOUR BIT ADDERS, 2- 7486 QUAD EXCLUSIVE-OR GATES, and 2- 74126

THREE-STATE BUFFER microchips. The ALU, or more commonly known as a Full

Adder/Subtracter, is the circuit that takes the data or numerical value from the B Register and
 Maciel 10

combines the 16 bits of data to produce a new numerical value. Coming into the ALU are 8 bits

(or inputs of data) from the B Register, B0 through B7, as well as 8 bits of data from the

Accumulator, A0 through A7. What makes this circuit add and subtract, is the SU inputs; when SU

is set to low, the ALU adds the 16 bits of data together, and when SU is set to high, the ALU

makes the B Register data a not value, which subtracts this data from the Accumulator data. A

note should be taken of the fact that this circuit DOES NOT IMPLEMENT A CLOCK, so therefore

when the EU input is set to high, the data is sent IMMEDIATELY to the W-bus. The visual data

that is to be recorded from the Output Register comes from this circuit via the W 0 through W7

outputs that send the data to the W-bus. The form of math used in the SAP is the 2’s

compliment method.

VIII. Accumulator

The eighth section of the SAP to be built is the Accumulator, as shown in figure 9. Making

up the Accumulator are 2- 74126 TRI-STATE BUFFERS and 2- 74173 QUAD DELAY flip/flops. This

circuit contains the central numerical value, or data, that is shown through the output register

and is ultimately the supplier of visual data that is sent to the ALU that is to be recorded and

scrutinized. There are 8 bits of data flowing to this device which are W0 through W7 that come

from the W-bus and 8 bits of data flowing out of this device, A0 through A7, which go to the ALU

to be added, subtracted, or unchanged. There are also CLOCK, LA Bar, and EA inputs sent to this

circuit. When the LA Bar input is set to low, the data in is enabled and as with D-flip/flops, is

delayed one clock pulse before the input is sent to the output which in turn are enabled in

conjunction with the EA line which if set to high, will send data A0 through A7 back into the
 Maciel 11

Accumulator. EA also determines if the data will be sent to the ALU to be subtracted. LA Bar

also determines if the data is to be added, subtracted, or just sent to the Accumulator.

IX. Memory (RAM)

The final section of the SAP to be built is the Memory circuit as shown in figure 10. This

consists of: 1- 74157 MULTIPLEXER, 2- 74189 16 X 4 RAM’s and 1- 74173 QUAD D flip/flops in

the microchip department, as well as 15 dip switches and 15- 10kΩ pull-up resistors. This

circuit has to be tested extensively in order to ascertain that it is functioning properly. All 16

Address locations have to be programmed with at least 16 data locations in order to see if all

the data is being properly stored. There are 4 dip-switches (#’s 4-7) that control the 4 memory

locations of the circuit numbered A0 through A3. There are also 8 dip-switches (#’s 11-18) that

control the data locations D0 through D7, as well as dip-switches for RUN/PROGRAM at switch 8

(which controls the MULTIPLEXER), CE Bar at switch 9 (which controls the RAM’s

RUN/PROGRAM), as well as a WE Bar at switch 10 (which controls the READ/WRITE enable

section of the RAM). Again, this circuit is very complicated in total and great attention has to

be paid so the 10kΩ pull-up resistors do not touch each other.

The data that will be programmed into the RAM is shown in figure 11. Note that the

memory locations as well as BOTH data locations data is written and entered in hexadecimal

form. This is the way any and all programs will be entered into the SAP. Also note that this

RAM circuit is Static Ram. Other inputs that drive this circuit are the CLOCK and LM Bar. The LM

Bar line inputs into the QUAD D flip/flop and send Q0 through Q3 to the MULTIPLEXER and send
 Maciel 12

D0 through D3 to the outputs of the W0 through W3 of the RAM. Also, the RAM outputs W0

through W7 to the W-bus.

X. Programming the SAP

1) Step 1: Clearing the Memory

Now that the individual SAP components are built, it is time to program the sap with the

program that makes up the basis for this experiment. Before doing this, in order to clear

everything out from the memory circuit and the W-bus, a CLEAR will be sent from the Program

Counter by setting dip-switch 1 form the CLEAR Bar position (a high signal) to the CLEAR

position (a low signal). This will make the SAP wipe out any information that will not be used for

the actual experiment.

2) Step 2: Making the Program Counter Control Unit Settings

Settings need to be made to the 3 Control Switches that will allow the Memory to be

programmed. The CLOCK must be turned on to either single pulse or automatic. In this

experiment, the CLOCK will be set to AUTO so that every time data is loaded into the RAM, a

CLOCK pulse does not have to be inputted, thereby reducing the risk of error. Switch 1 must

also be put in the on position momentarily so that memory is cleared, and then restored to the

off position so that the SAP can operate.

3) Step 2: Entering the Program in the Memory Circuit

 Maciel 13

At this point of the experiment, the RAM switches are the main tool used. First, the

Instruction Set will be programmed. This consists of six instructions:

A. Load Address 9 to Accumulator

First, in order to load the data into the Accumulator, the task will be

renamed LDA (mnemonic memory aid language). After that, both LDA and

address 9 will be converted to Hexadecimal form 0916 in order to convert the

data to Assembly Language which is the formal method of writing the

program, also called the Source Program.

Second, this Assembly Code will be converted to Binary because the SAP is

designed to interpret Binary, technically named Machine Code, and this

translates to 000010012.

Third, this is programmed into the Memory. Switches 8 and 9 are set to on

and switch 10 is set to off. Then switches 4 through 7 are set to

off/off/off/off to set the memory address to 0 (00002). After that, switches

11 through 18 are set to off/off/off/off/on/off/off/on to set 000010012 into

the Memory data. Putting switch 10 momentarily to on then off will write

the data in to address 0.

B. Add Address 10 to the Adder/Subtracter

First, in order to load the data into the Adder, the task will be renamed ADD

(mnemonic memory aid language). Then, both ADD and address 10 will be
 Maciel 14

converted to Hexadecimal form 1A16 in order to convert the data to the

Assembly Language.

Second, the AssemblyLanguage will be converted to Binary because the SAP

is designed to interpret Binary and this translates to 000110102.

Third, this is programmed into the Memory. Switches 8 and 9 are set to on

while switch 10 is to off. Then switches 4 through 7 are set to off/off/off/on

to set the memory address to 1 (00012). Following this, switches 11 through

18 are set to off/off/off/on/on/off/on/off to enter 000110102 into the

Memory data. Setting switch 10 to on then off again will write this data to

address 1.

C. Add Address 11 to the Adder/Subtracter

First, ADD and address 2 will be converted to Hexadecimal form 1B16 in

order to convert the data into an Assembly Language.

Second, the Assembly Language will be converted to Machine Language and

that is 000110112.

Third, this is programmed into the Memory. Switches 8 and 9 are set to on

and switch 10 is set to off. Switches 4 through 7 are set to off/off/on/off to

set the memory address to 2 (00102). Then switches 11 through 18 are set

to off/off/off/on/on/off/on/on to enter 000110112 into the Memory data.

Setting switch 10 to on then back to off will again write the data into

Memory.

D. Subtract Address 12 to the Adder/Subtracter

 Maciel 15

First, Subtract will be renamed SUB. Then SUB and address 12 will be

converted into Hexadecimal 2C16 in order to convert to Assembly Language.

Second, the Assembly Language will be converted to Machine Language,

001011002, because the SAP is made to understand the Binary format.

Third, the Memory will be programmed with this information. Switches 8

and 9 are set to on while switch 10 is set to off. Switches 4 through 7 are set

to off/off/on/on to set the memory address to 3 (00112). Then switches 11

through 18 are set to off/off/on/off/on/on/off/off to enter 001011002 into

the Memory data. Again toggling switch 10 from on to off will write this

data in to address 3.

E. Data Sent to Binary Output

First, Output is changed to OUT in mnemonic form. Then it is converted to

Hexadecimal EX16 to change it to Assembly Language. (X stands for don’t

care)

Second, the Assembly Language is converted to Machine Code, 1110XXXX2.

Third, this has to be programmed into the Memory. Switches 8 and 9 must

again be on while switch 10 is set to off. Switches 4 through 7 must be set

to off/on/off/off to set the address to 4 (01002). Switches 11 through 18

must be set to on/on/on/off/X/X/X/X to enter 1110XXXX2 into the Memory

data. Momentarily turning switch 10 on and off will write the data into

address 4.

F. Halt Program
 Maciel 16

First, Halt is changed to HLT in mnemonic form. Then it is converted to

Hexadecimal FX16 to change it to Assembly Language.

Second, the Assembly Language is converted to Machine Language,

1111XXXX2.

Third, this has to be programmed into the Memory. Switches 8 and 9 must

be set to on and switch 10 is set to off. Switches 4 through 7 are set to

off/on/on/off to set it to address 5 (01012). Then switches 11 through 18

must be set to on/on/on/on/X/X/X/X to enter 1111XXXX2 into the Memory

data. Switch 10 must be momentarily set to on then back to off to write the

data in.

Note: addresses 6 through 8 do not matter and therefore will not be programmed.

Now the numerical values 16 + 20 + 24 – 32, must be programmed into the Memory:

G. 16

First, this must be converted to Hexadecimal 1016 in order to convert the

number to Assembly Language.

Second, this must be converted to Machine Language, and this is 000100002.

Third, 000100002 must be programmed into memory address 9 (10012) by first

setting switches 8 and 9 high (on) and 10 low (off). Then switches 4 through 7

must be set to on/off/off/on to access memory address 9. Then switches 11

through 18 must be set to off/off/off/on/off/off/off/off to enter the number

 Maciel 17

000100002 into the data section of the Memory which will give address 9 this

value. Setting switch 10 momentarily to on then back to off will write the data

in.

H. 20

First this number must be converted to Hexadecimal 1416 in order to convert

the number to Assembly Code.

Second, this number must be converted to Machine Code and this number is

000101002.

Third, 000101002 must be programmed into memory address 10 (10102) by

setting switches 8 and 9 to on and 10 back to the off positions. Afterwards,

switches 11 through 18 must be set to off/off/off/on/off/on/off/off which

will enter 000101002 into the data section of the Memory and will give

address 10 this value. Finally, setting switch 10 to on and then back to off

will lock this data in.

I. 24

First, this number must be converted to Hexadecimal 1816 in order to convert

the number to Assembly Language.

Second, the Assembly Language must be converted to Machine Language,

and this is 000110002.

Third, the 000110002 must be programmed into memory address 11 (10112)

by setting switches 8 and 8 to on and 10 back to the off positions. After that,
 Maciel 18

switches 11 through 18 must be set to off/off/on/off/off/on/off/off which

will enter 000110002 into the data section of the Memory and will give

address 11 this value. Again setting switch 10 momentarily to on then back

to off will lock this data in to address 11.

J. 32

First, this number must be converted to Hexadecimal 2016 in order to convert

it to Assembly Language.

Second, the Assembly Language must be converted to the Machine Language

equalivant, 001000002.

Third, this number must be programmed into memory address 12 (11002) by

setting switches 8 and 9 to on and 10 to the off positions. Then, switches 11

through 18 must be set to off/off/on/off/off/off/off/off to enter 001000002

in the data section of the memory and will give address this value. Again

setting switch 10 to on and then back to off will lock this data in.
 Maciel 19

Results

After inputting the program into the Memory, I checked all the addresses and found out that

all the data had in fact been successfully stored via the Binary display. The only thing I found

noteworthy is that the data seemed to be in reverse. That is the address in the MSB and the

data in the LSB. After running the program, it took about a minute for the program to stop

running. The display was still on the last memory I accessed, and it disappeared after about 10

seconds. Then there were no LED’s on for about thirty seconds, then finally the results showed:

010011002. Now this was defiantly not the result that was supposed to happen, as the answer

to the equation was 28 which should have shown as 000111002. However I did at least get a

confirmation that a change did in fact happen.

As a note, at first I found that the CLEAR and CLEAR Bar along with the SINGLE STEP

switches were not functioning properly. So to fix this problem, I disconnected the SINGLE STEP

switch all together, and manually changed the wires that were output of the CLEAR switch so I

had to do a manual, change the wires-type clear. Using the logic probe, I proved by monitoring

the TTL signals that the necessary changes were made, namely clearing out the Binary Display.
 Maciel 20

Conclusion

I found building the SAP to be very helpful in my understanding of how all the 1’s and 0’s

come together to form a program. I also found that my knowledge about how all these

microchips work together to be greatly increased. Although I ultimately ran out of time to be

able to troubleshoot the SAP, I know I would have gotten it up and running because I felt that I

understood the SAP as a whole. And as for the technicality of proving the fact that these chips

all work together just as it was supposed to, I am inclined to say that the results are

inconclusive.