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A system has set of one or more inputs and one or more outputs
Microprocessor
Contains the central processing unit.
The input/output system and memory are accessed using an external bus.
Commonly used in general purpose computers.
Easier to expand and upgrade
NOT a single chip computer
Microprocessor
Inputs
Input / Output Central
Memory
System Process Unit
Outputs
Microprocessor vs. Microcontroller
Microcontroller
The central processing unit, input/output system, memory, timer, serial ports,
interrupt control unit, PWM, ATD etc are contained in a highly integrated single
chip.
Commonly used in specific purpose computers for real-time applications.
Systems are constrained by Microcontroller limitations.
Generally referred to as Single Chip Computer
Microcontroller
Non-volatile Memory – can retain the stored information even when not
powered
ROM
EEPROM
UV ROM
FLASH
NVRAM
FRAM
Memory - EEPROM
ROM
Checksum
Cyclic Redundancy Code (CRC)
RAM
Bit patterns like 0x55 and 0xAA can be written and read
Serial Communication - UART
RXD
SCI Port
TXD
Inter-Integrated Circuit bus (I2C bus) is a simple 2 wire, bidirectional serial bus
developed by Philips.
Developed for 8 bit applications
In addition to Microcontrollers, several peripherals also exist that support the I2C
bus.
The I2C bus is a two line, multi-master, multi-slave network interface with collision
detection.
Up to 128 devices can exist on the network and they can be spread out over 10
meters.
The two lines of the network consist of the serial data line and the serial clock
line.
Each node on the network has a unique address which accompanies any
message passed between nodes.
Widely used in consumer electronics, automotive, aerospace and industrial
applications.
Serial Communication – I2C
START Signal : When the bus is free, i.e. no master device is engaging the bus (both SCL and SDA
lines are at logical high), a master may initiate communication by sending a START signal. START
Signal denotes the beginning of a new data transfer (each data transfer may contain several bytes of
data) and wakes up all slaves.
Serial Communication – I2C
Slave Address Transmission : A unique slave address is transmitted by the master. This is a seven-bit
calling address followed by a R/W bit. The R/W bit tells the slave the desired direction of data transfer.
1 = Read transfer, the slave transmits data to the master.
0 = Write transfer, the master transmits data to the slave.
Only the slave with a calling address that matches the one transmitted by the master will respond by
sending back an acknowledge bit. This is done by pulling the SDA low at the 9th clock
Data Transfer : Once successful slave is identified, the data transfer can proceed byte-by-byte in a
direction specified by the R/W bit sent by the calling master.
STOP Signal : The master can terminate the communication by generating a STOP signal to free the
bus
Repeated START Signal : A repeated START signal is a START signal generated without first
generating a STOP signal to terminate the communication. This is used by the master to communicate
with another slave or with the same slave in different mode (transmit / receive mode) without releasing
the bus.
Bus Arbitration: I2C is a multi-master bus that allows more than one master to be connected on it. If two
or more masters try to control the bus at the same time, bus conflict is resolved by bus arbitration.
Serial Communication - CAN
Message Transfer
Information is sent on the bus in fixed format message frames.
Any node may start to transmit when the bus is free (Bus Idle).
If two or more nodes start transmitting in the same frame, bus access conflict is resolved by bit-wise
arbitration.
The highest priority message wins bus access.
Transmitting nodes which loose arbitration become receivers.
No data or time is wasted, someone always wins.
Nodes which loose arbitration will automatically re-transmit.
Arbitration Field (identifier) determines the message priority.
Identifier - intended to label message contents (no physical node addresses).
All nodes check the consistency of messages received and will flag an inconsistent message to the
entire network.
All receiving nodes will acknowledge a valid message.
A message is received correctly by all nodes or no nodes.
All nodes apply Message Filtering to decide whether to accept a message.
Any number of nodes can simultaneously receive and accept a message (Multicast transmission)
Serial Communication - CAN
Message Types
Data Frame : Carries data from a transmitter to the receivers. Used to transmit
up to 8 bytes of data.
Remote Transmission Request (RTR) Frame : Transmitted by a bus used to
request a Data Frame with the same Identifier.
Error Frame : Transmitted by any node on detecting the bus error (independent
of CPU)
Overload Frame : Used to provide an extra delay between the preceding and
the succeeding Data Frames or Remote Frames.
Data Frames and Remote Frames are separated from preceding frames by an Inter-
frame space
Analog to Digital Conversion
Ports which can be used for general purpose digital input / output
Each GPIO has a Data Direction Register (DDR), which defines direction of data, i.e.,
input / output
Most of the I/O ports are multiplexed with peripheral I/O. When a peripheral is not
used, its I/O port can be used for GPIO
Watchdog Timer
When an interrupt shared by multiple sources, interrupt flag should be cleared by software,
otherwise it is cleared by hardware
A higher priority interrupt can not be interrupted by a lower priority interrupt but a lower priority
interrupt can be interrupted by a higher priority interrupt
Priority of the interrupts can be set by priority register, otherwise default priority will be taken
Systems in which interrupts occurs at fixed at rates (periodically) are called fixed-rate systems
Systems in which interrupts occur aperiodically are called sporadic systems
Systems in which interrupts occurs periodically and aperiodically are called hybrid systems
Context switching is the process of saving and restoring the sufficient information for a real-time
task so that it can be resumed after being interrupted
Interrupt latency is the delay between when an interrupt occurs and when the CPU begins
reacting to it.
Exceptions
Exceptions are special conditions (internal events) generated from the CPU during
program execution that preempts normal processing
Exceptions change machine state and redirect program flow to one of several
possible locations, depending on the exception.
Exceptions are SW interrupts which are executed whenever there is an unwanted
instruction executed in the code
When exceptions occur the SW jumps to the appropriate corresponding exception
vector service routine.
Exceptions are sometimes called traps
Some of the exceptions are divide by zero errors, overflow conditions, invalid opcode,
floating point operations errors.
Polling
The peripheral sets a flag when it has data ready for transferring to the
controller. The controller then notices the flag on its next poll.
Little Endian
Least significant byte (LSB) of a multi-byte value is stored at
the lowest memory address
Intel processors generally use little endian format
Big Endian
Most significant byte (MSB) of a multi-byte value is stored at
the highest memory address
Motorola processors generally use big endian format
Bi-endian
Bi-endian hardware provides capability to compute data in
either of the formats
Either of the format is selectable by software
Bi-endian refers to how a processor treats data accesses.
Instruction accesses on a given processor may still assume
a fixed endianess
Some architectures like ARM, PowerPC provides bi-endian
feature
Harvard and Von-Neumann Architecture
Von-Neumann Architecture
Program instructions and data are stored in a shared memory with one data bus and one
address bus between processor and memory
CPU can be either reading an instruction or reading/writing data from/to the memory
Instructions and data have to be fetched in sequential order limiting the operation bandwidth
CPU first fetches an instruction and then fetches the data from the memory
Two separate fetches slow the controllers operation
Von-Neumann Architecture
Harvard and Von-Neumann Architecture
Harvard Architecture
Program instructions and data are stored in a separate program memory and data memory
with separate data bus and address bus between processor and program / data memory
CPU can read both an instruction and perform a data memory access at the same time
Separate buses for instructions and data allows simultaneous access of program and data,
and overlapping of some operations for increased processing performance
Harvard Architecture
Operating Modes
Halt mode
On-chip oscillator is stopped
With clock frozen, all activities are stopped (including timers)
The only way to wake up the microcontroller is by a hardware reset
The power requirements of the device are minimal and the applied voltage can
be sometimes decreased below operating voltage without altering the state
(RAM / Outputs) of the device
Both in Halt and Idle conditions the state of the microcontroller freezes, but RAM
is not cleared and any outputs are not changed
Cold and Warm Reset
Cold Reset
Restarting the system by turning off the power and then on
All the peripheral registers, variables are initialized
Also called as Hard reset
Example: Power On reset
Warm Reset
Restarting the system without removing the power
Only variables are initialized
Also called as Soft reset
Example: Watchdog reset
Pipelining
An instruction pipeline is a technique used in the design of computers increase their instruction
throughput i.e., the number of instructions that can be executed in a unit of time
Pipelining assumes that successive instructions in a program sequence will overlap in execution
Pipeline with four stages:
Fetch : Instruction is fetched from memory
Decode : Instruction is decoded
Execute : Instruction is executed
Write-back : Instruction results are written back to register or memory
The cycle time of the processor is reduced, thus increasing instruction bandwidth in most cases
Application Software
Software for algorithms, controlling application etc
Software Development Life Cycle
Customer
Requirements
Development Team
Software Development Customer Supplied 1. SRS Preparation
Life Cycle Documents 2. STP Preparation
1. ATP Preparation 3. Traceability
2. Traceability Requirement Phase
1. HLD Preparation
SRS document 2. ITP Preparation
Acceptance Testing 3. Traceability
High Level Design
Validation Team
1. SRS document
2. HLD document
Coding 3. LLD document Program code
development
1. UTP document
Unit Testing 2. Source code
Unit Test Reports
1. ITP document
2. Source code Integration Test
Integration Testing Reports
1. STP document
System Test
2. Source code
System Testing Reports
1. All documents
2. Source code Release notes
SW Delivery
Hardware and Software Initialization Process
Small block of assembly code that prepares the way for the execution of
software written in high level language
Most cross-compilers for embedded systems provide an assembly language
file called startup.s, crto.s or something similar
Startup routine usually performs the following
Disable all interrupts
Copy all initialized data from ROM to RAM
Initialize the uninitialized data to zero
Initialize all peripheral registers
Enable Interrupts
Call main function
Addressing Modes
Direct addressing
Operand is specified by an address field in the instruction
Example: ADD A, 7FH
Indirect addressing
Instruction specifies the register which contains the address of the operand
Example: ADD A, @R0
Register addressing
Instruction specifies the register which contains the operand
Example: ADD A, R0
Immediate constant
Constant is specified in the instruction
Example: ADD A, # 100
Indexed addressing
Intended for accessing memory locations using look-up tables
Index register points to address of the memory location
Implied addressing
Operand are in CPU registers
Example: DAA
Addressing Modes
RTOS
Running
The CPU is assigned to the task, so that its
instructions can be executed
Only one task can be in this state at any point
in time
Ready
All functional prerequisites for a transition into
the running state exist, and the task only waits
for allocation of the processor
The scheduler decides which ready task is
Task States
executed next
Waiting
A task cannot continue execution because it is
waiting for at least one event
RTOS
HW- or SW-
Conditions
Mechanisms
Read conditions
And measured
vvalueswhich
Values , define conditions
Event A
Event A Event B B
Ereignis
Check if event
A has
occurred Trigger Trigger
Task A Task B
React if event A
Wenn
Has das
occurred Hardware React React
... ...
Hardware
End End
Compiler, assembler, linker, locator are all pieces of software that runs on a
host computer
Machine Language
Machine language is the representation of the
program that the microcontroller can understand
and execute
Consists of a series of bit patterns, which when
entered into the instruction register of the
microcontroller will result in specific actions by the
microcontroller
Machine language code is generally very difficult
for humans to understand
Compilers
Translates programs written in high level language
(some human readable language) into an
equivalent set of opcodes (machine-language
instructions) for a particular processor
Cross-compiler is a compiler which run on one
computer platform and generates code for another
Input to the cross-compiler is source code written
in high level language (C, C++ etc) and output of
the cross-compiler is object file
Assembler, Interpreter
Assembler
Assembly language compiler
Translates programs written in assembly language into an equivalent set of opcodes for a particular
processor
Performs a one-to-one translation of human readable mnemonics to the equivalent opcode
Input to the assembler is source code written in assembly language and output of the assembler is
object file
The resulting executable program is fast and compact
Interpreter
An interpreter is used for high level language that is closer to natural language.
It is slow because it translates each source code line every time it executes. With an interpreter,
the program is developed interactively. It is often useful for short quick development activities.
However, with rapid compilation available with modern languages, the advantage is less obvious.
Translates each line of a program into machine language as the statement is encountered. If a
statement is encountered multiple times (as occurs in a loop) the machine must convert it to
machine language each time.
Linker
Linker
A software development tool
accepts one or more object files as
input and outputs a relocatable
program
The linker is thus run after all of
the source files have been
compiled and assembled into
object files
Symbol table contains names and
location of variables and functions
referenced within the source file.
Part of this table is incomplete
because all the variables and
functions are not always defined in
the same file
While the linker is in the process of
merging the section contents, it
also lookout for unresolved
symbols
Locator
Locator
A software development tool that
assigns physical addresses to a
relocatable program
This is the last step in preparing
software for execution by an
embedded system
Output file is called an executable
In some cases, the locator's
functionality is built into the linker
How do you VERIFY the software
that you have written ????
Verification Methods
Peer Review
Offline
Process
Peer Review
Work Review Type
Walkthrough
Product Process
Peer Review
Inspection
Process
Defect Definitions
Trivial
Defects that affect limited areas of functionality that can either be worked around or ignored
Peer Review Team
Author
Developer of the work product being reviewed
Moderator
Leads the review team and keep the team focused
Reader
Paraphrase the work product in the defect logging meeting to provide an
exact view of the work product
Reviewer
Reviews the work product - NOT the author
Recorder
Record errors as detected and classify errors
Offline Review Process
Walkthrough Review Process
Walkthrough Review Process
Inspection Review Process
Inspection Review Process
Verification of Software USING
test and debug tools
Debug Environment
Software Simulator
A debugging tool runs on the host computer and acts as target processor
A simulator can be used to test pieces of the embedded software before the
embedded hardware is available. Attempts to simulate interactions with complex
peripherals are often more complex or limited.
One can step through the code to monitor the status of program. Contents of
registers or variables can be altered to change the way the program runs.
Eliminates (or at least delays) the erase / burn / program EPROM cycle common
in microcontroller program development.
A simulator can't support real interrupts or devices, and usually runs much slower
than the real device
Hardware Prototypes / Simulators
Hardware simulators might be required when the software is ready before the
prototype hardware
Debuggers
Debugger
A debugger can be used to download, execute and debug embedded software over serial
port or network connection between the host and target.
In embedded systems, the debugger and the software being debugged are executing on two
different computer systems.
A debugger actually consists of two pieces of software.
Front-end runs on the host computer and provides the human interface to monitor /
update through GUI-based main window and several smaller windows for the source
code, register contents, and other relevant information about the executing program
Back-end that runs on the target processor and communicates with the front-end over a
communications link of some sort. The back-end provides for low-level control of the
target processor and is usually called the debug monitor.
Debug monitor is software that has been designed for use as a debugging tool. It usually
resides in ROM and communicates with debugger via serial port and provides set of debug
commands to view and modify memory locations or registers, create or remove breakpoints
etc
BDM, JTAG are some of the serial port interfaces
Emulators
Oscilloscope
Oscilloscopes can be used for monitor analog, digital signals, voltage on
particular pin
Logic Analyzer
Logic Analyzer can be used to capture data or events, to measure instruction
times, time sections of code
Embedded System Applications
Automotive
Aerospace
Medical Electronics
Consumer Electronics
Industrial electronics
So on…
If you are given a chance to develop an
EMBEDDED SYSTEM,
how do you design and develop ????
Real Time Embedded System Design