IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40, NO. 3.
MARCH 1993
Modeling for Floating Body Effects in Fully Depleted
SO1 MOSFET’s
Heng-Tien Henry Chen, Student Member, IEEE, and Ruey-Shing Huang, Senior Member, IEEE
Abstract-A new model based on SO1 MOSFET and BJT de-
vice theories is developed to describe the current kink and
breakdown phenomena in thin-film SO1 MOSFET drain-source
current-voltage characteristics operated in strong inversion.
The modulation of MOSFET current by raised floating body
potential is discussed to provide an insight for understanding
the suppression of current kink in fully depleted thin-film SO1
devices. The proposed analytical model successfully simulates
the drain current-voltage characteristics of thin-film SO1
n-MOSFET’s fabricated on SIMOX wafers.
I. INTRODUCTION
M OS devices made on thin-film SO1 (silicon-on-in-
sulator), offering not only faster speed, higher pack-
ing density, simpler processes, latch-up-free CMOS
structure, but also improved device performance, have
become a viable technology for ULSI [1]-[3] due to re-
cent advances in high-quality thin-film SO1 preparation
technology. However, the electrically isolated silicon film
structure of SO1 MOSFET creates floating body effects
such as current kink and early breakdown, which are not
observed in bulk devices. These SO1 floating body effects
are originated from impact ionization, arising from chan-
nel current carriers accelerated in the high-field drain de-
pletion region. When the impact ionization is small, the
generated carriers can be annihilated through recombina-
tion in the film body. Whereas, when the generated car-
riers are of a large amount, some of them are still neu-
tralized in the film, the rest follow the electric field moving
toward the source and accumulate in a potential well,
which appears near the source end at the back interface
as a result of gate and drain biases. The gradually accu-
mulated charges raise the local potential near the source
end. This change of floating body potential in turn mod-
ifies the MOS threshold voltage as well as the potential
drop across the source junction. For a SO1 MOSFET op-
erated in subthreshold situation, the subthreshold swing
can be improved by this body charging [4]. However, for
a device with a strong inversion channel, a current kink
and an early breakdown may be observed in the current-
voltage characteristics if sufficient drain-to-source voltage
Manuscript received June 18, 1992; revised October 8, 1992. This work
was supported by ARC Australia. The review of this paper was arranged
by Associate Editor A. H. Marshak.
The authors are with the Department of Electronics, School of Electrical
Engineering, The University of New South Wales, Kensington. Sydney,
2033 Australia.
IEEE Log Number 9205581.
0278-0070/92$03.00 0 1992 IEEE
583
is applied. This current kink effect is attributed to the
threshold-voltage modulation due to rising body poten-
tial, and the early breakdown, different from that caused
by Drain Induced Barrier Lowering (DIBL) in a tradi-
tional bulk device, results from the source junction tum-
on such that a parasitic lateral BJT is conducting with
source as emitter, body as base, and drain as collector.
Recently, the thinning of SO1 film is reported to have
impacts on the floating body effects, one of the most in-
teresting observations is the suppression of current kink
[ 5 ] . However, most published theoretical analyses about
these floating body effects are through numerical solving
of two-dimensional Poisson’s equation and continuity
equation [6]-[9], which not only requires large computing
resources but is also reported very sensitive to the nu-
merical technique owing to the electrically floating region
[8], [9]. On the basis of SO1 MOSFET and BJT device
theories, we have developed an analytical model to rep-
resent the drain-to-source current-voltage relation for
thin-film fully depleted SO1 devices operated in strong in-
version. The kink effect and bipolar turn-on phenomena
are successfully simulated. Explanations for controls of
these floating body effects in fully depleted SO1 devices
are given. Throughout the whole analysis, we do not take
into account the back-channel conduction caused by large
back-gate bias because it rarely happens in practical ap-
plication. We have chosen n-MOSFET as the device in
our model derivations, similar results could be obtained
for p-MOSFET with corresponding parameters changed.
However, due to the smaller impact ionization effect for
holes, the floating body effects in p-MOSFET are less sig-
nificant.
11. MODELING
Fig. 1 shows the schematic cross section of the SO1
n-MOSFET under investigation. The device is assumed
to have uniform channel doping concentration and abrupt
source/drain junctions. Electron and hole flows are illus-
trated in solid and dashed lines, respectively, where the
carrier flow directions are identified by the arrows. The
effect of voltage drop in the silicon substrate on the device
operation has been published elsewhere by the authors
1101 and will not be considered in this analysis. The ex-
planation and mathematical modeling of each of the car-
rier flows in steady state are described in the following.
584 IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. 40. NO. 3, MARCH 1993

v:, 0 vGf VD expressed as

P P P
FRONT GATE

where Cof = ~,,/tos is the front gate oxide capacitance

I I
with tof as the front gate oxide thickness, C,, = f , , / t s ,is
the silicon film capacitance with t,, as the silicon film
b thickness, Q,, = - qNAt,,is the depletion charge in sili-
'Gb
con film, Qof is the front surface fixed oxide charge den-
Fig. 1. Cross section of n-channel SO1 MOSFET, with electron flow shown
by solid lines and hole flow shown by dashed lines. sity, VGsis the front gate bias, is the work function
difference between front gate material and silicon film,
and * s b ( x ) is the back surface potential. It is well known
A . The Front-Channel Current t,, that !Psb (x) is not only a variable of the back-gate voltage
For a fully depleted SO1 MOSFET, when a front in- Vcb, but is also affected by the floating body effect. Cal-
version channel exists, it is generally assumed that the culations of Q,,f ( x ) and Ich corresponding to different back-
inversion camers are located close to the front surface and surface situations are detailed as the following.
the ionized acceptors are the only charges in the film; these I ) Operating Without Impact-Ionization-tnducedBack-
assumptions give us a quadratic potential distribution [ 1 I], Surface Potential Perturbation: Without considering the
which makes calculation simple. The derivation of front- impact ionization, \ k s b ( x ) is determined by the back-gate
channel current is essentially following the procedures voltage VGbonly [ 111. There are three distinguished back
outlined in [I21 with two modification: I ) The front in- surface conditions possible: 1) For a very low V G b , the
terface state charge is included and represented by 2+B C j f , back surface is in accumulation. Inserting q A h ( x )= 0 V
where 4B = VT In ( N A / n j )is the silicon body Fermi po- in (3), we have the front-channel electron charge for back
tential with V , = k T / q , N A is the doping concentration, surface in accumulation, represented as Q$(x). 2 ) In-
nj is the intrinsic carrier concentration, and C , = qNirf is creasing VGb, we have the back surface in depletion (or
the associated capacitance with Njrfas the front surface the film is fully depleted), !P,b(x) can be solved from
state density. 2) The channel current perturbation caused Poisson's equation with Gauss theorem across the back-
by threshold-voltage modulation, which is the result of gate oxide, and is expressed as
the increased back-surface potential due to the floating
body effect, is also accounted.
The electron current conducting in the front can be cal-
culated from [ 121
z
LB
26JB+vDS

ch
=-
L , pnf~ ~
IQ&> I d*&).
In ( l ) ,2 is the channel width. Le, is the effective channel
length defined as
(2)
where L is the nominal distance between source and drain,
VDSis the drain-to-source voltage, and VDSsaris the satu-
ration drain-to-source voltage. pnSis the effective electron
mobility in front channel. \kSf(x)is the front surface po-
tential at position x from source junction, can be set to
24B at x = 0 and 268 +
VDsat x = L,tf for strong inver-
sion operation. The electron charge at the front surface
can be solved from one-dimensional Poisson's equation
for silicon film and Gauss law for front gate oxide, and is
(1)
where Cob, Qob, and Cjrb are the back surface counterparts
for Cos, Qob, and Cip Inserting (4) into (3) results in the
corresponding electron quantity e{$(.). 3) Increasing VGh
further, eventually the back surface is in inversion. We
obtain Q$(x) by setting !Psb(x) = 248. These three con-
ditions are separated by two boundary back-gate voltages:
%(x> = - (Csi*sf(x) + Qoh + Qsi/2)/Cob and C%(x)
+
= V g ( x ) + 2+8 (Csi c o b + c j r b ) / C o hwhich
, are found
by setting * $ b ( x ) as 0 V and 248 in (4), respectively.
The channel currents are calculated by employing ap-
propriate Q&) according to various back-surface oper-
ation conditions. When VGb < V z i (Lef,), the device whole
back surface is in accumulation, substituting Q,, ( x ) with
Q $ ( x ) in (1) yields the channel current as
CHEN AND HUANG: FLOATING BODY EFFECTS IN FULLY DEPLETED SO1 MOSFET'S 585

where When V Z ( 0 ) < v G b , an inversion channel exists at the

(6)
is the threshold voltage for back surface in accumulation
in a one-dimensional SO1 MOS system.
When Vg:(L,,) < v G b < Vgt(O), the back surface near
the source region is in accumulation, whereas that near
the drain region is in depletion due to the drain bias volt-
back surface, which is not included in our analysis.
2) Operation with Impact-Ionization-Induced Back-
Surface Potentia6 Perturbation: When the impact ioniza-
tion is significant, the impact-ionization-generated hole
currents after recombination are enough to set up a V B E
across the source junction at the back surface overriding
\ k s b ( x ) built by the back-gate bias. The associated back-
gate bias is defined as
vE?(x) = v%(x) + (csi + cob + citb) vBE/cob.

age; the channel current, therefore, has to be calculated The associated front-channel electron charge becomes
in two pieces and (1) is rewritten as Q;Y(x), which is derived by inserting V,, in (3). There

[1
+.&I) are two different situations in channel current calculation
Z
Ich = - PLnf Q;:(x) d q s f ( x ) according to the operation conditions.
Leff 268 When VGb < VE?(Leff), VBEis higher than the back-
surface potential over the whole channel length, the whole
back-surface potential is shifted to VBE, and the front-
channel inversion carrier is replaced by Q$ ( x ) . The equa-
where x, is the position defining the boundary between tion for channel current is the same as (5) with Vs;"re-
two regions and its associated front-surface potential is placed by Vb,m = v$' - Csi vB,/cof, the one-dimensional
written as q s b ( x ) = 0 V in (4).Eventually, the front- threshold voltage when the back-surface potential is
channel current is expressed as pinned at VEL.
When V E t ( L e R )< VGb < V:T(O), the back-surface
potential is modulated only near the source end. The sit-
uation is similar to the back surface near the source end
in accumulation and near the drain end in depletion. The
expression for channel current is the same as (8) with
V$ replaced by Vb,m and V g l ( 0 ) replaced by V:: (0), re-
spectively.
Setting the differentiation of derived channel current
with respect to VDsto zero gives drain saturation voltage.
Inserting VDSsatinto the channel current equation gives the
drain saturation current. Note that our channel current
calculation is based on Gradual Channel Approximation,
When V g i ( 0 ) < v G b < Vgl(O),the whole back surface which is valid only for long-channel devices. Modifica-
is in depletion, and replacing Qnf(x) with Q$(x) in ( I ) tions have to be considered for small-dimension devices
yields the channel current as ~131.
Z
Ich = -
Le,
P n f cof [(vGf - v$> vDS B. The Diffusion Current Id@
In a conventional bulk MOS transistor the source-to-
drain diffusion current is dominant only when it is in
subthreshold operation. The subthreshold or diffusion
where current is usually calculated within a truncated finite depth
below the surface [ 141 because of the fast decreasing po-
tential distribution along the depth, which makes most
carriers located very close to the surface. However, in
thin-film SO1 device, the situation is quite different. When
the back-surface potential is lifted by the coupling of large
v G b or holes accumulated in the floating body, the poten-
tial distribution is no longer monotonously decreasing.
Then the amount of diffusion current may be comparable
to the channel current in strong inversion operation.
is the one-dimensional threshold voltage for back surface Moreover, the current is not confined to a finite depth be-
in depletion with neath the front surface, it spatially spreads across the film
thickness and the calculation becomes a two-dimensional
cbb = csi (cob + Citb)/(Csi + cob + Cjrb). problem.
586
Although the device is externally biased, due to the
confinement of the front- and back-gate oxide, the vertical
drift and diffusion current cancel each other, therefore
there is virtually no current flowing across the front and
back gates. We neglected vertical components in the
channel (drift) current calculation and simplify the diffu-
sion current calculation to one dimension parallel to the
channel. The same simplification is also adopted by the
MINIMOS-4 MOS transistor simulator. In MINIMOS-4
1D model, the Poisson's equation is calculated in two di-
mension whereas the continuity equation is solved in one
dimension, yet it provides results with sufficient accuracy
compared to those obtained from its 2D model, in which
both equations are calculated two-dimensionally [ 151.
Note that this simplification may cause significant devia-
tion if the spacing between the source and drain junction
is comparable to the film vertical dimension as in a deep-
submicrometer channel device.
Given the assumptions that the heavily doped source
surface is equipotential, the electron concentration at any
depth of y next to the source junction is represented as npo
exp ( \ k ( y ) q / k T )where npo = n ? / N , is the equilibrium
electron concentration in the silicon body and \ k ( y ) is
band bending at depth y next to the source. Near the drain
junction, the electron concentration becomes n,,,, exp
((\k ( y ) - V D s ) q / k T ) .With the effective channel length
smaller than the electron diffusion length, the correspond-
ing diffusion current density is then written as
Jdiff(y) = -
Leff
where D, is the electron diffusion coefficient. The total
diffusion current across the film is obtained through an
integration taken from the front surface to the back sur-
face. If VDs - *(y) >> V,, the total diffusion current
can then be expressed as
The integration is carried out by numerical summation in
our computing; \k(y), as mentioned before, assumes a
quadratic potential distribution, which makes the execu-
tion fairly easy.
C. fmpact Ionization Current in Drain Junction I,;
The electrons, represented by the sum of and ZdiR,
travel from the source through the film body experiencing
some loss via recombination, and approach the drain
junction. They are accelerated by the high field in the drain
depletion region causing impact ionization. The ioniza-
tion-generated electrons, with magnitude of I;;, enter the
drain region and contribute to the drain current, while the
holes of the same magnitude flowing into the body con-
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 40. NO. 3, MARCH 1993
tribute to the recombination with diffused electrons
and/or accumulated body charges. The ionization-gener-
ated carrier flow is modeled by I,, = (M - 1) ( I c h + Idiff
- Z,), where I, accounts for the recombination current in
the body and will be described later and
is the impact ionization coefficient [16]. a and /3 are pro-
cess-dependent fitting parameters. When VDs is smaller
than VDSsat, no impact ionization current is assumed.
D. The Recombination Current in Body Ir, the Source
Hole Current Ihs, and the Modulation of Body Potenrial
When the impact-ionization-generated holes enter the
body, following the field built by drain-to-source bias,
some of them are recombined with electrons, the rest ar-
rive at the source region and are neutralized by the ma-
jority carriers in the source. The situation, as mentioned
before, is similar to an n-MOSFET connected with a par-
asitic lateral n-p-n bipolar junction transistor, whose base
terminal is connected to a current source with magnitude
I,;. In a BJT, the base recombination current can be rep-
resented as [ 171
in MOSFET model terms, where W, is the base width, IE
is the emitter electron current, and r, is the electron re-
combination lifetime. LeRis the effective channel length
and Idiffis the diffusion component of the electron current.
We do not consider Ichin I , calculation because of its
proximity to the front surface.
When the impact-ionization-generated hole current is
smaller than the calculated recombination current, I , is
forced to be the same as I;, since the recombination is lim-
ited by the supply of holes in the body. The overall drain
current is Ich + IdiR (the loss of electron due to recombi-
nation is compensated for by the impact ionization elec-
tron current collected at the drain). For Zji > I,, the excess
hole current after recombination Zhs = Iii - I, reaches the
source region. This hole current is associated with the
base-to-emitter junction voltage VBE (or the body-to-
source junction voltage) such that
t 15)
where No is the donor concentration in the source region,
Lp is the hole diffusion length, Dp is the hole diffusion
coefficient, and A is the cross-section area through which
f h s passes. For a thin-film MOSFET, Ihs tends to flow near
the back oxide interface where a potential minimum ex-
ists, instead of uniformly spreading across the whole
junction. It is assumed that A = Z x d , where d is the
effective depth of the current path measured from the back-
oxide interface, and is defined as the depth within which
 -

CHEN AND HUANG: FLOATING BODY EFFECTS IN FULLY DEPLETED SO1 MOSFET'S 587

0start
calculate
1 St: Ichand ldlff
2nd: I,, . I, and )hs
3rd: d and VBE

.calculate

2nd: I,,, I, and

I ACC. I DEP. I INV.
I
3rd: d and VBE

I.end
Cdculate ltot
orientation, a resistivity of 8-15 s1 cm, and 300 nm of
buried oxide. In order to fabricate devices that can be op-
Fig. 2. Flowchart for simulation procedures
erated in a fully depleted mode, film thinning by oxidation
and HF etching were performed until the desired thick-
ness was obtained. Standard MOSFET processes, such as
the potential has increased by V , [ 141. The effective cur-
gate oxide growth, channel implant, polysilicon deposi-
rent conduction path d can be easily calculated from the
tion, doping, and patterning were then followed. A self-
quadratic potential distribution. Due to the concave shape
aligned LDD structure was formed by source/drain dou-
of potential distribution, it is noticed that if we change the
ble implantations. Contact etching, metallization, and
definition of d to the depth corresponding to an increased
packaging were performed to complete the fabrication
potential of 1/2VT or 2VT, the difference in d is small and
procedure. The transistor has a width/length ratio of 60
the simulated I- V characteristics are hardly distinguish- p m / 5 pm. A similar transistor with a body contact was
able. Therefore, the arbitrarily assumed d seems to have fabricated in the same batch as well for impact ionization
little effect on our results. Note that as V,, increases, the
coefficient measurement.
floating body effect becomes larger, and d increases ac- The process simulator SUPREM 111 was used to cal-
cordingly until the hole current conducting path takes the culate the fabricated device structural and physical param-
whole film thickness tSi. eters, the acceptor concentration in silicon film is esti-
If the calculated VBEis smaller than \ksh(x = 0) given mated around 2 X 10l6 ~ m - the ~ , lightly doped source
in Section 11-A1, the impact-ionization-generated hole
and drain regions have a concentration of 4 X 10" ~ m - ~ ,
current is not sufficient to override the back-surface po-
the front gate oxide thickness is 40 nm, and the silicon
tential built by VGb. No floating body effect is observed
film thickness is 100 nm.
and the corresponding drain current is given by ID = IC,,
All the electrical measurements were done through a
+ Idiff - 1, + 1;; where Ich is the dominant component.
computerized HP 4140B PA-meter system. Fig. 3 shows
However, if VBE > \ k s b ( X = O), the floating body is
the front-gate threshold voltage Vff,which was extrapo-
charged up by holes and its back-surface potential is lifted
lated from the drain current-gate voltage transfer curve,
to VBEwhich, in turn, modulates the channel current and
versus back-gate bias VGh. According to the model pro-
increases the parasitic lateral bipolar transistor diffusion
posed by Lim [ 111, the back-surface condition is distin-
current. Following the changes of I,,, and Idiff, a new set
guished as in accumulation for VGb C - 18 V, in deple-
of Zji,I,, and VBEis induced. In our calculations, an iter-
tion for - 18 V < VGh < 0 V, and in inversion for VGb
ation was carried out until a consistent set of values was
obtained. Then the drain current was again calculated as
> ov.
Impact ionization coefficients were extracted from the
ID = Ich+ Idiff - I, + 1;;.A flowchart depicting the iter-
substrate current versus VDsmeasurement at VGf = 1 V
ation procedure is shown in Fig. 2.
on the transistor that has body contact. The extracted val-
ues are CY = 2.3 and /3 = 33.7, which result in a slightly
111. DEVICEFABRICATION AND PARAMETERS
higher multiplication rate than that reported in [ 181 within
EXTRACTION the V,, range of interest. We believe the body contact
Before starting the simulation work, some of the model series resistance in our sample increases the body poten-
parameters need to be extracted from fabricated devices. tial, which in turn enlarges I ; ; , during the measurement.
SIMOX wafers which were used, supplied by IBIS Tech- The effective electron mobility was obtained from trans-
nology Corporation, have 200-nm film thickness, ( 100) conductance measured at Vcr = 1 V, the measured mo-
588 IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL. 40. NO. 3, MARCH 1993

bilities are pnf = 328 cm2/V + s for VGh = -10 v and

298 cm2/V s for VGh = - 20 V, respectively. It appears
that mobility degradation due to the back-gate effect is not
significant. The diffusion coefficient was derived from the
Einstein relation D, / p n = k T / q . The front-gate interface
traps and fixed oxide charges were extracted from the
-a
E
measured threshold voltage V,f for the device back surface I
1
biased in accumulation, the back-surface fixed oxide
-n
charge was obtained from its corresponding VGh as shown
in Fig. 3, and the back-gate interface trap was derived
from the slope where the back surface was in depletion
(N;, = 10" cm-2/eV, Njrh= 9 x 10" cm-2/eV, Q,, =
2.5 X 10" cmP2, and QOh = 9 x 10" cm-*). The recom-
bination lifetime of electrons in the body is taken to be
100 ns [7].

IV. RESULTSAND DISCUSSION

The experimental and computed results of MOSFET
current-voltage characteristics are shown in Fig. 4,where
the solid lines are results calculated from this model and
the dashed lines are measured characteristics. Fig. 4(a) h

has VGh = - 10 V corresponding to a depleted back sur-

a
E
face, whereas Fig. 4(b) has v@,= -20 V representing
v

the back surface in accumulation. It appears that no cur-

-6Y

rent kink is observed when the back surface is depleted,

it only occurs when the back surface is biased into accu-
mulation. Our model successfully demonstrates the pre-
diction of the occurrence and its magnitude of the current
kink of floating body SO1 devices. The occurrence of
breakdown due to BJT conduction is also simulated, how-
ever, the agreement is not quite satisfactory in some cases.
In order to have further understanding of the depen-
dence of the floating body effect on various physical pa-
rameters, more simulations were performed. This inves-
tigation could provide valuable information to optimize
the device and process designs for minimizing or elimi-
nating the troublesome floating body effect in SO1 de-
vices. Extra channel currents due to threshold-voltage
modulation are shown in Fig. 5(a), and extra currents due
to parasitic BJT are shown in Fig. 5(b). One of the de-
vices (labeled by a diamond) is used as a reference, each
of the others have one parameter varied as denoted. It is
clearly shown that a current kink obviously occurs when
the film doping concentration NA increases, or the film
thickness rsi is increased. The parasitic bipolar tum-on ap-
pears at a lower drain voltage for a higher source doping
concentration No. The threshold voltage modulation ap-
pears when the drain voltage is larger than 3 V, whereas
the parasitic BJT effects only show up when the drain
voltage is more than 5 V. Obviously, the current kink
shown in the MOSFET characteristics comes from the
threshold-voltage modulation. However, the large cur-
rents observed at the higher drain voltage are due to the
conduction of the parasitic BJT.
It is well known that the SO1 floating substrate will ac-
cumulate the impact ionization generated carriers, and the
accumulated carriers will raise the body potential, but the
0 2 4 6 8 10
vDS (v
(b)
Fig. 4. Measured (dashed lines) and simulated (solid lines) drain-to-source
current-voltage characteristics (a) for back-gate bias of - 10 V and (b) for
back-gate bias of - 20 V .
relationship between the amount of the increased body
potential and the device operation condition, or its phys-
ical parameters are seldom discussed. We attempt to in-
vestigate these relationships further by plotting the back-
surface potential at the source end as a function of drain
voltage, as shown in Fig. 6. As expected, the rise of back-
surface potential coincides with the occurrence of current
kink. It is important to note that the amount of extra cur-
rent is not determined by the absolute value of the back
surface potential. It really depends on the amount of po-
tential being raised. As can be seen from Fig. 6, devices
with lower back-surface potential at small drain voltage
(no impact ionization) produce a larger current kink. The
threshold voltage is reduced by - A \ k , b -
Csi/Cof, where
is the change of the back-surface potential. There-
fore, to eliminate the current kink, the design goal is to
design a device with a back-surface potential as high as
possible within the limit of tolerance of the leakage cur-
rent. This translates to the physical parameters as lower
film doping concentration and thinner film thickness.
Higher doping concentration reduces bipolar conduction,
CHEN AND HUANG: FLOATING BODY EFFECTS IN FULLY DEPLETED SO1 MOSFET’S 589

however, it increases the threshold-voltage modulation.

As already mentioned, the current kink mainly originates
from threshold modulation, therefore in a practical device
design we should lower the film doping concentration to
realize fully depleted device for superior performance.
The discrepancy of the parasitic BJT conduction be-

a 0’3 1 tween simulation and experimental results is attributed to

the assumption that the minority -carrier recombination
lifetime is constant and also to the unaccounted for pos-
sible leakage. In a SIMOX SO1 device, it is expected that
many dislocations and interface states exist at or near the
back surface, so the recombination lifetime is not constant
over the whole film and also affected by the operation bias
conditions. The bandgap-narrowing effect and Auger ef-
fect introduced by the heavy doping in the source region
may reduce VBEby increasing the hole concentration and
reducing the hole lifetime in the source region. Simula-
tion results with lower breakdown voltages may be antic-
00000 N A =2 ~ 1 0cm ’
’ ~ ts, = 100 ipated [ 191. Since ZdlR due to body charging is not near the
0.5 5 , = 100 ns, N 4x10” c
VG, - v, = 2 v, VGb = -15 v surface, the charge density in the film cannot be approx-
00000T “ ---> 10 1 ;
WOWND--->10 imated by a constant and the potential distribution is no
0.4 kw,.&n NI ---z 6x10 ‘ 6:mJ
cu;uzw t,, ---z 150 nm
longer quadratic if the electrons injected from the source
region into the body are comparable with the film doping
0.3
N A . However, our calculation shows that the electron in-
jection is quite small compared to the NA until the poten-
0.2
tial across the source junction is about 0.74 V, which cor-
0.1
=
responds to VDs 6 V. Therefore, the quadratic potential
assumption causes errors only when VDsis high.
0.0
0 2 4 6 8 10 V. CONCLUSION
VDS (v A new model for describing the current-voltage char-
(b) acteristics of thin-film SO1 MOSFET operated under
Fig. 5 . Simulated extra current components from the floating body effect strong inversion is developed. The floating body effect
as a function of drain-to-source voltage. (a) Channel component due to has been carefully investigated and included in the model.
front-gate threshold voltage modulation. (b) Diffusion component due to
parasitic bipolar transistor turn-on. The diamond curve represents the ref-
The model successfully simulates the abnormal excess
erence device with N A = 2 X 10” c m - ’ , N , = 4 X 10” c m - ’ , t,,, = 40 drain current of our n-MOSFET SO1 devices. Current
nm, t,,, = 300 nm, t,, = 100 nm, t = 100 ns. VG, - V , , = 2 V , and VGh kinks observed in floating body SO1 MOSFET’s are at-
= - 15 V . each o f the other curves has one parameter varied as indicated.
tributed to threshold-voltage modulation due to a raised
body potential. The early breakdown is a result of a par-
asitic BJT turned on by a further raised body potential.
The current kink can be suppressed in fully depleted de-
vices fabricated in ultra-thin-film (tsl < tdmax)SOI. The
W+W N , = ~ x ~ o ’ ~ c ~ ” , ~ , , = I o o ~ ~ .
2 , = 100 ns, N = 4 ~ 1 0 cm ’~ parasitic bipolar transistor effect can be reduced with
Val - V, = 2 V. VGb = -15 V lightly doped source (LDS) which automatically exists in
00000 ‘1. ---> 10 ns
N; ---> I o 2o gn -3
h
l.o - wwo
b p p a a N A - - - > 6 x 1 O cmd
LDD processing.
>
Y
- pa-Dw t,, --->150 nm

’
h
0 ACKNOWLEDGMENT
X
v
The authors wish to thank IBIS Technology Corpora-
0.5 : tion for providing the SIMOX wafers, Dr. M. Gross of
plasma laboratory UNSW for his assistance in device fab-
rication, and the staff of I. C. Laboratory UNSW for their

0.0 0 i 2

vDS (
6

)
8 10
general help.

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Heng-Tien Henry Chen (S’91) was born in
Taipei, Taiwan. ROC, on September 22, 1962.
He received the B.Eng and M Eng degrees from
the Department of Electrical Engineering. Na-
tional Tsing-Hua University. Hsinchu, Taiwan,
ROC in 1984 and 1986. respectively
He worked at Princeton Technology Corpora-
tion, Taipei, Taiwan, ROC, as an IC design en-
gineer from 1988 to 1989. In 1989, he began study
toward the Ph.D. degree in the Department of
Electronics, School of Electncal Engineering,
University of New South Wales, Sydney, Australia. His current research
interests are ultrathin SO1 MOSFET’s and MOS integrated circuit design.
Ruey-Shing Huang (S’74-M’78-SM’91) re-
ceived the B. Eng. degree from the National
Cheng Kung University, Tainan, Taiwan, the
M.S. degree from the National Chiao Tung Uni-
versity, Hsinchu, Taiwan in 1969 and 1971, re-
spectively, and the Ph.D. degree from the Uni-
versity of New South Wales, Sydney, Australia in
1978.
He joined the Department of Electrical Engi-
neering, Cornell University, Ithaca, NY, in 1978
as a post-doctoral research associate, where he was
involved in the development of MESFET/SOS for high-frequency appli-
cations. From 1979 to 1986 he was a Professor with the Department of
Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan.
His research work was in the area of MOS integrated circuit technology
and solid-state sensors. During 1983-1984, he spent his study leave at the
University of New Mexico, Albuquerque, engaged in CVD nitride studies
for MNOS radiation-hard devices. Since 1986 he has been at the School of
Electrical Engineering and Computer Science, University of New South
Wales, Sydney, Australia. His current interests are MOS integrated circuit
design. SO1 technology, and solid-state microsensors.