Lecture Schedule (Total 31 lectures and 14 Tutorials are required) Module 1 References: 1) Zainalabedin Navabi, VHDL: Analysis and modeling of digital systems (For all lectures and tutorials) 2)Wakerly J. F, Digital Design – Principles and Practices (For reading) Lecture 1: Introduction to digital system design Lecture 2: Digital system design process: Design automation, Hardware Descriptive Languages Tutorial 1: Basics of EDA and HDL Lecture 3: Hardware simulation Hardware synthesis Levels of abstraction Lecture 4: Design methodology based on VHDL: Elements of VHDL- descending components, packages, libraries and binding Top down design: Verification Tutorial 2: Simulation, synthesis, VHDL elements, components and packages Lecture 5: Top down design with VHDL: Design to perform, setting the stage, design scenario, final act and real world. Lecture 6: Subprograms Controller description VHDL operators Conventions and syntax Tutorial 3: Top down design approach with VHDL, VHDL subprograms, VHDL Lecture 7: Basic concepts in VHDL: Characterizing Hardware Languages- Timing, concurrency, modeling hardware. Objects and classes Lecture 8: Signal assignments: Inertial delay mechanism, transport delay mechanism, comparing inertial and transport. Tutorial 4: Timing, concurrency and modeling hardware, Object and classes, Signal assignments Lecture 9: Concurrent and sequential assignments- Concurrent assignments, events and transactions, delta delay. Lecture 10: Sequential placement of transaction. Tutorial 5: Concurrent and sequential assignments Module 2 References: 1. Zainalabedin Navabi, VHDL: Analysis and modeling of digital systems (Lectures 1,2,3,6,7,8 and all tutorials) 2. Perry D. L, VHDL Programming by Example.(Lectures 4,5 6, 9, 10 , 11 and all tutorials) 3. Roth C. H., Digital System Design Using VHDL (Lectures 7 and tutorials 3, 4 and 5) 4. Mano M. M. and Ciletti M. D, Digital Design (Lectures 7 and tutorials 3, 4, and 5) 5. Brown S. and Vranesic Z., Fundamentals of Digital Logic with VHDL Design. (All tutorials and reading) 6. Pedroni V. A., Circuit design with VHDL. (All tutorials and reading) 7. Peter J. Ashenden, The Designer's Guide to VHDL (All tutorials and reading) 8. Sudhakar Yalamanchili VHDL Starter's Guide(All tutorials and reading) 9. Thomas L. Floyd Digital Fundamentals with VHDL(All tutorials and reading) 10. Frank Vahid, VHDL For Digital Design(All tutorials and reading) 11. J.Bhasker, VHDL Primer(All tutorials and reading) Lecture 1: Utilities for high level description: Type declaration and usage- Enumeration type for multi value logic, Array declaration Lecture 2: VHDL operators Subprogram parameter types and overloading Tutorial 1: Array, Operators, parameter types and overloading Lecture 3: Predefined attributes – Array attributes, Type attributes, Signal attributes, Entity attributes Lecture 4: Sequential processing - Process statement, Signal assignment versus variable assignment Tutorial 2: Attributes and sequential processing Lecture 5: Sequential statements – IF, CASE, LOOP, EXIT, ASSERT, WAIT statements Lecture 6: Concurrent assignment problem, Passive process Structural specification of Hardware: Parts library- Inverter model, NAND gate model, Logic design of comparator, VHDL description of comparator Tutorial 3: Sequential statements Lecture 7: Modeling Flip Flops using VHDL processes VHDL models for a multiplexer Modeling a test bench- VHDL description of a simple test bench, Simulation Lecture 8: Logic design of Latch, Flip Flop VHDL model for counter and register Tutorial 4: VHDL model: NAND gate, Comparator, Flip Flop, Multiplexer, Counter and Register Lecture 9: Subprograms and packages- Subprograms, Conversion functions, Resolution functions Lecture 10: Procedures Packages- Package declaration, deferred constants, Subprogram declaration, Package body Tutorial 5: Subprograms, Procedures and packages Lecture 11: Aliases Qualified expressions User defined attributes Generate statements Text I/O Module 3 References: 1. Zainalabedin Navabi, VHDL: Analysis and modeling of digital systems (Lectures 1,3,4 and all tutorials) 2. Perry D. L, VHDL Programming by Example.(Lectures 5, 6, 7, 8 and all tutorials) 3. Roth C. H., Digital System Design Using VHDL (Lectures 1, 2, 3, 4, 9, 10 and all tutorials) 4. Mano M. M. and Ciletti M. D Digital Design (all tutorials and reading) 5. Brown S. and Vranesic Z., Fundamentals of Digital Logic with VHDL Design. (All tutorials and reading) 6. Pedroni V. A., Circuit design with VHDL. (All tutorials and reading) 7. Peter J. Ashenden, The Designer's Guide to VHDL (All tutorials and reading) 8. Sudhakar Yalamanchili VHDL Starter's Guide(All tutorials and reading) 9.Thomas L. Floyd Digital Fundamentals with VHDL(All tutorials and reading) 10. Frank Vahid, VHDL For Digital Design(All tutorials and reading) 11. J.Bhasker, VHDL Primer(All tutorials and reading) Lecture 1: Data flow description in VHDL - Multiplexing and data selection Design of a serial adder with accumulator Design of binary multiplier using VHDL Lecture 2: Multiplication of signed binary numbers Design of binary dividers Tutorial 1: VHDL model of serial adder, multiplier, dividers etc. Lecture 3: State machine description - A sequence detector, Allowing multiple active states, Outputs of Mealy and Moore machine, Generic state machine. A general dataflow circuit Lecture 4: Derivation and realization of SM charts Linked State Machines Tutorial 2: State machines Lecture 5: Design configuration - Default configuration, Component configuration. Lecture 6: Mapping library entities Generics in configuration Generic value specification in architecture Tutorial 3: Configurations Lecture 7: Synthesis - RTL description, Constraints, Attributes, Technology libraries Lecture 8: Translation, Optimization, Flattering, Factoring, Mapping to gates Tutorial 4: Synthesis Lecture 9: Designing with FPGA and CPLD - XILINX 4000 Series FPGA Lecture 10: Altera Flex 10k Series CPLD