1
Minimizing the Impact of Distributed
Generation on Distribution Protection System
by Solid State Fault Current Limiter
S. A. A. Shahriari, Student Member, IEEE, M. Abapour, Student Member, IEEE, A. Yazdian, Member,
IEEE, M. R. Haghifam, Senior Member, IEEE.
Abstract-- Connection of new distributed generation (DG) to
the existing distribution network increases the fault current and
disturbs the existing distribution protection system. In this paper
a solid state fault current limiter (SSFCL) application is
proposed to minimize the effect of the DG on the distribution
protection system in a radial system during a fault. The
protection problems at distributed generation presence are
studied in detail to determine the effectiveness of the SSFCL for
the proposed application. The effectiveness of propose SSFCL in
protection problems mitigation is determined and examined in
the test system. Simulation is accomplished in PSCAD/EMTDC.
The proposed method is fully validated on test system
Index Terms— Solid state fault current limiter, distributed
generation, distribution protection system.
I. INTRODUCTION
N Owadays electric utilities try to search new technologies
to improve power quality and reliability of their
customers. Then distributed generations are becoming
attractive to many utilities. Moreover, these technology
produce electrical energy with less environmental impacts,
their installation are easy, and are highly efficient. Previous
studies have shown that distributed generation causes several
challenges to the protection of distribution system [1-3]. The
main disadvantage of DG is producing fault current that are
more than breaking capacity of circuit breakers and fuses.
Furthermore, the fault current produced by DG are causing
problems in protection coordination, false tripping of feeders
and relay mal operation.
Several ideas have been introduced as possible solutions
[4], [5]. These papers propose switchgears and protection
coordination upgrade in systems consist of DG. Although
these solutions may technically operate, they are complicated
Sayyed Ali Akbar Shahriari is the Professor with Firoozabad Applied and
Science University, Iran.
(E-mail: shahriari_sajad@yahoo.com).
Mehdi Abapour is the Ph.D student with Department of Electrical
Engineering, Tarbiat Modares University, Iran.
(E-mail: mehdi.abapour@gmail.com).
Ali Yazdian is the professor with Department of Electrical Engineering,
Tarbiat Modares University, Iran.
(E-mail: yazdian@modares.ac.ir).
Mahmoud Reaza Haghifam is the professor with Department of Electrical
Engineering, Tarbiat Modares University, Iran.
(E-mail: haghifam@modares.ac.ir).
978-1-4244-6547-7/10/$26.00 © 2010 IEEE
and expensive. So, these solutions are not practical for
existing distribution systems.
A novel idea exists to limit the fault currents produced by
DG and prevent switchgears upgrade is FCLs application [6].
The implementation of FCLs in electric power systems is not
restricted to suppress the amplitudes of the short circuits; they
are also applied in variety of performances such as the power
system transient stability enhancement, power quality
improvement, reliability improvement, increasing transfer
capacity of system equipments and inrush current limitation in
transformers [7-12].
Different configurations of fault current limiters are
proposed to mitigate the impact of DG on distribution
protection system [6], [13]. In this paper a solid state FCL is
used to minimize the impact of DG on fault current levels and
distribution protection system. The proposed FCL has simple
structure and control and its loss is low. More over, the
operation of this type of FCL is fast. As fault happens, the
FCL will enter the fault line automatically to limit the short
circuit current.
In this paper, a DG with appropriate rating is connected to
the different places of distribution network and recalculates
the fault current in each section after modeling the distribution
network in PSCAD/EMTDC. The impact of DG on
distribution protection system is studied comprehensively.
Then the proposed SSFCL is connected in series with DG
where the effect of SSFCL on limiting fault current is
investigated through computer simulations. The results
indicate the effectiveness of proposed SSFCL by minimizing
the problems associated with the existing DG in distribution
system.
II. CHARACTERISTICS OF PROTECTION DEVICES
Before discussing about the problems and the solutions,
some basic characteristics of conventional protection devices
should be addressed [14], [15]. Circuit breakers and reclosers
are normally equipped with inverse-time over current trip
devices. Eq. (1) defines pick up time of an inverse-time over
current curve.
A
t(I ) = ( P + B) (1)
M −1
I input
M = (2)
I pickup

Where t(I) and Ipickup stand for the trip time and the relay
current set point respectively. A, B and P are constants to
provide selected curve characteristics. The constants in table I
define the shape of the standard moderately inverse, very
inverse, and extremely inverse trip characteristics if they are
applied to Eq. (1). [14]
TABLE I
CONSTANTS FOR STANDARD CHARACTERISTICS
Characteristic A B P
Moderately inverse 0.0515 0.1140 0.02000
Very inverse 19.61 0.491 2.0000
Extremely inverse 28.2 0.1217 2.0000
Considering the fuse interrupting characteristic, they have
two inverse-times over current characteristic named Minimum
Melting (MM) and Total Clearing (TC). Fuse element melts
when the level of fault current passing through fuse exceeds
interrupting characteristics. After fuse melts, there will always
be some period of arcing before the current is interrupted. The
melting time is added to this arcing period to obtain the total-
clearing time.
III. EFFECTS OF DISTRIBUTED GENERATION ON THE
PROTECTION OF DISTRIBUTION SYSTEM
Previous studies have shown that distributed generation
causes several problems to the protection of distribution
networks. The most commonly mentioned are as follows:
A. False tripping of feeders
When a fault occurs at another feeder, the operating device
located in that faulted feeder should operate. Nevertheless, the
circuit breaker or fuse at the feeder of the DG may operate and
cause unreasonable electricity interruption. The basic principle
of false tripping is shown in Fig. 1. The short-circuit fault
occurs on feeder1. Fuse1 must operate to remove fault from
network, but also CB2 is tripped because of overcurrent fed
by the DG unit [2], [16].
Fig.1. Typical radial distribution feeder in presence of DG with available
three-phase fault current shown
B. Exceeding the interruption capacity of circuit breaker
The basic principle of exceeding the interruption capacity
of circuit breaker is shown in Fig. 2. The short-circuit fault
occurs in point F. When DG connects to bus 2 the fault
current through circuit breaker 2 (IF) will be increase. Due to
the increasing fault current levels, the interruption capacity of
switching equipment should be changed for new operation
point. Therefore, the replacement of circuit breakers or fuses
is necessary. What's more, the analysis of the short circuit
level is essential for specifying these circuit breakers or fuses
[1]. The following equations describe this problem.
Without the DG connection (IDG = 0)
IF = IS = ICB2 (3)
With the DG connection
2
IF = IS + IDG (4)
and
ICB2 = IF (5)
However,
ICB2 ≥ IS (6)
Fig.2. Typical radial distribution feeder in presence of DG with available
three-phase fault current shown
C. Relay mal operation
For correct operation of relay it is also important that the
relay measures the real fault current. Fig. 3 shows a
distribution feeder with a distributed generator supplying part
of the local loads. Assuming a short circuit at point F, the
generator will also contribute to the total fault current and we
have the following equation.
IF = IS + IDG (7)
But the relay R1 will only measure the current coming from
the network. So, the relay detects only a part of the real fault
current and may not operate properly.
Fig.3. Typical radial distribution feeder in presence of DG with available
three-phase fault current shown
D. Miss coordination of protection devices
The fault contribution from a DG can significantly alter the
short circuit levels and cause fuse-recloser (relay) or relay-
relay or fuse-fuse miss coordination.
D-1) Relay-relay miss coordination
Fig. 4 shows a main distribution feeder fed through
substation and protected by inverse overcurrent relays R1, R2
and R3. The coordination between R2 and R3 is shown in
Fig.5. In order to coordinate R2 and R3 for maximum fault
current in point F, time of operation of relay R2 is larger than
time of operation of R3 at least by a time interval called
Coordination Time Interval (CTI). Now DG is connected to
the feeder as shown in Fig. 4. When DG is connected, the
fault current increases. Thus, the coordination between two
relays is likely to face a problem because the time interval
between two relays operation is less than CTI [3].
Fig.4. Typical radial distribution feeder in presence of DG with available
three-phase fault current shown
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Fig. 9 fuse may operate before recloser and every temporary

fault change to permanent interruption [3], [16].

Fig.5. Relay operating curves for coordinating between two relays Fig.8. Typical radial distribution feeder in presence of DG with available
three-phase fault current shown
D-2) Fuse-Fuse miss Coordination
For coordination between two fuses shown in Fig. 6, for
any fault on feeder2, fuse2 should operate before fuse1 is
melted and damaged. This requires that TC curve of fuse2 is
below the MM characteristics of fuse1. As shown in Fig. 7 the
fuses are coordinated for all fault currents levels below IFmax.
After installing DG, it is possible that the fault current level
exceeds IFmax and the coordination between two fuses is lost
[3].

Fig.9. Minimum melting curve and total clearing curve of fuse and recloser
slow curve and fast curve for coordinating between recloser and fuse

IV. PROPOSED FAULT CURRENT LIMITER AND ITS DESIGN

Fig.6. Typical radial distribution feeder in presence of DG with available
three-phase fault current shown
Fig.7. Minimum melting curve and total clearing curve of fuses for
coordinating between two fuse
CONSIDERATION
In this paper, solid state FCL [17] is used and its effect on
fault current is analyzed. The most beneficial property of this
configuration is simplicity of structure and control, low stead-
state impedance, fast response and high impedance fault.
Fig.10 shows a general configuration of the solid-state
current limiter. It consists of a fast solid-state switch, current
limiting impedance, voltage limiting element and series
mechanical switch. The GTO thyristors are used as the fast
solid-state switch and the current limiting impedance is
connected in parallel with these. The GTO thyristors are used
to interrupt a current instantly upon receiving a turn-off signal
and the current limiter impedance is used as way for passing
the fault current when the solid state switch interrupt a fault
current. But a sudden interruption of current is likely to cause
an overvoltage in the circuit, so the voltage limiting element is
used to prevent this [17].

D-2) Fuse-recloser miss coordination

For coordination between reclosers and fuse, the recloser
must protect the fuse from temporary faults and fuse must
operate for permanent faults. This requires that the recloser
fast curve is below than the MM curve of the fuse
As shown in Fig. 8, when DG is located at the end of feeder
and a fault occurs at feeder2, the fault current flowing through
the recloser is different from the fault current passing through Fig.10. basic configuration of solid state FCL
the fuse. Then, the fault current seen by fuse is likely to be The overcurrent detector and control device detect a fault
higher than the fault current seen by recloser. As shown in and produce turn-off and turn-on signals for the GTO
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thyristor. Fig. 11 shows the control block diagram of this TABLE III
DISTRIBUTED GENERATOR PARAMETERS
FCL.
Parameter Value
Rated Active power / MW 2.6
Rated Reactive power / MVAR 3.1
Rated Voltage / kV 20
Resistance (Ra) / pu 0.01
Synchronous Reactance ( Xd )/ pu 2.2
Transient Reactance ( X’d )/ pu 0.22
Fig.11. schematic diagram of solid state FCL control Sub transient Reactance ( X’’d )/ pu 0.14
In steady state condition, the GTOs are gated continuously. For studying the impact of DG on protection system DG is
When a fault occurs a fault current must be detected rapidly. modeled in different positions for different fault positions.
This is done by comparing the instantaneous current level The solid state FCL is installed in series with DG for
with a predetermined value. After detecting fault occurred, the minimizing the impact of DG on protection problem. These
turn-off signal is given to the GTO. In this method, it is investigations are carried out as follows;
important to discriminate fault current from an in-rush current.
This problem was solved by choosing a suitable detection A. Study the false tripping
level. The current limiter must continue to limit the current Fig.13 (a) shows the fault current without presence of DG
during fault and returns it to the normal condition when a fault occurs at position 3 (F3). As shown in fig.12 in
automatically after the fault is cleared. Therefore, current the next step a DG is added to system in position 1 (P1). The
magnitude has to be monitored all the time. When detector fault current produced by DG passes through fuse11 (fig. 13
recognizes the current magnitude small for some period, (b)) and fuse11 may operate and cause unreasonable
clearance is assumed and turn-on signals are given to the electricity interruption on this healthy branch feeder. Then the
GTO. Therefore, in steady state operation only switching loss FCL is connected between DG and bus10. Fig. 13(c) shows
appears which is very smaller than other losses in the network. the current flowing through Fuse11. As shown in this Figure
the FCL decreases the fault current level passing through
V. SIMULATION RESULTS fuse11 and the possibility of false tripping is minimized.
Fig. 12 shows a typical radial distribution feeder with
multiple loads. This circuit is a simple model for calculating
the fault current and studying protection problems during the
fault in a simple and clear way. PSCAD/EMTDC software
package is used to simulate the proposed system. DG is
modeled by a synchronous machine. The simulation
parameters are chosen as follow,

Fig.13 (a). Fault current without presence of DG

Fig.12. Radial test system with DG and local loads

Fig.13 (b). Fault current in presence of DG

TABLE II
DISTRIBUTION SYSTEM PARAMETERS
From To R(ohm) X(ohm) P(KW) Q(KVAR)
1 2 0.1233 0.4084 1840 460
2 3 0.014 0.5969 980 340
3 4 0.7463 1.1938 1790 446
4 5 0.6984 0.5969 1598 1840
5 6 1.9831 1.4137 1610 600
6 7 0.905 0.7886 780 110
7 8 2.0552 1.1624 1150 60
8 9 2.45 1.5708 980 130
9 10 3.0434 1.885 1640 200 Fig.13 (c). Fault current in presence of DG and FCL
 5

B. Study the exceeding the interruption capacity of circuit

breaker
Fig.14 (a) shows the fault current without presence of DG
when a fault occurs at position 2 (F2). Fig.14 (b) shows the
fault current after installing DG at position 4 (P4). As
indicated in this figure the level of fault current is increased
by produced fault current by DG and this fault current is likely
to be higher than exceeding the interruption capacity of circuit
breaker. Then a FCL is installed between DG and bus5. Fig.
Fig.15 (a). Total fault current in presence of DG
14(c) shows the current flowing through circuit breaker. As
shown in this Figure the FCL decreases the fault current
produced by DG and fault current passing through circuit
breaker. Therefore, the possibility of exceeding the
interruption capacity is minimized.

Fig.15 (b). Fault current seen by recloser in presence of DG

Fig.14 (a). Fault current without presence of DG

Fig.15 (c). Total fault current in presence of DG and FCL

Fig.14 (b). Fault current in presence of DG

Fig.15 (d). Fault current seen by recloser in presence of DG and FCL

D. Study the miss coordination of protection devices

Fig.14 (c). Fault current in presence of DG and FCL
C. Study the relay mal operation
As shown in Fig.12 when a fault occurs at position 4 (F4),
the total fault current flows the recloser. But after installing
DG at position 3 (P3), the fault current produced by DG
doesn't pass through recloser. Thus the recloser doesn't see
total fault current and it may not operate or operate not
properly. Fig.15 (a) and fig.15 (b) shows the total fault current
and the fault current flowing through recloser consequently.
After installing FCL between DG and bus7 the fault current
produced by DG decreases and the possibility of relay
operating error is minimized. Fig.15 (c) and Fig.15 (d) shows
the total fault current and the fault current flowing through
recloser consequently when FCL is installed.
The fault contribution from a DG can significantly alter the
short circuit levels. The fuse-fuse and fuse-recloser miss
coordination that is very usual in distribution system is
simulated in this section.
D-1.Fuse-fuse miss coordination
Fuse10 and fuse11 are coordinated based on total clearing
curve and minimum melting curves of these fuses. In this
simulation a DG is installed at position 1 (P1) and a fault
occurs at position 1 (F1). As shown in Fig.16 (a) and fig.17
the fault current passing through fuse10 is higher than
maximum current for coordination between fuse10 and
fuse11. Therefore, the coordination between fuse10 and
fuse11 is encountered a problem. But Fig.16 (b) and Fig.17
show that in presence of FCL the fault current decreases and
coordination between fuse10 and fuse11 hasn't any problems.
 6

Fig.16 (a). Total fault current in presence of DG Fig.18 (b). Fault current passing through recloser in presence of DG

Fig.16 (b). Total fault current in presence of DG and FCL Fig.18 (c). Total fault current in presence of DG and FCL

Fig.18 (d). Fault current passing through recloser in presence of DG and FCL

Fig.17. Minimum melting curve and total clearing curve of fuses for
coordinating between two fuses.

D-2.Fuse-recloser coordination
Recloser R and fuse11 are coordinated based on recloser
fast and slow curve and total clearing and melting curve of
fuse11. After installing DG at position 2 (P2), a fault occurs at
position 5 (F5). As shown in Fig.18 (a), Fig. 18(b) and Fig.19
the fault current passing through fuse11 is higher than
maximum current for coordinating between recloser and
fuse11. Thus, it may cause to every temporary fault change to Fig.19. Minimum melting and total clearing curve of fuse and recloser slow
permanent interruption. Fig.18 (c) and fig. 18(d) show the and fast curve for coordinating between recloser and fuse
fault current level in presence of FCL. As shown in Fig.18 (c), In order to show operation of solid state FCL, we show the
Fig. 18(d) and Fig. 19 the fault current decreases and current of limiting reactor of FCL and GTO thyristor in Fig.
coordination between fuse11 and recloser hasn't any 20(a) and 20(b). As shown in these figures, only during the
problems. fault current limiting reactor enter in the network and limit the
fault current. Therefore, proposed FCL has not any impact on
normal operation of the network.

Fig.18 (a). Total fault current in presence of DG

Fig.20 (a). Current of limiting rector of FCL

 7

System Transient Stability”, IEEE Transactions on Applied

Fig.20 (b). Current of GTOs of FCL
VI. CONCLUSION
Presence of DG increases fault current levels and lead to
protection problems. In this paper the protection problems in
presence of DG is reviewed comprehensively. For solving
these problems a solid state FCL is proposed to connect in
series with DG. The main advantages of the proposed FCL are
simplicity in structure and control, fast response. Also this
type of FCL has no effect on utility voltage and current at
normal system operation and has acceptable power loss (only
switching loss). The simulation results demonstrate both the
ability of proposed FCL to limit the fault current level and
minimizing the impact of DG on protection problems.
Superconductivity, Vol. 11, Issue 1, Part 2, Mar. 2001, pp. 2122 – 2125.
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[14] IEEE Standard Inverse-Time Characteristic Equations for Overcurrent
Relays, IEEE Standard C37.112-1996, September 1996.
[15] IEEE Guide for the Operation, Classification, Application, and
Coordination of Current-Limiting Fuses with Rated Voltages 1–38 kV.
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