870 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 46, NO.
OCESSING, VOL. 46, NO. 7, JULY 1999
Single-Chip CMOS Image Sensors
for a Retina Implant System
Markus Schwarz, Ralf Hauschild, Bedrich J. Hosticka, Senior Member, IEEE, Jürgen Huppertz, Student Member, IEEE
Thorsten Kneip, Member, IEEE, Stephan Kolnsberg, Lutz Ewe, and Hoc Khiem Trieu
Abstract—This work describes the architecture and realization
of microelectronic components for a retina-implant system that
will provide visual sensations to patients suffering from photore-
ceptor degeneration. Special circuitry has been developed for a
fast single-chip CMOS image sensor system, which provides high
dynamic range of more than seven decades (without any elec-
tronic or mechanical shutter) corresponding to the performance
of the human eye. This image sensor system is directly coupled to
a digital filter and a signal processor that compute the so-called
receptive-field function for generation of the stimulation data.
These external components are wireless, linked to an implanted
flexible silicon multielectrode stimulator, which generates elec-
trical signals for electrostimulation of the intact ganglion cells.
All components, including additional hardware for digital signal
processing and wireless data and power transmission, have been
fabricated using in-house standard CMOS technology.
Index Terms— Biomedical prosthesis, CMOS image sensor,
flexible electrostimulator.
I. INTRODUCTION
A FTER it has been found that electrical stimulation of gan-
glion cells at the inner surface of the human retina yields
visual sensations [1], [2], development of a microelectronic
prosthesis for blind patients suffering from retinitis pigmentosa
seems to be feasible based on the advances in technology and
medicine [3], [4]. For this reason, we have started developing
a system for electrostimulation of the human retina [4], [5].
Our system consists of five major microelectronic components:
three for the external retina encoder and two for the implanted
retina stimulator, as shown in Fig. 1. Although the implanted
stimulator which is built in CMOS technology, including
the programmable stimulation pulse generator, also plays an
important role, in this contribution we will focus on the
development of the external retina encoder. The encoder
includes a power and data telemetry unit, a signal processor for
computing the so-called receptive field (RF) function, which
replaces the basic functionality of the retinal layers, e.g.,
photoreceptor layer, horizontal, bipolar, and amacrine cell
layers and, of course, the image sensor array, which includes
all components for image acquisition and readout of arbitrary
regions of interest required for the RF computation using an
on-chip signal processor interface [6].
Manuscript received October 9, 1998; revised March 9, 1999. This paper
was recommended by Guest Editors F. Maloberti and C. K. Wang.
The authors are with Fraunhofer Institute of Microelectronic Circuits and
Systems, D-47057, Duisburg, Germany.
Publisher Item Identifier S 1057-7130(99)05648-7.
1057–7130/99$10.00  1999 IEEE
II. CMOS IMAGE SENSORS FOR RETINA ENCODER
As stated above, the external part of the retina-implant
system is the so-called retina encoder. It provides image
acquisition, computation of the RF-function of the retinal cell
layers, which can be understood as spatio-temporal filtering
[7], and the wireless power and data telemetry unit, including
channel coding of the stimulus pattern sequences (Fig. 1).
For image acquisition, a dedicated CMOS image-sensor chip
with a high dynamic range, with respect to illumination inten-
sity, has been developed. Besides the photodetector matrix,
this chip includes all components necessary for readout of
a full image frame, readout of regions of interest, and ran-
dom memory-mapped pixel access. The photodetector matrix
consist of CMOS-compatible photodiodes (formed between
drain diffusion and p-well) with associated readout and sensor
selection circuits. These picture elements (i.e., “pixels”) yield
a sensitivity range covering more than seven decades ( 140
dB) of illumination with a signal-to-noise ratio of 56 dB
without any global electronic or mechanical shutter. The high
sensitivity range is required to cover almost the same range
of brightness as the human eye. Due to the logarithmic pixel
characteristic, the full dynamic range can be used within a
single image frame without any imperfections like blooming,
smearing, or time lag. The spectral measurements of the
photodiode have exhibited a quantum efficiency better than
60% at 650 nm, and better than 40% between 500 and 850
nm. Comparison of measurement and simulation has shown
that the photocurrent is primarily generated near the device
surface. Finally, a 3-dB pixel cutoff frequency was measured
at 1 MHz (0 dB at 3 MHz), while a minimum detectable
irradiance of less than W/m has been found. This high
bandwidth allows performance of local spatio-temporal filter-
ing for implementation of the RF-function. Circuit schematic
and sensitivity measurements of the pixel circuit are shown in
Figs. 2 and 3, respectively.
Two CMOS image sensors have been developed using this
pixel principle. In order to realize a circularly symmetric RF
spatial filter kernel (RF-spatial filter kernels can be described
by a difference of 2-D-Gaussian functions [5]), the pixel
elements of the first 128 128 pixel-array CMOS sensor
have been arranged on a hexagonal grid structure which yields
a reduction of required samples of 13.5%, in comparison to
rectangular sampling used for the second 400 300 pixel-
array sensor [8]. This is of benefit for lower resolution images,
but on the other hand, it requires about 5% more pixel area
for metal wiring.
SCHWARZ et al.: SINGLE-CHIP CMOS SENSORS FOR A RETINA IMPLANT SYSTEM
Fig. 1. Architecture of the retina-implant system for epiretinal ganglion cell electrostimulation.
Fig. 2. Schematic of the pixel circuit.
Fig. 3. Measurement of pixel light sensitivity.
Compilation of blocks for row selection (including addi-
tional preselection circuits for each row), first-stage readout
amplifiers, column-select multiplexers, and final driver stages
yields a similar chip layout for both the hexagonal 128 128
and orthogonal 400 300 pixel-array CMOS sensor chips
(see the generic block diagram in Fig. 4).
871
Fig. 4. Generic block diagram of the 128 2 128 and 400 2 300 pixel-array
CMOS sensors.
Both the hexagonal 128 128 and the orthogonal 400
300 pixel-array CMOS image sensors have been successfully
tested at video frame rates (operation at frame rates up to
150 Hz is possible with enhanced illumination). Test images
captured with both devices are shown in Fig. 5.
Both chips operate at a single 5-V power supply and exhibit
a sensor gain of 86 mV/decade. The chip photos of the 128
128 and 400 300 pixel-array CMOS sensor are shown
in Fig. 6.
The on-chip standard signal processor interface eliminates
the need for an additional frame buffer as required for con-
ventional charge coupled device (CCD) devices. Thus, the
use of random and subregion addressing for readout of the
pixels from distant regions of the array, e.g., necessary for
computation of the RF’s that are individually related to the
sparse distributed stimulation electrodes of the stimulator posi-
tioned on the retina surface (Figs. 1 and 14), increases the total
readout rate by a factor of ten for the retina-implant application
when compared to full-frame readout. This is necessary, since
not only spatial but also local temporal filtering operations
(within milliseconds) have to be implemented for realization
of RF functions.
On-chip preselection of arbitrary photodetector lines leads to
reduction of power consumption and makes these devices well
suitable for portable applications such as the retina-implant
872 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 46, NO. 7, JULY 1999
(a)
(b)
2
Fig. 5. Test images captured with the integrated 128 128 (on the left) and
400 2300 (on the right) pixel-array CMOS image sensors.
system. It does not conflict with full-frame sensor mode, since
power-on for each row (6 mW/preselected row) must precede
the current scan-line only by a few rows.
III. CMOS IMAGE SENSOR WITH LOCAL
BRIGHTNESS ADAPTATION
A further improvement is the implementation of a sophisti-
cated feature of the human eye is the ability to locally adapt the
photoreceptor sensitivity to the average brightness level. This
allows coverage of a high illumination range without loss of
contrast.
According to the theory of image formation, the observable
irradiance at a certain point of the image plane is proportional
to the product of the reflectance of the corresponding point on
the object surface and the irradiance illuminating this point.
While the reflectance component contains most of the visually
relevant information about the object characteristics, the spatial
distribution and the intensity of the illumination component are
irrelevant for most applications. The illumination component
(a)
(b)
Fig. 6. Chip microphotographs of the (a) 128 2 2
128 and (b) 400 300
pixel image sensor fabricated in in-house 1-m standard CMOS technology
(the chip areas are 25 mm2 and 120 mm2 ; respectively).
makes it generally difficult to extract the relevant image
information, since the variations of reflectance within a scene
are insignificant compared to temporal and spatial variations
of illumination. While under natural conditions, the dynamic
range of surface reflectance is in the order of 30 dB, scene
illumination shows variations of up to nine decades. Hence,
dedicated vision systems emulating the human eye should
be able to compress the dynamic range of an image signal
by transforming it in a way that emphasizes the reflectance
component and suppresses the illumination component.
Since the input photocurrent of a sensor pixel is proportional
to the product of the local object reflectance and the local
scene illumination, it is an obvious way to eliminate the
latter by dividing the input image signal by an estimate of
the illuminant that may be computed by spatial low-pass
filtering (or spatial averaging) the input image. This concept
will provide proper results, if on the one hand, the impulse
response of the spatial low-pass filter is wide enough so that
local contrast information is preserved, and on the other hand,
if the impulse response is narrow enough so that the illuminant
SCHWARZ et al.: SINGLE-CHIP CMOS SENSORS FOR A RETINA IMPLANT SYSTEM
Fig. 7. Structure of the 1-D pseudo-resistive diffusive averaging network
based on MOS transistors.
Fig. 8. Operation principle of the image sensor.
Fig. 9. Schematic of the adaptive sensor pixel.
does not significantly vary within the averaging area, and thus
cancels the resulting quotient.
Hence, hardware realization of the above concept for a local
brightness adaptation requires solutions for the following two
problems: spatial low-pass filtering of the input photocurrent
distribution, and division of the input photocurrent by its
local average. According to [12], spatial low-pass filtering can
be implemented very effectively using a diffusive averaging
873
Fig. 10. Chip microphotograph of the image sensor with 128 2 128 pixels
and local brightness adaptation.
(a) (b)
Fig. 11. The effect of local brightness adaptation. (a) Taken with a wide
impulse response corresponding to a global brightness adaptation. (b) Taken
with a narrow impulse response corresponding to a local brightness adaptation.
network based on MOS transistors operated as controlled
resistors, shown in Fig. 7 for the one-dimensional (1-D) case.
The spatial extent of the impulse response of the network
can be arbitrarily controlled by the potential difference
. Considering a two-dimensional (2-D) diffusive averaging
network, each pixel is connected to its four adjacent neighbors.
Signal processing in a 2-D diffusive averaging network shows
certain similarities to the signal processing performed in the
retina of mammals. The division of the input current by its
local average can be realized inside each pixel using a current-
mode translinear divider. Fig. 8 shows a simple block diagram,
which illustrates the operation principle of the realized image-
processing hardware.
Fig. 9 depicts the schematic of the realized pixel circuit in
our imager. For simplicity, not all of the readout electronics
are included in the schematic. Each pixel contains two pho-
todiodes: D1 generates corresponding to the input image,
and D2 serves to provide for local averaging. Q5, Q6,
874 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 46, NO. 7, JULY 1999

Fig. 12. Block diagram of the spatial filter used for implementation of the on- off-center RF-spatial filter (realized using CMOS standard-cell design).

(a) (b)
Fig. 13. Highly flexible silicon test structures with small regions of thick silicon for circuitry, and electrodes fabricated using a modified backside etching
process compatible with standard CMOS technology. (a) Flexible silicon grid structure lifted with vacuum handler. (b) Etched silicon chip bent at 90 .

and Q7 are part of the 2-D averaging network, whereby Q6
and Q7 serve as lateral coupling transistors to the adjacent
upper and right pixels. The local output current of the
network is given by the drain current of Q5. The operation of
the divider formed by Q1, Q2, Q3, and Q4 can be described
as follows. The small photocurrent generated in D1 forces Q3
to operate in weak inversion, so that its gate–source voltage
exhibits a logarithmic dependence on . On the other hand,
the low-pass filtered photocurrent is mirrored into Q4 by
the current mirror Q1, Q2 and forces the gate-source voltage of
Q4 to be logarithmically dependent on . Since the gates of
Q3 and Q4 are on the same potential, the potential difference
between the source nodes of Q3 and Q4 exhibits
a logarithmic dependence on the current quotient
whereby is a fixed-reference voltage and is the output
voltage of the divider
(1)
Fig. 10 shows a chip microphotograph of the developed
image sensor with 128 128 pixels and local brightness
adaptation. The chip has been realized in a 1- m standard
CMOS process. The pixel pitch is 53.4- m and the fill factor
is 14% (which could be improved if microlenses were used).
The total chip area is 68 mm .
Fig. 11 demonstrates the effect of local brightness adapta-
tion. The images show pliers lying on black and white pads.
They were taken using the image sensor shown in Fig. 10
for two different widths of the averaging region. The left
image was taken with a very wide impulse response, so that
the brightness adaptation is almost global, while in the other
SCHWARZ et al.: SINGLE-CHIP CMOS SENSORS FOR A RETINA IMPLANT SYSTEM 875

case, the impulse response was rather narrow. In this case, the
brightness adaptation is local and it can clearly be seen that
global brightness variation is suppressed while local contrast
information is preserved. As mentioned above, this is similar to
retinal image processing. At the edge between the two pads,
there occurs an effect similar to the phenomenon of Mach
bands, also known from the physiology of visual perception.
(a)
IV. RETINA ENCODER SYSTEM
Housing the sensor chip in a package with integrated
short focal-length optics as cover will result in a lightweight
miniaturized sensor system which is well applicable for our
retina-implant system, where the image-sensor chip is mounted
on a spectacle frame and can be easily handled by the patient
(Fig. 1).
A further device developed for the retina implant is the
spatial filter necessary for hardware implementation of the RF
function’s spatial filter. Fig. 12 shows the block diagram of the
spatial filter used for realization of the on- and off-center RF
function. It is inserted between the image sensor and the signal
processor since it uses the digital memory-like interface of the (b)
CMOS image sensor for random pixel addressing. It carries Fig. 14. Block diagram and physical arrangement (sectional view) of the
out hardware computation of pixel coordinates according to an flexible silicon multielectrode electrostimulator with circuitry for separation
RF-center-point, simultaneous fetching of associated filter co- of power and stimulation data and error correction, as well as for generation
of programmable current pulses and electrode selection.
efficients, and calculation of the fixed-point convolution using
its hardware multiply-add unit. The hexagonal filter hardware
has been designed using Verilog-HDL, and synthesized for the
realization in the same standard CMOS technology as used for
the image sensor.
Besides the spatial filter function, a biological RF function
also performs temporal filtering and spike-train generation,
thus emulating retinal ganglion cells, which actually have been
implemented off-chip using a digital signal processor (DSP).
This DSP also controls the telemetry unit required for wireless
transmission of stimulus data (i.e., encoded spike duration,
polarity, and electrode address information) and power for the
flexible silicon multielectrode electrostimulator implant.

V. RETINA STIMULATOR SYSTEM

The second major subsystem of the retina-implant system
is the implantable flexible silicon multielectrode electrostim-
ulator (Figs. 1, 13, 14).
The fabrication of this stimulator is also based on our
in-house standard CMOS-technology. The CMOS is used
for implementation of circuitry for separation of power and
stimulation data and error correction, as well as for realization
of programmable current sources and electrode selectors. The
mechanical flexibility of the electrostimulator silicon grid
structure shown in Fig. 13 has been achieved by applying
backside etching of the silicon wafer to thin the silicon
substrate at selected sites. The electrodes and electronics are
located at thick “islands” connected by thin crosspieces that
ensure the flexural response of the stimulator (see physical
arrangement and block diagram in Fig. 14). This principle of
membrane elastically coupling of a silicon array as a flexible
substrate (MESAflex substrate) has been described in [10]. As
a consequence of mechanical decoupling of silicon islands, the
Fig. 15. MESAflex substrate.
functional blocks located on the thick silicon islands have to be
electrically interconnected by flexible wires. These electrical
interconnects have been added using the metal layers available
in the standard CMOS process before etching the silicon to
form the flexible membrane.
The circuitry required for electrostimulation as shown in
Fig. 14 has been designed to generate pulses with a pro-
grammable pulse width (10–300 s), pulse polarity (including
bipolar pulses) pulse current (10–100 A), and pulse rate
( 500 Hz). The clock for pulse-current generation is extracted
from the 13-MHz carrier by a clock separation unit which is
part of the telemetry receiver.
VI. SUMMARY AND OUTLOOK
The hardware architecture of the retina-implant system
described in this contribution greatly exceeds the complexity
876 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 46, NO. 7, JULY 1999
of current bio-electronic systems, e.g., of cochlea implants
[4], because both the photoreceptor cells and all of the neural
functionality of the retina will be replaced by microelectronic,
micro-optical, and micromechanical hardware.
The CMOS image-array sensors presented here represent
one of five components that have to fulfill special requirements
posed by the application. The first two sensors feature a high
dynamic range of more than seven decades of illumination,
realized by employing a dedicated pixel with logarithmic
characteristic. Other improvements include memory-mapped
random and subregion addressing for efficient on- and off-
center RF computation, and low power dissipation by using
preselection of only a small number of scan lines during
full operation. We have also presented an alternative solution
to the CMOS imaging, namely an image sensor with local
brightness adaptation. Besides these CMOS sensors, dedicated
hardware and software for real-time emulation of biological
RF functions and wireless data and power transmission for
electrostimulation of ganglion cells have been implemented
and tested. Finally, a highly flexible silicon multielectrode-
stimulator structure has been developed by applying backside
etching to the silicon wafer [10], [11]. It should be also
mentioned here that intensive work on biocompatible encap-
sulation of the flexible silicon multielectrode structure and on
the optimization of the implantation ophthalmological surgery
is carried out by our biomedical and medical partners.
Our future research will concentrate on single-chip CMOS
image sensors featuring higher resolution linear pixel charac-
teristics [13], as well as focusing on on-chip implementation
of global and local brightness adaptation. This will be ac-
companied by contrast adaptation, aperture correction, color
processing, and application-specific interfaces. All these fea-
tures are not available in CCD devices, which always require
external analog and digital circuits for amplification, filtering,
and timing generation for pixel shifting. We surmise that our
miniaturized CMOS image-sensor systems can be also used in
other applications, such as automotive systems. Examples are
cameras for electronic rearview mirrors, cameras for obstacle
and precrash detection, as well as low-cost guidance systems
for autonomous vehicles, since all these applications can
benefit from the high dynamic range which is required due
to excessive illumination variation.
ACKNOWLEDGMENT
The authors gratefully acknowledge useful discussions with
the other members of the Retina Implant Team who are
developing the retina-implant device under contract from the
German Federal Ministry of Education, Science, Research, and
Technology (BMBF), Bonn, Germany. This work is based on
the results of the feasibility study “Neurotechnology Report
II” [4].
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Markus Schwarz was born in Duisburg, Germany,
on December 14, 1964. He received the Dr.Ing.
degree in electrical engineering from the University
of Duisburg, Duisburg, Germany, in 1993.
Since June 1996, he has been head of the group
CMOS-Based Vision Systems in the System Design
Department, Fraunhofer Institute of Microelectronic
Circuits and Systems, Duisburg, Germany. His re-
search interests include CMOS-based vision sys-
tems, image signal processing, design of microsys-
tems, biomedical implants, and neuroinformatics.
He has authored and coauthored more than 35 technical papers.
Ralf Hauschild was born in Dartford, U.K., in
July 1964. He received the Dipl.Ing. degree from
the Gerhard Mercator University of Duisburg, Ger-
many, in 1995. He is currently working toward the
Dr.-Ing. degree at Fraunhofer Institute of Microelec-
tronic Circuits and Systems, Duisburg, Germany.
Since March 1995, he has been a member of the
Signal Processing and System Design Department,
Fraunhofer Institute of Microelectronic Circuits and
Systems. His current work and research interests
include smart CMOS image sensors, on-chip image
processing, and low-noise sensor readout.
SCHWARZ et al.: SINGLE-CHIP CMOS SENSORS FOR A RETINA IMPLANT SYSTEM
Bedrich J. Hosticka (M’80–SM’84) received the
Dipl.Ing. degree in electrical engineering from
the Swiss Federal Institute of Technology, Zürich,
Switzerland, in 1972, and the Ph.D. degree from
the University of California, Berkeley, in 1977.
In 1972, he joined Siemens-Albis AG, Zürich,
Switzerland, where he was involved in circuit design
for the PCM-30 digital transmission system. From
1975 to 1977, he was a Research Assistant at
the Electronics Research Laboratory, University of
California, Berkeley. During the summer of 1976,
he was with the IBM T. J. Watson Research Center, Yorktown Heights, NY,
working on MOS amplifiers. He joined the Institute of Telecommunications
of the Swiss Federal Institute of Technology, Zürich, Switzerland, in 1978,
where his primary work was the design of switched-capacitor filters. From
1980 to 1985, he was the Chair of Electron Devices, University of Dortmund,
Dortmund, Germany. Currently, he is a Professor at the Gerhard Mercator
University, Duisburg, Germany, and Head of the Signal Processing and
Systems Design Department at the Fraunhofer Institute of Microelectronic
Circuits and Systems. His research interests include design of microelectronic
circuits and systems, analog and digital signal processing, and neural networks.
He has authored and coauthored more than 270 technical papers.
Dr. Hosticka served as Associate Editor of the IEEE JOURNAL OF
SOLID-STATE CIRCUITS from 1983 to 1986.
Jürgen Huppertz (S’99) was born in Rheydt, Ger-
many, in 1969. He received the Dipl.Ing. degree
from the University of Technology RWTH Aachen,
Germany, in 1996. He is currently working to-
ward the Dr.-Ing. degree at Fraunhofer Institute
of Microelectronic Circuits and Systems, Duisburg,
Germany.
Since 1996, he has been with the Signal Pro-
cessing and System Design Department, Fraunhofer
Institute of Microelectronic Circuits and Systems.
His research interests include CMOS imagers, pixel
readout circuitry, and on-chip image processing.
Thorsten Kneip (M’98) was born in Duisburg,
Germany, in 1970. He received the Dipl.Ing. degree
from the Gerhard Mercator University of Duisburg,
Germany, in 1996.
Since June 1996, he has been a member of the
Signal Processing and System Design Department at
the Fraunhofer Institute of Microelectronic Circuits
and Systems, Duisburg, Germany. His current work
and research interests include the design of digi-
tal circuits, CMOS image sensors, and biomedical
applications.
877
Stephan Kolnsberg was born in Essen, Germany,
in 1969. He received the Dipl.Ing. degree from
the Gerhard Mercator University of Duisburg, Ger-
many, in 1997. He is currently working toward the
Dr.-Ing. degree at Fraunhofer Institute of Microelec-
tronic Circuits and Systems, Duisburg, Germany.
Since June 1997, he has been a member of the
Signal Processing and System Design Department,
Fraunhofer Institute of Microelectronic Circuits and
Systems. His current work and research interests
include microsystem integration for medical and
transponder applications combined with smart sensors.
Lutz Ewe was born in 1968 in Giessen, Germany.
He received the Dipl.Phys. degree in applied physics
from the University of Giessen, Germany, in 1995.
Since 1995, he has been at the Fraunhofer In-
stitute of Microelectronic Circuits and Systems,
Duisburg, Germany. His research interests include
biomedical actuators, especially stimulation elec-
trodes and implantable microsystems.
Hoc Khiem Trieu was born in 1966 in Saigon,
Vietnam. He received the Dipl.Phys. degree in par-
ticle physics from the University of Technology
Aachen, Germany, in 1993, and the Dr.-Ing. degree
in electrical engineering from the University of
Duisburg, Germany, in 1997, both with highest
honors.
Since 1994, he has been at the Fraunhofer In-
stitute of Microelectronic Circuits and Systems,
Duisburg, Germany. His research interests include
the development, design, fabrication, and testing of
silicon microstructures, sensors, and implantable microsystems.