Introduction to Microprocessor Instruction Set

Instruction Format

Examples of 8086 Instruction Formats

opcode One byte instruction - implied operand(s)

opcode reg One byte instruction - register mode.

opcode 11 reg r/m Register to register

dw

Opcode dw 00 reg r/m Register Indirect

Register to/from memory with 8 or 16 bit displacement

Opcode d w mod reg r/m disp LOW disp HIGH

Immediate operand to register

opcode 11 opcode r/m data LOW data HIGH
Immediate operand to memory with 16-bit displacement
opcode mod opcode r/m disp LOW disp HIGH
data LOW data HIGH

Addressing Modes
 Immediate
 Direct
 Register
 Register indirect
 Indexed
 Register relative
 Based indexed
 Relative based indexed
 Intrasegment direct mode
 Intrasegment indirect mode
 Intersegment direct mode
 Intersegment indirect mode

 Immediate
Ex: MOV AX,0005H
MOV AH, 12H : Move to AH the byte value 12H
MOV AX, 1234H : Move to AX the value 1234H
MOV AX, CONST :Move to AX the constant defined as CONST
MOV AX, OFFSET x : Move to AX the address (offset) of variable x

 Direct
Ex : MOV AX,[5000H]
MOV AX, [1234H] :Move to AX value at memory location 1234H
MOV AX, x :Move to AX the value of M[x]
MOV x, AX :Move to M[x] the value of AX
(all the above uses default seg, DS)

 Register

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Ex : MOV AX,BX
MOV AX, BX :Move to AX the 16-bit value in BX
MOV AX, DI :Move to AX the 16-bit value in DI
MOV AH, AL :Move to AH the 8-bit value in AL

 Register indirect
Ex : MOV AX,[BX]
MOV AX, [DI] :Move to AX the value at M[DI] (uses default segment, DS)
MOV [DI], AX : Move to M[DI] the value AX (uses default segment, DS)

 Indexed
EX : MOV AX,[SI ]  10H*DS+[SI]

 Register relative
Ex : MOV AX, 50H[BX]  10H*DS+50H+[BX]

 Based indexed
Ex : MOV AX, [BX] [SI]  10H*DS+[BX]+[SI]

 Relative based indexed

Ex : MOV AX, 50H[BX] [SI]  10H*DS+[BX]+[SI] +50H

 Intrasegment direct mode

JMP short label (within -128 to 127 from current IP content)

 Intrasegment indirect mode

JMP [BX]  JMP [BX+5000H]
 Intersegment direct mode
JMP 5000H: 2000H  jump to EA 2000h in segment 5000H
 Intersegment indirect mode
JMP [2000H]

Instruction set
 Data copy/transfer instructions
 Arithmetic and logical instructions
 Shift and Rotate instructions
 Branch instructions
 Loop instructions
 Machine control instructions
 Flag manipulation instructions
 String instructions

Data copy/transfer instructions:

 MOV : MOV
MOV dest, src dest  src
 transfers data ( byte/ word) from source to destination.
 source can be register/memory/immediate
 destination can be register/memory
 both can not refer to memory location
 must be of same data type ( byte/word)
 flags affected none
ex:
MOV AX,CX
MOV AH,AL
MOV DS,AX

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MOV Ax,100H
MOV BX,[5300H]
MOV DL,[BX]
MOV BP,SS

 XCHG : Exchange
XCHG dest, src ; dest  src
 swaps the content of a source with destination
 Source cab be register/memory
 Destination can be register/memory
 Both cannot be memory location
 Must be of same data type
ex:
XCHG AX,CX
XCHG AL,AH
XCHG Amount ,BX

 IN : input from port

IN Accu, port ( or DX)
 Reads the data from the port and copies into the accumulator
 8 bit access is stored in Al, while 16 bit is stored in Ax
 Flags affected none
Ex : IN Al,0D8H
IN AX, PIC_port

OUT : output to port

OUT port ( or DX) , Accu
 Outputs the data from the port and copies into the accumulator
 8 bit from Al, while 16 bit is from in Ax
 Flags affected none
Ex : OUT 0D8H,AL
OUT PIC_port,AX

 XLAT/XLATB : translate a byte

XLAT/XLATB
 Replaces a byte in the Al with byte from lookup table.
 Before execution of XLAT, BX should be loaded with offset address of lookup
table in the data segment
 Flags affected none

 LEA : load effective address

LEA reg16, src
 Determines offset of a variable/memory indicated as a source (address) and
places the offset in the specified register
 Source must be memory variable
 Destination must be register
 Flags affected none
Ex : LEA BX, amount
LEA BP, SS

 LDS : load register and DS register

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LDS reg16, memory

 Copies the content of first 2 memory location to a specified register and next 2
consecutive memory location into the DS register.
 Flags affected none

Ex : LDS BX, [5300H]

LDS SI, str_ptr

 LES : load register and ES register

LDS reg16, memory
 Copies the content of first 2 memory location to a specified register and next 2
consecutive memory location into the ES register.
 Flags affected none

Ex : LES BX, [5300H]

LES SI, str_ptr

 LAHF : load AH with flags

LAHF
 Load AH with the lower byte of the flag register
 Flags affected none

Ex : LAHF

 SAHF : store AH in flag register

SAHF
 Copies the contents of AH into the lower byte of the flag register
 Useful in modifying flag register, without execution of arithmetic instruction
 Flags affected are : SF, ZF, PF, AF, CF

Ex : SAHF

 PUSH : push register/memory to stack

PUSH src SP SP-2, SS:[SP]  src
 Transfer register/memory to the stack
 Decrements the stack pointer by 2 and loads a word from source to the location
pointed to by SP
 Source can be register/segment register/memory
 SS & SP should be initialized before the use of PUSH
 Flags affected none
Ex
PUSH AX
PUSH BX
PUSH SS
PUSH SI
PUSH BL
PUSH Amount[BX]

 PUSHF : push flag register

PUSHF SPSP-2, SS flag
 Transfer flag register content on to the stack,
 decrements the SP by 2 first, copies at last
 Flags affected none

Ex : PUSHF

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 POP : pop register or memory

POP dest destSS:[SP], SP SP+2
 Copies the word from the stack to the specified register or memory, then
increments the SP by 2
 Flags affected none

EX : POP AX
POP SI

 POPF : pop Flag register

POPF flags  SS:[SP], SPSP+2

 Copies the word from stack to flag register

 Flags affected all

Ex:
POPF

Arithmetic and logical instructions :

 ADD : addition
ADD dest , src dest  src + dest
 Adds the content of source with destination, stores the result in destination
 Source can be register/memory/immediate
 Destination can be register/memory
 Must be of same data type
 Both cannot refer to memory
 Flags affected AF, CF, OF, PF, SF, ZF
Ex :
ADD AX,0008h ; immediate
ADD AX,BX ; register
ADD AX,[SI] ; register indirect
ADD AX, [5000h] ; direct
ADD 0111h ; destination (accu) implicit

 ADC : add with carry

ADC dest,src dest  src + dest + CF
 Adds the content of source with destination, carry will added to result, then stores
the result in destination
 Source can be register/memory/immediate
 Destination can be register/memory
 Must be of same data type
 Both cannot refer to memory
 Flags affected AF, CF, OF, PF, SF, ZF
Ex
ADC AX,0008h ; immediate
ADC AX,BX ; register
ADC AX,[SI] ; register indirect
ADC AX, [5000h] ; direct
ADC 0111h ; destination (accu) implicit

 INC : increment
INC dest dest  dest +1

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 Adds 1 to dest( register/memory) stores the result in dest

 CF will not be affected
 Flags affected AF, OF, PF, SF, ZF
Ex : INC AX ;register
INC [BX] ; register indirect
INC [5000h] ;direct

 SUB : subtraction
SUB dest , src dest  dest - src
 Subtracts the content of source from destination, stores the result in destination
 Source can be register/memory/immediate
 Destination can be register/memory
 Must be of same data type
 Both cannot refer to memory
 Flags affected AF, CF, OF, PF, SF, ZF

Ex:
SUB AX,0008h ; immediate
SUB AX,BX ; register
SUB AX, [5000h] ; direct

 SBB : subtract with borrow

SBB dest,src dest  dest – src - CF
 Subtracts the content of source from destination, the status CF is subtracted from
the result, then stores the result in destination
 Source can be register/memory/immediate
 Destination can be register/memory
 Must be of same data type
 Both cannot refer to memory
 Flags affected AF, CF, OF, PF, SF, ZF

 DEC : decrement
DEC dest dest  dest -1
 Subtracts 1 from dest (register/memory) and stores the result in dest
 CF will not affected
 Flags affected AF, OF, PF, SF, ZF
DEC AX ;register
DEC [5000h] ;direct

 CMP : compare
CMP dest , src dest – src (data not modified)
 Perform a non destructive subtraction
 Compare the content source with destination
 Source can be register/memory/immediate
 destination can be register/memory
 Both cannot refer memory
 Must be of same data type
 Sets the flags based on the magnitude of the operands
 Used with conditional JUMP instruction
 Flags affected AF, CF, OF, PF, SF, ZF
Ex :
CMP BX,0100h
CMP AX,CX
CMP [5000h],0100h
CMP BX,[SI]

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 NEG : negate
NEG dest dest  0 – dest
 Change sign of the operand
 Performed by subtraction of destination operand from 0, and placing the result in
dest.
 Replaces the number in the dest with its equivalent 2’s compliment
 Destination can be register/memory
 Flags affected AF, CF, OF, PF, SF, ZF
Ex:
NEG AL
NEG AX
NEG BYTE PTR[BX]
NEG count

 AAA : ASCII adjust for addtion

AAA AL  ( AL corrected for ASCII addition)
 AAA can be used to convert the contents of AL register to BCD result
 AAA should be executed after the ADD instruction, result is placed in AL
 Higher nibble of AL register filled with 0’s
 Flags affected AF, CF
EX : AAA
ASCII Adjust after Addition.
Corrects result in AH and AL after addition when working with BCD values.
It works according to the following Algorithm:

if low nibble of AL > 9 or AF = 1 then:

 AL = AL + 6
 AH = AH + 1
 AF = 1
 CF = 1

else

 AF = 0
 CF = 0

In both cases:
clear the high nibble of AL.

 AAS : ASCII adjust for subtraction

AAS AL  ( AL corrected for ASCII subtraction)
 AAS can be used to convert the contents of AL register to BCD result
 AAS should be executed after the SUB instruction, result is placed in AL
 Higher nibble of AL register filled with 0’s
 Flags affected AF, CF

ASCII Adjust after Subtraction.

Corrects result in AH and AL after subtraction when working with BCD values.
Algorithm:
if low nibble of AL > 9 or AF = 1 then:

 AL = AL - 6

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 AH = AH - 1
 AF = 1
 CF = 1

else

 AF = 0
 CF = 0

in both cases:
clear the high nibble of AL.

 AAM : ASCII adjust for multiplication

AAM AH:AL(AH:AL corrected for ASCII multiplication)
 AAM can be used to convert the result of the multiplication of 2 valid unpacked
BCD number
 AAM should be issued after multiplication
 Result will stored in AL
 After division AL stores quotient & AH stores the remainder
 Flags affected PF, SF, ZF
EX : AAM

ASCII Adjust before Division.

Prepares two BCD values for division.

Algorithm:

 AL = (AH * 10) + AL
 AH = 0

 AAD : ASCII adjust for division

AAD AH:AL (AH:AL for division of ASCII codes)
 Adjust before ASCII division
 AAD can be used to convert the unpacked BCD digit in AH & AL registers to the
equivalent binary number in the register AL
 Should be issued before division
 Quotient in AL, remainder AH register
 Higher order nibble of AH & AL are filled with 0’s
 Flags affected PF, SF, ZF
EX : AAD

ASCII Adjust after Multiplication.

Corrects the result of multiplication of two BCD values.

Algorithm:

 AH = AL / 10
 AL = remainder

 DAA :decimal adjust for addition

DAA Al  ( AL corrected for BCD addition)

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 DAA can be used to change the content of AL register to pair of valid packed
decimal digit
 Instruction should be issued after addition instruction
 Flags affected AF, CF, PF, ZF
 Flags undefined OF

Ex : DAA

Decimal adjust After Addition.

Corrects the result of addition of two packed BCD values.

Algorithm:

if low nibble of AL > 9 or AF = 1 then:

 AL = AL + 6
 AF = 1

if AL > 9Fh or CF = 1 then:

 AL = AL + 60h
 CF = 1

 DAS :decimal adjust for subraction

DAS AL  ( AL corrected for BCD addition)
 DAS can be used to change the content of AL register to pair of valid packed
decimal digit
 Instruction should be issued after subtraction instruction
 Flags affected AF, CF, PF, ZF
 Flags undefined OF

Ex : DAS

Decimal adjust After Subtraction.

Corrects the result of subtraction of two packed BCD values.

Algorithm:
if low nibble of AL > 9 or AF = 1 then:

 AL = AL - 6
 AF = 1

if AL > 9Fh or CF = 1 then:

 AL = AL - 60h
 CF = 1

 MUL : multiplication
MUL src
Byte : AX  ( AL * src8)
Word : DX:AX  ( AX * src16)
 Perform unsigned multiplication of the source operand with the accumulator
 Source can be register/memory

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 Flags affected CF, OF

 Flags undefined AF, PF, SF, ZF
Ex:
MUL AL
MUL BX
MUL BYTE PTR [BX]

 IMUL : integer multiply

IMUL src
Byte : AX  ( AL * src8)
Word : DX:AX  ( AX * src16)
 Perform signed multiplication of the source operand with the accumulator
 Source can be register/memory
 Flags affected CF, OF
 Flags undefined AF, PF, SF, ZF
Ex:
IMUL CL
IMUL BX

 DIV : division
DIV src
Byte : AL (AX / src8)
AH (AX mod src8)
Word : AX (DX : AX / src16)
DX  (DX:AX mod src16)
Division by 0 result too large causes interrupt type 0 (INT 00H)
 Perform an unsigned division of accumulator and its extension by the source
operand
 Source can be register/memory
 Flags affected none
 Flags affected AF, CF, OF, PF, SF, ZF
Ex:
DIV CL
DIV CX

 IDIV : integer division

IDIV src
Byte : AL (AX / src8)
AH (AX mod src8)
Word : AX (DX : AX / src16)
DX  (DX : AX mod src16)
Division by 0 result too large causes interrupt type 0 (INT 00H)
 Perform an signed division of accumulator and its extension by the source
operand
 Source can be register/memory
 Flags affected none
 Flags affected AF, CF, OF, PF, SF, ZF

EX:
IDIV CL

 CBW : convert byte to word

CBW AH  ( filled with bit -7 of AL)
 Copies the extended sign of a byte in AL register to all the bits in AH

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 Instruction must be executed before a signed byte in AL is divided by another signed byte
with the instruction IDIV
Ex:
CBW

 CWD : convert word to double word

CWD DX  (filled with bit 15 of AX)
 Copies the extended sign of a word in AX to all bits in DX
 Instruction must be executed before a signed word in AX is divided by another signed
word with the instruction IDIV
 Flags affected none
EX: CWD

 AND : Logical AND

AND dest,src ( dest dest & src)
 Perform logical AND on 2 operands (byte or word) & place the result in
destination.
 Source can be register/memory location/immediate value.
 destination can be register/memory location.
 CF,OF,PF,SF,ZF flags are affected
Ex:
AND AX,0008h
AND AX,BX
AND AX,[5000h]
AND [5000h],AX

 TEST : Logical compare instruction

TEST dest , src flags (set as for dest & src)

 Performs the logical AND of 2 operands and updates the flags

 Operands are not modified
 Source can be register/memory/immediate
 Destination can be register/memory
 Both cannot refer memory
 Must be of same data type
 CF & OF are set to 0 on execution of this instruction
 Flags affected CF, OF, PF, SF, ZF

EX:
TEST AL,BL

 OR : logical OR
OR dest , src dest dest | src
 Performs logical OR of 2 operands, places the result in the destination
 Source can be register/memory/immediate
 Destination can be register/memory
 Both should not refer to memory
 Must be of same data type
 CF & OF are set to 0 on execution of this instruction
 Flags affected CF, OF, PF, SF, SF
Ex :
OR AH,CH
OR BX,00FFh

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OR CX,[SI]

 XOR : logical exclusive OR

XOR dest, src dest  dest^src
 Performs the logical XOR of 2 operands and places the result in the destination
 Source can be register/memory/immediate
 Destination can be register/memory
 Both should not refer to memory
 Must be of same data type
 CF & OF are set to 0 on execution of this instruction
 Flags affected CF, OF, PF, SF, ZF
Ex:
XOR AH,CH
XOR BX, 00FFh
XOR CX, [SI]

 NOT : logical NOT

NOT dest dest  ( -dest)
 Converts dest to its 1’s complement
 Inverts each bit and places the result in the destination
 Destination can be register/memory
 Flags affected none
Ex:
NOT AL
NOT BX
NOT myflag

Shift and Rotate instructions :

 SHL : shift logical left

SHL dest , count
 Shifts the destination byte/word left by the number specified in count
 0’s are shifted into LSB, MSB bits are shifted out and placed in CF
 Previous CF content will be lost
 Destination can be register/memory
 Count operand can be register/immediate
 Flags affected CF, OF, PF(if destination is AL), SF, ZF
 Flags undefined AF

Ex:
SHL AX,2
SHL BL,1

 SHR : shift logical right

SHR dest , count
 Shifts the destination byte/word right by the number specified in count
 0’s are shifted into MSB, LSB bits are shifted out and placed in CF
 Previous CF content will be lost

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 Destination can be register/memory

 Count operand can be register/immediate
 Flags affected CF, OF, PF(if destination is AL), SF, ZF
 Flags undefined AF

Ex:
SHR AX,2
SHR BL, 1

 SAR : shift arithmetic right

SAR dest , count
 Shifts the destination byte/word right by the number specified in count
 Bit value in MSB(sign bit) is retained, LSB bits are shifted out and placed in CF
 Previous CF content will be lost
 Destination can be register/memory
 Count operand can be register/immediate
 Flags affected CF, OF, PF(if destination is AL), SF, ZF
 Flags undefined AF

Ex:
SAR AX,2
SAR BL, 1

 ROL : Rotate left

ROL dest, count
 Rotate the destination byte/word left by the number of bits specified in the count
 MSB bits are shifted to LSB and CF
 Previous content of CF will lost
 Destination can be register/memory
 Count operand can be register/immediate
 Flags affected CF, OF

Ex:
ROL AX,2
ROL BL,1

 ROR : Rotate right

ROR dest, count
 Rotate the destination byte/word right by the number of bits specified in the count
 LSB bits are shifted to MSB and CF
 Previous content of CF will lost.
 Destination can be register/memory
 Count operand can be register/immediate
 Flags affected CF, OF

Ex:
ROR AX,2
ROR BL,1

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 RCL : Rotate through carry left

RCL dest, count
 Rotate the destination byte/word left by the number of bits specified in the count
 MSB bits are shifted to CF and CF bit are shifted to LSB
 Previous content of CF will lost.
 Destination can be register/memory
 Count operand can be register/immediate
 Flags affected CF, OF

Ex:
RCL AX,2
RCL BL,1

 RCR : Rotate through carry right

RCR dest, count
 Rotate the destination byte/word right by the number of bits specified in the count
 LSB bits are shifted to CF and CF bit are shifted to MSB
 Previous content of CF will lost.

RCR AX,2
RCR BL,1

Branch instructions

 Branch instructions do not affected the CPU flags

 JMP target
 Unconditional transfer of control to the label
 Short : IP  ( IP +(target displacement sign extended)
 Near :IP (IP + (target displacement))
 Indirect :IP  ( register or value in memory)
 Far : CS (target segment)
IP  (target offset)

 LOOP : loop
LOOP short_label
 Instruction used to execute the group of instruction repeatedly a specified number
of times
 CX is decremented by 1 automatically
 This are short jumps

 LOOPE : loop while equal

 LOOPZ : loop while zero

LOOPE/LOOPZ short_label
CX CX-1, jump if (CX !=0 and ZF =1)

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 LOOPNE : loop while not equal

 LOOPNZ : loop while not zero

LOOPNZ/LOOPNE short_label
CX CX-1, jump if (CX !=0 and ZF =0)

 JE/JZ : Jump on equal/ jump on zero if ZF = 1

 JNE/JNZ : Jump not equal/ jump on not zero if ZF = 0

 JL/JNGE : Jump less than/jump not greater than or equal if (SF != OF) after signed math

 JA/JNBE : jump on above/jump on not below or equal if CX=0 and ZF =0 after unsigned math

 JAE/JNB/JNC : jump on above or equal/ jump on not below/ jump on not carry if
CF =0 after unsigned math

 JB/JNAE/JC : jump on below / jump on not above or equal / jump on carry if CF =1

 JG/JNLE : jump on greater than / jump on not less or equal if SF=OF and ZF =0 after signed math

 JGE/JNL : jump on greater or equal / jump on not less if SF = OF after signed math

 JLE / JNG : jump on less than or equal / jump on not greater if SF != OF or ZF=1 after signed math

 JNO : jump on not overflow if OF = 0

 JNP/JPO : jump on not parity / jump on parity odd if PF = 0

 JO : jump on overflow if OF = 1

 JP/JPE : jump on parity even / jump on parity equal if PF = 1

 JS : jump on sign if SF = 1

 CALL : call procedure

CALL sub_name
near  procedure in the same code segment ,address 2 byte long
far procedure is not in the same code segment, address 4 byte long
 transfers the control to a subprogram or a procedure by saving the return address on the
stack
 Flags affected none.
 Near CALL
SP  SP – 2
Save IP on the stack
IP  address of the called procedure
 Far CALL
SP SP – 2, save CS on the stack
CS  new segment address, procedure
SP  SP – 2 , save IP on the stack
IP offset address of the called procedure
EX : CALL BX
CALL WORD PTR [BX]

 RET : Return
RET
 Return the control from the procedure to calling program

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 Return can be FAR or NEAR

 Flags affected none

 Near return
If (intra segment RET)
IP contents of the top of the stack
SP  SP +2
 Far return
If (inter segment RET)
IP  contents of the top of the stack
SP  SP +2
CS  contents of the top of the stack
SP  SP + 2

 RET n
perform near or far return
SP  SP +n

EX :
RET
RET 2

 INT : interrupt
INT Type
 Perform a software interrupt ( invokes a system call)
PUSHF
IF 0, TF  0
PUSH CS , PUSH IP
IP  0000 [type * 4]
CS  0000 [(type * 4)+2]
 Flags affected none
 function
SP  SP-2 ; save flag
SP  SP-2 ; save CS
SP  SP-2 ; save IP
New IP [type number * 4]
New CS [type number * 4 +2]
TF0, IF  0

 INTO : interrupt overflow

INTO
 If OF =1 the perform INT 04H
 Flags affected TF, IF
 IRET : interrupt return
IRET
 Return from the interrupt
 Flags affected none

Processor control instructions :

 CLC : Clear carry

CLC
 clears the carry flags  CF  0
 Flags affected CF

 CMC : Complement carry

CMC
 Complements the carry flag CF~CF
 Flags affected CF

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Introduction to Microprocessor Instruction Set

 STC : set carry

 CLD : clear direction flag

CLD - clear direction flag to auto increment mode  DF  0

 STD : set direction flag

STD – set direction flag to auto decrement mode  DF  1

 CLI : clear interrupt flag

CLI – disable maskable hardware interrupts  IF  0

 STI : set interrupt flag

STI – enable maskable hardware interrupts  IF  1

 HLT : halt
HLT – halt the processing ( perform NOP’s until an interrupt occurs)

 NOP : No operation
NOP – perform no operation, waits for 3 clock cycle

 WAIT : wait
WAIT – wait for TEST line active, causes the processor to enter into an ideal state

 LOCK : lock shared resources

LOCK – prevent coprocessor bus access for the next instruction

String Operation Instruction:

MOVS : move string

MOVSB : move string byte
MOVSW : move string word
MOVS/MOVSB/MOVSW

 copy byte (word) string , ES:[DI]  DS:[SI]

 Transfer the a byte /word from source to destination, SI & DI automatically updated
 If DF =0 then SI & DI will incremented by 1 for byte and 2 byte for word
 If DF =1 then SI & DI will decremented by 1 for byte and 2 byte for word
 DS:SI & ES:DI must be loaded prior to the execution of MOVS instruction
 In multiple byte or word moves, the number of elements to be moved placed in the CX
register
 In case of multiple movement, MOVS/MOVSB/MOVSW is prefixed with the repeat string
instruction, REP,REPE
 Flags affected none
EX: MOVSB
MOVSW

 LODS : load string

LODSB : load string byte
LODSW : load string word
LODS/LODSB/LODSW
 Copy string byte/ word into AL(AX)
byte : AL DS:[SI]
word : AX DS:[SI]
 Transfer the a byte /word from source to accumulator, SI automatically updated
 If DF =0 then SI will incremented by 1 for byte and 2 byte for word
 If DF =1 then SI will decremented by 1 for byte and 2 byte for word
 DS:SI must be loaded prior to the execution of LODS instruction

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Introduction to Microprocessor Instruction Set

 In multiple byte or word loads, the number of elements to be loaded placed in the CX
register
 In case of multiple movement, LODS/LODSB/LODSW is prefixed with the repeat string
instruction, REP,REPE
 Flags affected none
EX: LODSB
LODSW

 STOS : store string

STOSB : store string byte
STOSW : store string word
STOS/STOSB/STOSW
 Store string byte/ word into string
byte : DS:[DI]  AL
word :EI:[DI]  AX
 Transfer the a byte /word from accumulator to destination ,DI automatically updated
 If DF =0 then DI will incremented by 1 for byte and 2 byte for word
 If DF =1 then DI will decremented by 1 for byte and 2 byte for word
 ES:DI must be loaded prior to the execution of STOS instruction
 In multiple byte or word loads, the number of elements to be stored placed in the CX
register
 In case of multiple movement, STOS/STOSB/STOSW is prefixed with the repeat string
instruction, REP,REPE
 Flags affected none
EX: STOSB
STOSW

 CMPS : compare string

CMPSB : compare string byte
CMPSW : compare string word
CMPS/CMPSB/CMPSW
 Compare byte( word) strings
flags  ( result of CMP DS:[SI],ES:[DI])
 Comparison performed by subtraction
 If DF =0 then SI & DI will incremented by 1 for byte and 2 byte for word
 If DF =1 then SI & DI will decremented by 1 for byte and 2 byte for word
 DS:SI & ES:DI must be loaded prior to the execution of CMPS instruction
 In multiple byte or word comparison, the number of elements to be compared is placed in
the CX register
 In case of multiple movement, CMPS/CMPSB/CMPSW is prefixed with the repeat string
instruction, REPZ,REPE
 Flags affected AF, CF, OF, PF, SF,ZF
EX : CMPSB
CMPSW
If (dest > src) then
Subtraction requires no borrow
CF =0, ZF=0, SF=0
If (dest < src) then
Subtraction requires borrow
CF =1, ZF=0, SF=1
If (dest = src) then
CF =0, ZF=1, SF=0

 SCAS : scan string

SCASB : scan string byte
SCASW : scan string word
SACS find byte (word) in string
SCASB flags (result of CMP ES:[DI],AL)
SCASW flags(result of CMP ES:[DI],AX)

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 Scans string byte/word with a byte in the accumulator

 Scan is performed subtracting the destination string element from the accumulator
 Contents will not be modified
 If DF =0 then DI will incremented by 1 for byte and 2 byte for word
 If DF =1 then DI will decremented by 1 for byte and 2 byte for word
 In multiple byte or word scan, the number of elements to be scanned placed in the CX register
 In case of multiple movement, SCAS/SCASB/SCASW is prefixed with the repeat string
instruction, REPZ,REPE
 Flags affected AF, CF, OF, PF, SF,ZF
EX :SCASB
SCASW
If (accu > dest) then
Subtraction requires no borrow
CF =0, ZF=0, SF=0
If (accu < dest) then
Subtraction requires borrow
CF =1, ZF=0, SF=1
If (accu = dest) then
CF =0, ZF=1, SF=0

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