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APRA: Adaptive Page Replacement Algorithm for NAND Flash Memory Storages
ABSTRACT: This paper presents a new page replacement perform simulation experiments with different types of
algorithm called Adaptive Page Replacement Algorithm (APRA), generated traces. The simulation results showed that APRA
aiming at reducing the number of read, write, and erase reduced the number of read and write operation of flash
operations and thereby improving the performance of NAND memory and outperformed other algorithms in terms of read
flash memory based storage systems. APRA uses a learning rule
and write hit counts, and number of erase operations.
to adaptively and continually revise its parameter in response to
diverse workloads with different access patterns. Experiments The rest of this paper is organized as follows. Section II
through simulation studies showed that the proposed algorithm describes other work related to our study. Section III
performs better than other page replacement algorithms like discusses the details of the proposed APRA. Section IV
LRU, CFLRU, CFLRU/C, LRU-WSR, in terms of read and write describes the performance results of APRA compared to
hit counts, and number of erase operations. LRU, CRLRU, CRLRU/C, and LRU-WSR. Finally, Section
V concludes the paper.
KEYWORDS: NAND flash memory; Buffer management; Page
replacement; Embedded storages; LRU II. RELATED WORK
Buffer caching which has large influence on the
I. INTRODUCTION performance of I/O execution time is of great importance in
Flash memory has been recently adopted as a storage storage systems. DRAM was assumed as the buffer in this
medium in place of the Hard Disk Drive (HDD) for personal paper. It is at least thousand times faster than NAND Flash
computers and mobile embedded systems. Since Flash [1], full read or write cycle is about 100ns, while MLC
memory has versatile advantages compared with traditional NAND Flash costs 60us for read and 800us for write, as
HDDs, including non- volatility, shock-resistance, small and shown in TABLE I.
lightweight form, low power consumption, and solid state
TABLE I. CHARACTERISTICS OF NAND FLASH MEMORY [1]
reliability, its practical application has grown quite beyond
its original design goals. Hence, flash memory based Solid
State Disks (SSD) are expected to substitute for
conventional HDDs in the foreseeable future.
To enhance the performance of storage systems, a
common approach is to use buffer caching. The buffer is
located between the file system and the storage device, and
can reduce the number of read or write requests issued from
the file system to the storage device. Various replacement
algorithms of buffer caching for traditional HDD have been Under the demand paging model, the objective of the
proposed in the last few decades. These algorithms focus on page replacement algorithm is to select a proper victim page
maximizing the read/write hit ratio because of the high which is least likely to be accessed again, and then make it
execution time cost of read/write operations to hard disks. In free. Therefore, the replacement policy is usually the
the flash memory based storage system, read and write algorithm of great interest. In general, we measure a
operations are significantly asymmetric so the buffer replacement policy according to its hit ratio-the fraction of
replacement algorithm for flash memory has to cater to pages that can be served from the physical memory, and its
these characteristics. overhead which should be kept low through low
In this paper, we propose a novel page replacement computation complexity and minimal memory footprints.
algorithm for flash memory called Adaptive Page Various page replacement algorithms have been
Replacement Algorithm (APRA), which not only maintains proposed for traditional disk-based storage systems. LRU
a high hit ratio for read and write requests, but also can (Least Recently Used) is the most common replacement
adaptively revise itself according to different workloads. algorithm because of its simplicity and acceptable hit ratio
APRA is designed based on CFLRU to deal with the in some scenarios. LRU only considers the recency of each
asymmetric replacement cost of read and write operation for page, that is, keeping pages in the memory in order of last
flash memory. At the same time, APRA is able to track the reference time. It always selects the least recently used page
changing of workloads and dynamically adjust a relevant as a victim page when a free page is needed. Since the
parameter to achieve better performance. Below, we performance of LRU in some cases is too poor to satisfy the
12
but yet practical to keep the metadata of the evicted pages. erase operations than CFLRU(/C). On the other hand,
The reference history of evicted pages will contribute to the APRA inevitably had less read hit counts than other
increase of hit ratios, since APRA exploits it to decide the algorithms. However, more write hits and less erase
access pattern of the current workload. Although dirty pages operations will be much more beneficial for the
evicted from L1 have been already written to the flash performance improvement of flash memory whose write and
memory, we still mark these pages as dirty pages in L2 to erase operations are expensive. Since CFLRU does not
indicate the write operations. consider the access frequency of page references, its write
APRA continually revises the parameter w based on the hit counts is much less than CFLRU/C.
observation of the current workload, since an appropriate
4
x 10
13
Similarly, the larger the w is, the larger the decrement q will 1 2 4 8
Buffer Size (MB)
16 32
be.
Suppose a large number of I/O requests mainly (a)
involving write operations come from file system, APRA 2.4
5
x 10
will increase the window size to evict more clean pages for
high write hit ratio. Likewise, window size will decrement 2.2
32
of read and write hits, and erase operations. Buffer Size (MB)
Simulation traces were collected from Windows XP on (b)
NTFS file system using Diskmon for Windows [8]. This 4
tool can record all hard disk activities during running. There
x 10
7
LRU
were two different work tasks for our experiments: Office07 6.9
CFLRU
CFLRU/C
of the buffer cache, and w*L the size of the window for
6.8
Number of Erase Opreations
13
10
4
x 10 access pattern of workload and thus also achieve such
higher read hit counts than other algorithms by 14% at most.
9
On the contrary, CFLRU and CFLRU/C performed a little
8
better than APRA on write hit counts, however, since they
attempted to evict all the clean pages in the window no
Number of Read Hits
7
matter how the current workload was like, the number of
6
read hit even lower than that of common LRU, as shown in
Fig. 3 (a).
5
V. CONCLUSION
4
2
APRA
APRA, which is workload adaptive and self-tuning. APRA
1 2 4 8 16 32
Buffer Size (MB) maintains two LRU lists with considering the access
(a) frequency of page reference and dynamically change the size
of window of the first list depending on tracking the changes
14000
of the workload. We have empirically demonstrated that
ARPA outperforms other algorithms in terms of the number
12000
of read and write hits of buffer, and erase operations of flash
memory.
Since the physical characteristics of flash memory quite
Number of Write Hits
10000
LRU
specific structure based flash memory to improve the overall
4000
CFLRU
CFLRU/C
performance.
LRU-WSR
APRA
2000
1 2 4 8 16 32 REFERENCES
Buffer Size (MB)
(b) [1] Samsun Semiconductor, Inc. Product Selection Guide Memory and
Storage January 2009
9500
LRU
CFLRU [2] Lee, D., J. Choi, et al. (2001). "LRFU: A Spectrum of Policies that
CFLRU/C
LRU-WSR
Subsumes the Least Recently Used and Least Frequently Used
9000
APRA
Policies." IEEE Trans. Comput. 50(12): 1352-1361
[3] Jiang, S. and X. Zhang (2002). LIRS: an efficient low inter-reference
Number of Erase Operations
14