Motor Speed Control through Power line

Abstract

The purpose of a motor speed controller is to take a signal representing the

demanded speed, and to drive a motor at that speed. The controller may or may not
actually measure the speed of the motor. If it does, it is called a Feedback Speed
Controller or Closed Loop Speed Controller, if not it is called an Open Loop Speed
Controller. In a motor speed control, a feedback loop is used to transfer the measured
motor rotational speed information to the controller. The implementation of the feedback
loop requires cabling between the motor and the frequency converter both for signaling
and powering.
However, the motor feeder cable could be used as a medium for data
transmission. A feedback loop that utilizes a motor cable as a communication channel is
researched in this project. The method is applied in this application for the first time. The
data transmission utilizes a standardized power line communications. The applied method
generates an additional latency to the feedback loop and hence, sets some limits to the
performance of a speed controller.

Block Diagram
Transmission Module:

Input
Microcontroll
Keypad er

DC/AC
Power Line Modulation
Converter
Receiver Section

Power Line
Demodulation

AC/DC
Controller Section
Converter

Motor Control unit DC Motor

Advantages: -

• It is used for irrigation

• It is used for Energy saving
• It is used along with home appliances
Explanation: -

The Block diagram of Motor speed control through power line consists of
PIC Micro Controller, Optocoupler and MOSFET Circuit. Here the PIC board
requires 5V DC supply. For that we have used one AC to
DC converter, which is supplying 5V, 12V DC to the PIC board and 12V DC
motor. Then the Speed of the DC motor is controlled through Optocoupler and
MOSFET circuit by using different duty cycle PWM pulse generated by PIC
microcontroller.
System requirement Specification: -

Hardware requirements: -

• PIC 16F877A MICRO CONTROLLER

• BUCK CONVERTER
• DC LOAD
Software requirements: -

• Micro soft XP
• mplab
Circuit Diagram
Features of Opto coupler: -
• Interfaces with Common Logic Families
• Input-output Coupling Capacitance < 0.5 pF
• Industry Standard Dual-in-line 6-pin Package
• Field Effect Stable by TRIOS
• 5300 VRMS Isolation Test Voltage
• Underwriters Laboratory File #E52744
• VDE #0884 Approval Available with Option 1

Description: -
Each optocoupler consists of Gallium Arsenide infrared LED and a silicon
NPN phototransistor. This isolation performance is accomplished through Infineon
double molding isolation manufacturing process. Compliance to VDE 0884 partial
discharge isolation specification is available for these families by ordering option
1. Phototransistor gain stability, in the presence of high isolation voltages, is
insured by incorporating a Transparent on Shield (TRIOS) on the phototransistor
substrate. These isolation processes and the Infineon IS09001 Quality program
results in the highest isolation performance available for a commercial plastic
phototransistor optocoupler. The devices are available in lead formed
configuration suitable for surface mounting and are available either on tape and
reel, or in standard tube shipping containers.
Schematic diagram of Optocoupler: -
 DC Motor: -

In any electric motor, operation is based on simple electromagnetism. A

current-carrying conductor generates a magnetic field; when this is then placed in
an external magnetic field, it will experience a force proportional to the current in
the conductor, and to the strength of the external magnetic field. As you are well
aware of from playing with magnets as a kid, opposite (North and South) polarities
attract, while like polarities (North and North, South and South) repel. The internal
configuration of a DC motor is designed to harness the magnetic interaction
between a current-carrying conductor and an external magnetic field to generate
rotational motion.

Let's start by looking at a simple 2-pole DC electric motor (here red represents a
magnet or winding with a "North" polarization, while green represents a magnet or
winding with a "South" polarization).

Every DC motor has six basic parts -- axle, rotor (a.k.a., armature), stator,
commutator, field magnet(s), and brushes. In most common DC motors (and all
that BEAMers will see), the external magnetic field is produced by high-strength
permanent magnets1. The stator is the stationary part of the motor -- this includes
the motor casing, as well as two or more permanent magnet pole pieces. The rotor
(together with the axle and attached commutator) rotate with respect to the stator.
The rotor consists of windings (generally on a core), the windings being
electrically connected to the commutator. The above diagram shows a common
motor layout -- with the rotor inside the stator (field) magnets.

The geometry of the brushes, commutator contacts, and rotor windings are
such that when power is applied, the polarities of the energized winding and the
stator magnet(s) are misaligned, and the rotor will rotate until it is almost aligned
with the stator's field magnets. As the rotor reaches alignment, the brushes move
to the next commutator contacts, and energize the next winding. Given our
example two-pole motor, the rotation reverses the direction of current through the
rotor winding, leading to a "flip" of the rotor's magnetic field, driving it to
continue rotating.

In real life, though, DC motors will always have more than two poles (three is a
very common number). In particular, this avoids "dead spots" in the commutator.
You can imagine how with our example two-pole motor, if the rotor is exactly at
the middle of its rotation (perfectly aligned with the field magnets), it will get
"stuck" there. Meanwhile, with a two-pole motor, there is a moment where the
commutator shorts out the power supply (i.e., both brushes touch both commutator
contacts simultaneously). This would be bad for the power supply, waste energy,
and damage motor components as well. Yet another disadvantage of such a simple
motor is that it would exhibit a high amount of torque "ripple" (the amount of
torque it could produce is cyclic with the position of the rotor).

So since most small DC motors are of a three-pole design, let's tinker with
the workings of one via an interactive animation (JavaScript required):

You'll notice a few things from this -- namely, one pole is fully energized at
a time (but two others are "partially" energized). As each brush transitions from
one commutator contact to the next, one coil's field will rapidly collapse, as the
next coil's field will rapidly charge up (this occurs within a few microsecond).
We'll see more about the effects of this later, but in the meantime you can see that
this is a direct result of the coil windings' series wiring:

There's probably no better way to see how an average DC motor is put

together, than by just opening one up. Unfortunately this is tedious work, as well
as requiring the destruction of a perfectly good motor.

Luckily for you, I've gone ahead and done this in your stead. The guts of a
disassembled Mabuchi FF-030-PN motor (the same model that Solarbotics sells)
are available for you to see here (on 10 lines / cm graph paper). This is a basic 3-
pole DC motor, with 2 brushes and three commutator contacts.

The use of an iron core armature (as in the Mabuchi, above) is quite common, and
has a number of advantages2. First off, the iron core provides a strong, rigid
support for the windings -- a particularly important consideration for high-torque
motors. The core also conducts heat away from the rotor windings, allowing the
motor to be driven harder than might otherwise be the case. Iron core construction
is also relatively inexpensive compared with other construction types.
But iron core construction also has several disadvantages. The iron armature has a
relatively high inertia which limits motor acceleration. This construction also
results in high winding inductances which limit brush and commutator life.

In small motors, an alternative design is often used which features a 'coreless'

armature winding. This design depends upon the coil wire itself for structural
integrity. As a result, the armature is hollow, and the permanent magnet can be
mounted inside the rotor coil. Coreless DC motors have much lower armature
inductance than iron-core motors of comparable size, extending brush and
commutator life.

Diagram courtesy of MicroMo

The coreless design also allows manufacturers to build smaller motors;

meanwhile, due to the lack of iron in their rotors, coreless motors are somewhat
prone to overheating. As a result, this design is generally used just in small, low-
power motors. BEAMers will most often see coreless DC motors in the form of
pager motors.

INTRODUCTION TO EMBEDDED SYSTEM

An embedded system is a computer system designed to perform one or a

few dedicated functions often with real-time computing constraints. It is
embedded as part of a complete device often including hardware and mechanical
parts. By contrast, a general-purpose computer, such as a personal computer, is
designed to be flexible and to meet a wide range of end-user needs. Embedded
systems control many devices in common use today.

Embedded systems are controlled by one or more main processing cores

that is typically either a microcontroller or a digital signal processor (DSP). The
key characteristic is however being dedicated to handle a particular task, which
may require very powerful processors. For example, air traffic control systems
may usefully be viewed as embedded, even though they involve mainframe
computers and dedicated regional and national networks between airports and
radar sites. (Each radar probably includes one or more embedded systems of its
own.)

Since the embedded system is dedicated to specific tasks, design engineers

can optimize it reducing the size and cost of the product and increasing the
reliability and performance. Some embedded systems are mass-produced,
benefiting from economies of scale.

Physically, embedded systems range from portable devices such as digital

watches and MP3 players, to large stationary installations like traffic lights,
factory controllers, or the systems controlling nuclear power plants. Complexity
varies from low, with a single microcontroller chip, to very high with multiple
units, peripherals and networks mounted inside a large chassis or enclosure.

In general, "embedded system" is not a strictly definable term, as most

systems have some element of extensibility or programmability. For example,
handheld computers share some elements with embedded systems such as the
operating systems and microprocessors which power them, but they allow
different applications to be loaded and peripherals to be connected. Moreover,
even systems which don't expose programmability as a primary feature generally
need to support software updates. On a continuum from "general purpose" to
"embedded", large application systems will have subcomponents at most points
even if the system as a whole is "designed to perform one or a few dedicated
functions", and is thus appropriate to call "embedded".
CHARACTERISTICS

1. Embedded systems are designed to do some specific task, rather than be a

general-purpose computer for multiple tasks. Some also have real-time
performance constraints that must be met, for reasons such as safety and
usability; others may have low or no performance requirements, allowing
the system hardware to be simplified to reduce costs.
2. Embedded systems are not always standalone devices. Many embedded
systems consist of small, computerized parts within a larger device that
serves a more general purpose. For example, the Gibson Robot Guitar
features an embedded system for tuning the strings, but the overall purpose
of the Robot Guitar is, of course, to play music.[5] Similarly, an embedded
system in an automobile provides a specific function as a subsystem of the
car itself.
3. The program instructions written for embedded systems are referred to as
firmware, and are stored in read-only memory or Flash memory chips. They
run with limited computer hardware resources: little memory, small or non-
existent keyboard and/or screen.
PROCESSORS IN EMBEDDED SYSTEMS

Embedded processors can be broken into two broad categories: ordinary

microprocessors (μP) and microcontrollers (μC), which have many more
peripherals on chip, reducing cost and size. Contrasting to the personal computer
and server markets, a fairly large number of basic CPU architectures are used;
there are Von Neumann as well as various degrees of Harvard architectures, RISC
as well as non-RISC and VLIW; word lengths vary from 4-bit to 64-bits and
beyond (mainly in DSP processors) although the most typical remain 8/16-bit.
Most architectures come in a large number of different variants and shapes, many
of which are also manufactured by several different companies.

PERIPHERALS

Embedded Systems talk with the outside world via peripherals, such as:
 • Serial Communication Interfaces (SCI): RS-232, RS-422, RS-485 etc
• Synchronous Serial Communication Interface: I2C, SPI, SSC and ESSI
(Enhanced Synchronous Serial Interface)
• Universal Serial Bus (USB)
• Multi Media Cards (SD Cards, Compact Flash etc)
• Networks: Ethernet, Controller Area Network, LonWorks, etc
• Timers: PLL(s), Capture/Compare and Time Processing Units
• Discrete IO: aka General Purpose Input/Output (GPIO)
• Analog to Digital/Digital to Analog (ADC/DAC)
• Debugging: JTAG, ISP, ICSP, BDM Port, BITP DP9 port ...

EMBEDDED SOFTWARE ARCHITECTURES

There are several different types of software architecture in common use.

Simple control loop

In this design, the software simply has a loop. The loop calls subroutines,
each of which manages a part of the hardware or software.

Interrupt controlled system

Some embedded systems are predominantly interrupt controlled. This

means that tasks performed by the system are triggered by different kinds of
events. An interrupt could be generated for example by a timer in a predefined
frequency, or by a serial port controller receiving a byte.

These kinds of systems are used if event handlers need low latency and the
event handlers are short and simple.
 Usually these kinds of systems run a simple task in a main loop also, but
this task is not very sensitive to unexpected delays.

Sometimes the interrupt handler will add longer tasks to a queue structure.
Later, after the interrupt handler has finished, these tasks are executed by the main
loop. This method brings the system close to a multitasking kernel with discrete
processes.

Cooperative multitasking

A nonpreemptive multitasking system is very similar to the simple control

loop scheme, except that the loop is hidden in an API. The programmer defines a
series of tasks, and each task gets its own environment to “run” in. When a task is
idle, it calls an idle routine, usually called “pause”, “wait”, “yield”, “nop” (stands
for no operation), etc.

The advantages and disadvantages are very similar to the control loop,
except that adding new software is easier, by simply writing a new task, or adding
to the queue-interpreter.

Preemptive multitasking or multi-threading

In this type of system, a low-level piece of code switches between tasks or

threads based on a timer (connected to an interrupt). This is the level at which the
system is generally considered to have an "operating system" kernel. Depending
on how much functionality is required, it introduces more or less of the
complexities of managing multiple tasks running conceptually in parallel.

As any code can potentially damage the data of another task (except in
larger systems using an MMU) programs must be carefully designed and tested,
and access to shared data must be controlled by some synchronization strategy,
such as message queues, semaphores or a non-blocking synchronization scheme.

Because of these complexities, it is common for organizations to buy a real-

time operating system, allowing the application programmers to concentrate on
device functionality rather than operating system services, at least for large
systems; smaller systems often cannot afford the overhead associated with a
generic real time system, due to limitations regarding memory size, performance,
and/or battery life.
INTRODUCTION TO PIC MICROCONTROLLER:

FEATURES:

High-Performance RISC CPU:

• Only 35 single-word instructions to learn

• All single-cycle instructions except for program branches, which are two-cycle
• Operating speed: DC – 20 MHz clock input DC – 200 ns instruction cycle
• Up to 8K x 14 words of Flash Program Memory, Up to 368 x 8 bytes of Data
Memory (RAM), Up to 256 x 8 bytes of EEPROM Data Memory
• Pin out compatible to other 28-pin or 40/44-pin PIC16CXXX and PIC16FXXX
microcontrollers

Peripheral Features:

• Timer0: 8-bit timer/counter with 8-bit prescaler

• Timer1: 16-bit timer/counter with prescaler, can be incremented during Sleep via
external crystal/clock
• Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler
• Two Capture, Compare, PWM modules
- Capture is 16-bit, max resolution is 12.5 ns
- Compare is 16-bit, max resolution is 200 ns
- PWM max resolution is 10-bit
• Synchronous Serial Port (SSP) with SPI™ (Master mode) and I2C™
(Master/Slave)
• Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with
9-bit address detection
• Parallel Slave Port (PSP) – 8 bits wide with external RD, WR and CS controls
(40/44pin only)
• Brown-out detection circuitry for Brown-out Reset (BOR)

Analog Features:

• 10-bit, up to 8-channel Analog-to-Digital converter (A/D)

• Brown-out Reset (BOR)
• Analog Comparator module with:
- Two analog comparators
- Programmable on-chip voltage reference (VREF) module
- Programmable input multiplexing from device inputs and internal voltage
reference
- Comparator outputs are externally accessible

Special Microcontroller Features:

• 100,000 erase/write cycle Enhanced Flash program memory typical

• 1,000,000 erase/write cycle Data EEPROM memory typical
• Data EEPROM Retention > 40 years
• Self-reprogrammable under software control
• In-Circuit Serial Programming™ (ICSP™) via two pins
• Single-supply 5V In-Circuit Serial Programming
• Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable
operation
• Programmable code protection
• Power saving Sleep mode
• Selectable oscillator options
• In-Circuit Debug (ICD) via two pins
CMOS Technology:

• Low-power, high-speed Flash/EEPROM technology

• Fully static design
• Wide operating voltage range (2.0V to 5.5V)
• Commercial and Industrial temperature ranges
• Low-power consumption

PIN DIAGRAM:
Features of PIC Series
Status Register
MEMORY ORGANIZATION

There are three memory blocks in each of the PIC16F87XA devices. The
program memory and data memory have separate buses so that concurrent access
can occur and is detailed in this section

Program Memory Organization

The PIC16F87XA devices have a 13-bit program counter capable of

addressing an 8K word x 14 bit program memory space. The PIC16F876A/877A
devices have 8K words x 14 bits of Flash program memory, while
PIC16F873A/874A devices have 4K words x 14 bits. Accessing a location above
the physically implemented address will cause a wraparound. The Reset vector is
at 0000h and the interrupt vector is at 0004h.
FIGURE PIC16F876A/877A FIGURE
PIC16F873A/874A
PROGRAM MEMORY MAP PROGRAM
MEMORY MAP
AND STACK AND STACK
REGISTER FILE MAP:
I/O PORTS

Some pins for these I/O ports are multiplexed with an alternate function for
the peripheral features on the device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.

PORTA and the TRISA Register:

PORTA is a 6-bit wide, bidirectional port. The corresponding data direction

register is TRISA. Setting a TRISA bit (= 1) will make the corresponding PORTA
pin an input (i.e., put the corresponding output driver in a High-Impedance mode).
Clearing a TRISA bit (= 0) will make the corresponding PORTA pin an output
(i.e., put the contents of the output latch on the selected pin). Reading the PORTA
register reads the status of the pins, whereas writing to it will write to the port
latch. All write operations are read-modify-write operations. Therefore, a write to
a port implies that the port pins are read, the value is modified and then written to
the port data latch. Pin RA4 is multiplexed with the Timer0 module clock input to
become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and
an open-drain output. All other PORTA pins have TTL input levels and full
CMOS output drivers. Other PORTA pins are multiplexed with analog inputs and
the analog VREF input for both the A/D converters and the comparators. The
operation of each pin is selected by clearing/setting the appropriate control bits in
the ADCON1 and/or CMCON registers. The TRISA register controls the direction
of the port pins even when they are being used as analog inputs. The user must
ensure the bits in the TRISA register are maintained set when using them as
analog inputs.
INITIALIZING PORTA

BLOCK DIAGRAM OF RA3:RA0 PINS

BLOCK DIAGRAM OF RA4/T0CKI PIN

BLOCK DIAGRAM OF RA5 PIN

PORTB and the TRISB Register

PORTB is an 8-bit wide, bidirectional port. The corresponding data

direction register is TRISB. Setting a TRISB bit (= 1) will make the corresponding
PORTB pin an input (i.e., put the corresponding output driver in a High-
Impedance mode). Clearing a TRISB bit (= 0) will make the corresponding
PORTB pin an output (i.e., put the contents of the output latch on the selected
pin). Three pins of PORTB are multiplexed with the In-Circuit Debugger and
Low-Voltage Programming function: RB3/PGM, RB6/PGC and RB7/PGD. The
alternate functions of these pins are described in Section 14.0 “Special Features
of the CPU”. Each of the PORTB pins has a weak internal pull-up. A single
control bit can turn on all the pull-ups. This is performed by clearing bit RBPU
(OPTION_REG<7>). The weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are disabled on a Power-on Reset.
Four of the PORTB pins, RB7:RB4, have an interrupton- change feature. Only
pins configured as inputs can cause this interrupt to occur (i.e., any RB7:RB4 pin
configured as an output is excluded from the interrupton- change comparison).
The input pins (of RB7:RB4) are compared with the old value latched on the last
read of PORTB. The “mismatch” outputs of RB7:RB4
are OR’ed together to generate the RB port change interrupt with flag bit RBIF
(INTCON<0>).
This interrupt can wake the device from Sleep. The user, in the Interrupt Service
Routine, can clear the interrupt in the following manner:

a) Any read or write of PORTB. This will end the mismatch condition.

b) Clear flag bit RBIF. A mismatch condition will continue to set flag bit
RBIF.Reading PORTB will end the mismatch condition and allow flag bit RBIF
to be cleared. The interrupt-on-change feature is recommended for wake-up on
key depression operation and operations where PORTB is only used for the
interrupt-on-change feature. Polling of PORTB is not recommended while using
the interrupt-on-change feature.

BLOCK DIAGRAM OFRB3:RB0 PINS BLOCK DIAGRAM OF

RB7:RB4 PINS
PORTB FUNCTIONS
 SUMMARY OF REGISTERS ASSOCIATED WITH PORTB

PORTC and the TRISC Register

 PORTC is an 8-bit wide, bidirectional port. The corresponding data
direction register is TRISC. Setting a TRISC bit (= 1) will make the corresponding
PORTC pin an input (i.e., put the corresponding output driver in a High-
Impedance mode). Clearing a TRISC bit (= 0) will make the corresponding
PORTC pin an output (i.e., put the contents of the output latch on the selected
pin). PORTC is multiplexed with several peripheral functions (Table 4-5). PORTC
pins have Schmitt Trigger input buffers. When the I2C module is enabled, the
PORTC<4:3> pins can beconfigured with normal I2C levels, or with SM Bus
levels, by using the CKE bit (SSPSTAT<6>). When enabling peripheral functions,
care should be taken in defining TRIS bits for each PORTC pin. Some peripherals
override the TRIS bit to make a pin an output, while other peripherals override the
TRIS bit to make a pin an input. Since the TRIS bit override is in effect while the
peripheral is enabled, read-modifywrite instructions (BSF, BCF, XORWF) with
TRISC as the destination, should be avoided. The user should refer to the
corresponding peripheral section for the correct TRIS bit settings.

PORTC BLOCK DIAGRAM

PORTC FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTC

PORTD and TRISD Registers

PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is
individually configurable as an input or output. PORTD can be configured as an 8-
bit wide microprocessor port (Parallel Slave Port) by setting control bit,
PSPMODE (TRISE<4>). In this mode, the input buffers are TTL.
 PORTD BLOCK DIAGRAM
(IN I/O PORT MODE)

PORTD FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD

PORTE and TRISE Register

PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6 and RE2/CS/AN7)

which are individually configurable as inputs or outputs. These pins have Schmitt
Trigger input buffers. The PORTE pins become the I/O control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is set. In this mode, the
user must make certain that the TRISE<2:0> bits are set and that the pins are
configured as digital inputs. Also, ensure that ADCON1 is configured for digital
I/O. In this mode, the input buffers are TTL. Register 4-1 shows the TRISE
register which also controls the Parallel Slave Port operation. PORTE pins are
multiplexed with analog inputs. When selected for analog input, these pins will
read as ‘0’s. TRISE controls the direction of the RE pins, even when they are
being used as analog inputs. The user must make sure to keep the pins configured
as inputs when using them as analog inputs.

PORTE BLOCK DIAGRAM (IN I/O PORT MODE)

Coding Using Embedded C: -