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These variables are sometimes referred to as true (1) and false (0).
This convention is normally referred to as positive logic.
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Truth Table
Analysis of logic functions, that is, functions of logical (Boolean)
variables, can be carried out in terms of truth tables. A truth table is a
listing of all the possible values each of the Boolean variables can take,
and of the corresponding value of the function.
The rules that define a logic function are often represented in tabular
form by means of a truth table
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NAND and NOR Gates
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UNIVERSAL GATES
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UNIVERSAL GATES
Inverter using NOR AND using NOR
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XOR (Exclusive OR) Gate
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De Morgan’s theorems
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The importance of De Morgan’s laws is in the statement of the duality
that exists between AND and OR operations: any function can be realized
by just one of the two basic operations, plus the complement operation.
This gives rise to two families of logic functions: sums of products and
product of sums.
Any logical expression can be reduced to either one of these two forms.
Although the two forms are equivalent, it may well be true that one of
the two has a simpler implementation (fewer gates).
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Sum of Products (SOP) and Product of Sums (POS)
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How to write a function
Minterms present in f (output function) correspond with the 1’s of f in
the truth table.
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Example
Output can be
1or 0.
1 – is
represented by
product of
inputs.
0 – is
represented by
sum of inputs.
Maxterm
A B C Maxterm
– Sum (OR function)
0 0 0 0 M0 A B C
– Contains all variables
1 0 0 1 M1 A B C
– Evaluates to ‘0’ for a
2 0 1 0 M2 A B C
specific combination
3 0 1 1 M3 A B C
Example
4 1 0 0 M4 A B C
A=1 A B C
5 1 0 1 M5 A B C
B=1 (1) + (1) + (1)
6 1 1 0 M6 A B C
C=1
0 + 0 + 0=0 7 1 1 1 M7 A B C
Canonical Forms
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Canonical Forms
Sum of Minterms
A B C F F
F ABC ABC ABC ABC 0 0 0 0 0 1
1 0 0 1 1 0
F m1 m4 m5 m7
2 0 1 0 0 1
F (1,4,5,7)
3 0 1 1 0 1
• Product of Maxterms 4 1 0 0 1 0
F ABC ABC ABC ABC 5 1 0 1 1 0
F ABC ABC ABC ABC 6 1 1 0 0 1
7 1 1 1 1 0
F ABC ABC ABC ABC
F ( A B C )( A B C )( A B C )( A B C )
F M0 M2 M3 M6
F (0,2,3,6)
Standard Forms
Sum of Products (SOP)
AB(C C )
AB(1)
F ABC ABC ABC ABC
AB
AC ( B B)
AC
BC ( A A)
BC
F BC ( A A) AB(C C ) AC ( B B)
F BC AB AC
Standard Forms
Product of Sums (POS)
AB(C C )
BC ( A A)
AC ( B B)
F AC ( B B) AB(C C ) BC ( A A)
F AC AB BC
F ( A C )( A B)( B C )
Two - Level Implementations
F BC AB AC A
B’ F
Product of Sums (POS) A
C
A
C
A
F ( A C )( A B)( B C ) B’ F
B’
C
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Proof
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Exercise:
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Exercise:
Simplify:
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Exercise:
Simplify
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Exercise:
1.
2.
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Exercise in Boolean Algebra
1. Determine the logic expression for the output Y, from the truth table
shown. Simplify and sketch the logic circuit for the simplified expression.
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3. Simplify the following Boolean expression and draw the logic circuits
for the simplified expressions.
a)
a) B+AC
b) C+AB’
c) AB+CD
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Exercise:
Simplify
F= ((AB)’ + (AC)’)’
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Exercise:
Simplify
1) F= (A+B).(A+B)’ = 0
2) F= A.B + (A.B)’ = 1
3) F= (A+B.C’).(A+B.C’) =A+B
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Exercise in Boolean Algebra
5. Determine the Boolean expression for the logic circuit shown in Fig.
Simplify the Boolean expression using Boolean Laws and De Morgan’s
theorem. Redraw the logic circuit using the simplified Boolean
expression.
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Minimization Technique
Logic Minimization: reduce complexity of the gate level implementation
TABULATION METHOD
(Quine-McCluskey Method)
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Karnaugh map
The Karnaugh map (or simply a K-map) is similar to a truth table because it presents
all the possible values of input variables and the resulting output for each value.
The K-map is an array of squares (or cells) in which each square represents a binary
value of the input variables.
The number of squares in a Karnaugh map is equal to (2n) the total number of
possible input variable combinations (i.e number of squares is equal to the number of
rows in a truth table).
Indicate the input variables along the sides of the K-map. The binary values of input
variables are arranged based on gray code.
Ex. for two variables, the number of square is 22 = 4, for three variables, the
number of squares is 23 = 8 and for four variables, the number of squares is 24 = 16.
Truth Table K-map
A B Z Minterm
0 0 0 A’B’
0 1 1 A’B
1 0 1 AB’
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Manual Logic reduction K-map
Disadvantages: Advantages:
Finding the suitable pair of terms is In every two adjacent cells, one of the
difficult. variables has 1 and 0.
If the suitable terms are not paired, it All minterms which differ by one
will lead to long reduction process. variable are in adjacent cells.
Through grouping, the changing
variable mapped by the loop can be
eliminated.
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Two, Three and Four variable Karnaugh map and Minterms
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2-variable K-map 3-variable K-map
0 1
2 3
4-variable K-map
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Procedure in K-map
Ex.
Step-2: Find the cells in K-map corresponding to the minterms. Enter 1’s
in that cells.
Step-3: Group 1’s in the adjacent cells. Look for largest possible loop.
(8 cell, 4 cell, 2 cell).
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Rules for Grouping adjacent cells containing ones
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Rules for Grouping adjacent cells containing ones
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3. Groups must contain 1, 2, 4, 8, or in general 2n cells.
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4. Each group should be as large as possible.
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6. Groups may overlap.
7. Groups may wrap around the table. The leftmost cell in a row may be grouped with
the rightmost cell and the top cell in a column may be grouped with the bottom cell.
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8. There should be as few groups as possible, as long as this does not contradict any of
the previous rules.
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Writing the logic function after grouping
Write the mintems corresponding to each loop by omitting the changing
variables.
for example A is a changing variable in red loop
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Mapping a Standard SOP Expression on the Karnaugh Map
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Mapping a Nonstandard SOP Expression on the Karnaugh Map
(Factorizing)
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Exercise:
Simplify the following SOP expression using the Karnaugh mapping
procedure :
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Exercise:
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Exercise:
Shows a Karnaugh map of a sum-of-products (SOP) function. Determine
the simplified SOP function.
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Mapping Directly on Karnaugh Map from a Truth Table
Exercise:
Implement the following Boolean expression using minimum number of 3-
input NAND gates.
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Exercise:
Consider a logic circuit with 4 input variables in which the output is high
when at least 3 inputs are high. Reduce the logic function using K-map.
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Exercise: Reduce the expression F = Σm(0,1,2,3,6,7,13,15) by mapping and
implement in NAND logic.
CD 00 01 11 10
AB
Group I = A’B’C’D’ A’B’C’D A’B’CD A’B’CD’
00 1 1 1 1 = A’B’
0 1 3 2
A’
B’
A’ F = A’B’+A’C+ABD
A
B
D
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1. Simplify the Boolean function
F(x, y, z) = (0, 2, 4, 5, 6)
Ans: Z’+XY’
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Exercise:
Simplify the Boolean function
yz
wx 00 01 11 10
0 1 3 2
00
4 5 7 6
01
12 13 15 14
11
8 9 11 10
10
4 5 7 6
01
12 13 15 14
11
8 9 11 10
10
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Exercise: Simplify the following Boolean functions
CD 2. F(A, B, C, D) = (0,1,2,5,8,9,10)
AB 00 01 11 10
0 1 3 2 CD
00 1 1 1 AB 00 01 11 10
0 1 3 2
4 5 7 6 00 1 1 1
01 1 1
4 5 7 6
11 13 15 14 01 1
11 1 1
11 13 15 14
8 9 11 10 11
10 1 1 1 1
8 9 11 10
10 1 1 1
F = BD + B' D' + CD + AD
= BD + B' D' + CD + AB'
= BD + B' D' + B' C + AD
= BD + B' D' + B' C + AB' F = B'D' + B'C' + A'C'D
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Exercise:
CD
AB 00 01 11 10
0 1 3 2
00 1 1 1
4 5 7 6
01 1 1 1
12 13 15 14
11 1 1
8 9 11 10
10 1 1 1
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Exercise:
CD
AB 00 01 11 10
0 1 3 2
00
4 5 7 6
01
12 13 15 14
11
8 9 11 10
10
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