VIGNAN’S INSTITUTE OF MANAGEMENT AND TECHNOLOGY

FOR WOMEN
kondapur(V), Ghatkesar(M), Medchal Dist-501301
Department of Electronics and Communication Engineering

SPIN RAM TECHNOLOGY

Name P.NANDINI
H.T.No. 17UP1A0430
Year 4TH Section ECE - A
Email ID Nandinipalvai54@gmail.com
Cell No. 8247439040

ABSTRACT

i) Objective : Spin Memory is using MRAM to solve the scaling and power
problems of today's memories. Our patented technologies enable STT-MRAM to
cost-effectively replace DRAM and SRAM with a denser, lower-power and non-
volatile solution.

ii) Introduction : In this paper, the paper propose a new non-volatile FPGA
circuit based on spin-RAM technology (spin transfer torque magnetisation
switching RAM), new generation of MRAM (magnetic RAM). This spin-RAM
based FPGA circuit could process securely the information in low power
dissipation and high speed; meanwhile all the data processed are stored
permanently in the distributed spin-RAM memory. In this non-volatile FPGA
design, MTJs (magnetic tunnel junction) are used as storage elements. Contrary
to conventional MRAM circuits we don't use a complex sense amplifier, but a
simple SRAM based sense amplifier couples two MTJs per bit. The non-volatility
of spin-RAM allows the dynamical configuration of FPGA circuits and the start-
up time of circuit can be decreased up to some hundred pico seconds. As
conventional MRAM, the MTJs of spin-RAM will be on the semiconductor
surface; therefore the circuit die area will not be enlarged comparing with the
conventional FPGA

iii) Description : In the last 10 years, FPGA[1] circuits have developed rapidly,
because of their configurability, their easy use and the low cost to design a
function on them. However, the internal memories used in FPGA circuits could
limit their future development. Most FPGA circuits use SRAM based
configuration [2] and Flip-Flop [3] as internal memory; but as the SRAM is
volatile both their configuration and the information stored in their internal
registers are lost when the power is turned down. The configuration is then
stored in an external PROM and downloaded in the FPGA at startup. Internal
Flash technology is now sometime used to replace the external memory [4],
however its slow reprogramming and its limited number of writing cycles (up to
106) prevent its application to replace the SRAM based internal registers, which
work at very high frequency [3]. High writing and reading speed makes Spin-
RAM (Spin Transfer Torque Magnetization RAM) technology [5] as one of the
best solutions to bring a complete non-volatility to FPGA circuits while keeping
low power dissipation. A MTJ (Magnetic Junction Tunnel), as Spin-RAM
storage element, can be re-programmed more than 1012 times and has a large
retention time of up to 10 years. A lot of progress of this memory in the
technology has been done, especially by Sony [6], Hitachi [7] and Samsung [8] in
the last years.
Conventional FIMS (Field induced Magnetic Switching) writing approach based
MRAM [9-11] technology has been proposed to implement the non-volatile
configuration [12] and non-volatile register [13] in FPGA; however the die area
of this FPGA circuit is much larger than the classical FPGA circuit, because the
conventional MRAM technology need large current to write the information in
the MTJs and then requires some large transistors. Spin-RAM is based on Spin
Transfer Torque Magnetization writing approach, which figures low writing
current [7]. As the MTJs are processed over the chip surface [9], shown in Fig.
1.1,and they are in very small size (e.g. 100nm×80nm), Spin-RAM based FPGA
circuit does not take more die area than the classical FPGA and the actual layout
of semiconductor circuit is barely affected, by the non-volatile property addition.
Figure 1.1 the position of MTJs

In this, we introduce firstly the Spin-RAM in the second section; the three Spin-
RAM based logic components are shown in the third section and the
performance comparison between the Spin-RAM based FPGA, MRAM based
FPGA and SRAM based FPGA is presented in the fourth third section.

iv) Conclusion : This Spin-RAM based FPGA features simultaneously

non-volatility, high processing speed and low power dissipation. Multi-context
configuration or dynamical re-configuration FPGA can be implemented easily an
with small physical surface overhead, therefore it could be a technological choice
in multi functions processing circuit, such as MP3 player or Mobile phones. The
Spin-RAM based Flip-Flop can also be used to replace all the registers in SOC
(System-on-chip) to make these chips non-volatile and secure. Therefore it could
be advantageously used in the field of aviation and space where the security of
information is one of the most important considerations.