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HIGH-PERFORMANCE IDT54/74FCT861A/B
CMOS BUS IDT54/74FCT863A/B
TRANSCEIVERS
Integrated Device Technology, Inc.
FEATURES: DESCRIPTION:
• Equivalent to AMD’s Am29861-64 bipolar registers in The IDT54/74FCT800 series is built using an advanced
pinout/function, speed and output drive over full tempera- dual metal CMOS technology.
ture and voltage supply extremes The IDT54/74FCT860 series bus transceivers provide
• IDT54/74FCT861A/863A equivalent to FAST speed high-performance bus interface buffering for wide
• IDT54/74FCT861B/863B 25% faster than FAST data/address paths or buses carrying parity. The
• High-speed symmetrical bidirectional transceivers IDT54/74FCT863 9-bit transceivers have NAND-ed output
• IOL = 48mA (commercial) and 32mA (military) enables for maximum control flexibility.
• Clamp diodes on all inputs for ringing suppression All of the IDT54/74FCT800 high-performance interface
• CMOS power levels (1mW typ. static) family are designed for high-capacitance load drive capability
• TTL input and output level compatible while providing low-capacitance bus loading at both inputs
• CMOS output level compatible and outputs. All inputs have clamp diodes and all outputs are
• Substantially lower input current levels than AMD’s designed for low-capacitance bus loading in the high- im-
bipolar Am29800 Series (5µA max.) pedance state.
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
2610 drw 01
PIN CONFIGURATIONS
IDT54/74FCT861 10-BIT TRANSCEIVERS
OER
Vcc
NC
INDEX
R1
R0
T0
T1
OER 1 24 Vcc
23 4 3 2 28 27 26
R0 2 T0 R2 5
1
25 T2
R1 3 22 T1
R2 4 P24-1, 21 T2 R3 6 24 T3
R3 5 D24-1, 20 T3 R4 7 23 T4
E24-1 NC 8
L28-1 22 NC
R4 6 19 T4
&
R5 7 SO24-2 18 T5 R5 9 21 T5
R6 8 17 T6 R6 10 20 T6
R7 9 16 T7 R7 11 19 T7
R8 10 15 T8 12 13 14 15 16 17 18
R9 11 14 T9
GND
T9
T8
OET
R8
R9
NC
GND 12 13 OET
DIP/CERPACK/SOIC LCC
TOP VIEW TOP VIEW
OER
Vcc
NC
INDEX
R1
R0
T0
T1
OER 1 1 24 Vcc
4 3 2 28 27 26
R0 2 23 T0 R2 5 25 T2
R1 3 22 T1 1
P24-1, 21
R3 6 24 T3
R2 4 T2
D24-1, R4 7 23 T4
R3 5 20 T3 L28-1
E24-1 19 NC 8 22 NC
R4 6
& T4
R5 7 SO24-2 18 T5 R5 9 21 T5
R6 8 17 T6 R6 10 20 T6
R7 9 16 T7 R7 11 19 T7
15 12 13 14 15 16 17 18
R8 10 T8
OER 2 11 14 OET 2
T8
R8
OER 2
OET 1
OET 2
GND
NC
2610 drw 02
GND 12 13 OET 1
DIP/CERPACK/SOIC LCC
TOP VIEW TOP VIEW
LOGIC SYMBOLS
IDT54/74FCT861 IDT54/74FCT863
OET OET 1
OET 2
10 10
R T 9 9
R T
OER OER 1
7.23 2
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.23 3
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.23 4
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.23 5
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.23 6
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA 3V
INPUT 1.5V
tSU tH 0V LOW-HIGH-LOW
3V PULSE 1.5V
TIMING
INPUT 1.5V
0V tW
ASYNCHRONOUS CONTROL
PRESET tREM
3V
CLEAR 1.5V HIGH-LOW-HIGH 1.5V
ETC. 0V PULSE
SYNCHRONOUS CONTROL
PRESET 3V
CLEAR 1.5V
tSU tH 0V
CLOCK ENABLE
ETC.
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
7.23 7
IDT54/74FCT861A/B, IDT54/74FCT863A/B
HIGH-PERFORMANCE CMOS BUS TRANSCEIVERS MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
Blank Commercial
B MIL-STD-883, Class B
P Plastic DIP
D CERDIP
E CERPACK
L Leadless Chip Carrier
SO Small Outline IC
54 -55°C to +125°C
74 0° to +70°C 2610 drw 04
7.23 8
This datasheet has been downloaded from:
www.DatasheetCatalog.com