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9/6/2020 |Dr. Arvind Kumar| https://sites.google.com/view/arvindk 2
9/6/2020 |Dr. Arvind Kumar| https://sites.google.com/view/arvindk 3
Bandpass System-I
(BASK, BFSK,
Error performance
BPSK, QPSK, MSK)
OUTCOME: Describe the mathematical model of a digital modulation technique, characterize the effect
of AWGN channel and determine its bit error rate performance.
9/6/2020 |Dr. Arvind Kumar| https://sites.google.com/view/arvindk 4
Bandpass Modulation and Demodulation
• Bandpass Modulation is the process by which some characteristics of a sinusoidal
waveform is varied according to the message signal.
• Modulation shifts the spectrum of a baseband signal to some high frequency.
• Demodulator/Decoder baseband waveform recovery
Baseband
Data
1 0 0 1 0
ASK
modulated
signal
Acos(t) Acos(t)
Baseband
Data
1 0 0 1
BFSK
modulated
signal
f1 f0 f0 f1
where f0 =Acos(c-)t and f1 =Acos(c+)t
• Example: The ITU-T V.21 modem standard uses FSK
• FSK can be expanded to a M-ary scheme, employing multiple
frequencies as different states
Baseband
Data
1 0 0 1
BPSK
modulated
signal
s1 s0 s0 s1
where s0 =-Acos(ct) and s1 =Acos(ct)
• Major drawback – rapid amplitude change between symbols due to phase
discontinuity, which requires infinite bandwidth. Binary Phase Shift Keying
(BPSK) demonstrates better performance than ASK and BFSK
• BPSK can be expanded to a M-ary scheme, employing multiple phases and
amplitudes as different states
“1”
“0”
Average energy per bit (On-off signaling)
s2 s1
“1”
“0”
Average energy per bit (On-off signaling)
s2 s1
The clock frequency at the transmitter when matches with the clock frequency at the receiver, it
is known as a Synchronous method, as the frequency gets synchronized.
Otherwise, it is known as Asynchronous.
• The modulated ASK signal is given to the half-wave rectifier, which delivers a positive half
output.
• The low pass filter suppresses the higher frequencies and gives an envelope detected output
from which the comparator delivers a digital output.
9/6/2020 |Dr. Arvind Kumar| https://sites.google.com/view/arvindk 29
Synchronous ASK Demodulator
• Synchronous ASK detector consists of a Square law detector, low pass filter, a comparator, and
a voltage limiter. Following is the block diagram for the same.
• The ASK modulated input signal is given to the Square law detector.
• A square law detector is one whose output voltage is proportional to the square of the
amplitude modulated input voltage.
• The low pass filter minimizes the higher frequencies. The comparator and the voltage limiter
help to get a clean digital output.
“1”
“0”
, bit duration
: carrier frequency, chosen to be for some fixed
integer or fc 1/ Tb
: transmitted signal energy per bit, i.e.
with
Then and
0 s1
s2
r r
0
s2 s1
Decision rule:
Guess signal (or binary 1) was transmitted if the
received signal point r falls in region R1
Guess signal (or binary 0) was transmitted otherwise
Due to symmetry
r
0
depends on ratio
Carrier wave
Rectangular
pulse
Threshold
demodulator detector
“1”
0 1 1 0 1 0 0 1
“0”
(Example?)
9/6/2020 |Dr. Arvind Kumar| https://sites.google.com/view/arvindk 42
When would s1 and s2 be orthogonal?
Message
point
Message point
Tb
0
dt
+ Choose 1 if l>0
Decision
+ Device Choose 0 otherwise
-
Tb
0
dt
Exercise: Prove Pe
In general,
We now consider:
Non-coherent detection on binary FSK
Differential phase-shift keying (DPSK)
9/6/2020 |Dr. Arvind Kumar| https://sites.google.com/view/arvindk 58
System Design Tradeoff
Which Modulation to Use ?