VR4101ª (mPD30101)

64-Bit RISC Microprocessor

NEC Electronics Inc. for Windows CEª
Product Brief June 1997

Description
The VR4101 (mPD30101) RISC microprocessor is a member of NECÕs VR Seriesª of devices
created for Windows CE handheld computer applications. Designed around the RISC
architecture developed by MIPS¨, the device offers the best power and performance in a high-
integration, low-cost system on a chip. This 64-bit microprocessor mainly consists of the ultra-
low-power, 33-MHz VR4100 CPU core (containing cache memory, multiply-and-accumulate
unit, and memory management unit ), power management unit, DMA unit, interrupt control
unit, timers, real-time clock, serial interface, keyboard interface, IrDA¨ interface, and touch-
panel interface.
The VR4101 microprocessor is compatible with MIPS I, II, and III instruction set architectures
(ISAs). Since it does not have a floating-point unit, none of the FLU, LL, LLD, SC and SCD
instructions are supported. It has an optimized five-stage pipeline, 2K instruction cache, 1K
data cache, and 32 double-entry translation lookaside buffers (TLBs) that enable high
performance in a compact low-cost chip. The VR4101 microprocessorÕs high speed, compact
size, and low power make it ideal for use in battery-driven, portable handheld systems.

Block Diagram

General-Purpose
Clock Clock I/O Unit
PLL Real-Time
Generator Driver
Clock
Audio
Interface Unit
PCMCIA Power
Controller Management Unit
Keyboard
Interface Unit
Interrupt
VR4100 CPU Core Control Unit
LCD Touch-Panel A/D
Controller Interface Unit Converter
DMA
Control Unit
Debug
ROM Memory
Management Unit
Serial
Interface Unit

DRAM IrDA IR
Bus Control Unit Driver

RS232C
Driver

97YL-0039C (3/97)

VR4101 and V R Series is a trademark of NEC Corporation.

IrDA is a registered trademark of Infrared Data Association.
Windows and Windows CE are either registered trademarks or trademarks of Microsoft Corporation
in the United States and/or other countries.
MIPS is a registered trademark of MIPS Group, a division of Silicon Graphics, Inc.

U11815EU3V0PB00
VR4101 MIPS RISC Microprocessor

Description (cont.)
With most of the peripherals required for a handheld computer application already integrated
into the VR4101 microprocessor, customers only need a few additional components to form a
complete system.
Handheld Computer Application

RAM General-Purpose I/O (Port Control)

ROM
LCD Panel
VR4101
Keyboard
Matrix

10-bit A/D
Converter

Touch Panel
IR Module

PCMCIA RS232C Driver

Controller Driver Circuit

PC
Card
COM Port
97YL-0148C (06/97)

2
 VR4101 MIPS RISC Microprocessor

Features
❐ V R4100 CPU core (awarded the best MIPS/
Watt at Microprocessor Forum, 1995)
Ñ MIPS I, II, and III instruction sets without
FPU, LL, LLD, SC, and SCD
instructions
Ñ Five-stage pipeline running at 33 MHz
Ñ Single-cycle multiply-and-accumulate
(MAC) instruction for DSP operations
❐ Memory management unit
Ñ 32-bit physical addressing range of 4 GB
with 40-bit virtual address space
Ñ 32 double-entry TLBs support 1-256K
page size
Ñ Supports up to 8 MB DRAM and 16 MB
flash/mask ROM
❐ Real-time clock with built-in timers
❐ Interrupt control unit: supports both internal
and external interrupts
❐ DMA address unit and DMA control unit:
controls five different DMA channels
❐ General-purpose I/O unit: controls 12
GPIO pins
❐ Keyboard (64-key) and touch-panel interface
❐ Serial interface unit
Ñ Complies with RS-232C specification
Ñ Supports up to 115 Kb/s with separate
debug serial port
❐ Infrared unit: performs 0.5 to 115 Kb/s IrDA
1.1 standard communication

❐ Cache memory unit ❐ Audio interface unit: uses PWM to produce

audio output
Ñ 2K direct-mapped instruction cache
❐ AC/DC specifications
Ñ 1K data cache with write-back for
reducing store operations Ñ 33-MHz maximum frequency
❐ Bus control unit Ñ 3.0-3.6 V operation

Ñ Supports 8-/16-bit external devices Ñ 200-mW typical power consumption

Ñ Supports subset of ISA bus Ordering Information

❐ Power management unit Part Number Package
Ñ 200-mW full-speed typical power mPD30101GM-33-8ED 160-pin LQFP
Ñ 30-mW standby power
Ñ 10-mW suspend power
Ñ 240-mW hibernate power
❐ Clock generator unit
Ñ Built-in PLL for frequency multiplication
Ñ External bus frequency of 16/33 MHz
Ñ All clocks generated from a single
external 32-kHz crystal

3
VR4101 MIPS RISC Microprocessor

Pin Configuration

160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
LCAS
UCAS
GND
DATA[9]

DATA[3]

GND

RAMWE

GND
VDD
GND
VDD

VDD

VDD
MRAS[1]
DATA[2]
ADD[7]

DATA[4]

ADD[3]

MRAS[3]

MRAS[0]
MEMW
MEMR
IOW
IOR
SHB
DATA[5]
ADD[5]
ADD[6]

ADD[4]
DATA[6]

ADD[2]
DATA[1]
ADD[1]
DATA[0]
ADD[0]

MRAS[2]
ADD[9]
DATA[8]
ADD[8]
DATA[7]
1 VDD GND 120
2 ADD[10] RSTOUT 119
3 DATA[10] IRQ 118
4 ADD[11] ZWS 117
5 DATA[11] PCMCLK 116
6 ADD[12] ROMOE 115
7 DATA[12] ROMCS[3] 114
8 GND ROMCS[2] 113
9 ADD[13] ROMCS[1] 112
10 DATA[13] ROMCS[0] 111
11 ADD[14] IC 110
12 DATA[14] IC 109
13 ADD[15] LCDRDY 108
14 DATA[15] LCDWE 107
15 GND LCDOE 106
16 VDD LCDCS 105
17 GND GND 104
18 VDD TOP VIEW VDD 103
19 ADD[16] CLKX2 102
20 ADD[17] CLKX1 101
21 ADD[18] 160-Pin LQFP GND 100
22 ADD[19] VDD 99
23 ADD[20] IC 98
24 KPORT[0] VDD 97
25 KPORT[1] GND 96
26 KPORT[2] GND 95
27 KPORT[3] VDD 94
28 KPORT[4] RTCRST 93
29 KPORT[5] RSTSW 92
30 KPORT[6] POWER 91
31 KPORT[7] AUDIOUT[0] 90
32 KSCAN[0]/EVUD AUDIOUT[1] 89
33 KSCAN[1]/EVINC MPOWER 88
34 KSCAN[2] IC 87
35 KSCAN[3] BATTINT 86
36 KSCAN[4] BATTINH 85
37 KSCAN[5] RxD 84
38 KSCAN[6] DCD 83
39 KSCAN[7] DSR 82
40 GND VDD 81
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
GPIO[3](IRPWR)
GPIO[4](RS232CPWR)
GPIO[5](DEBINT)
GPIO[6](Reserved2)

GPIO[12](Reserved1)
VDD
GPIO[0](LCDDPWR)
GPIO[1](LCDPWR)
GPIO[2](DISPOFF)

GPIO[7](EVCS)
GPIO[8](LCDRST)
GPIO[9](BATTLOCK)
GPIO[10](CARDLOCK)
GPIO[11](SPKPWR)
GND
VDD

PENCNT[0]
PENCNT[1]
GND
VDD
PENCNT[2]
PENCNT[3]
PENCNT[4]
ADEOC
PENCHGINT
ADCS
ADIN
ADCLK
ADSOUT
IRDOUT
GND
VDD
IRDIN
DDIN
DDOUT
RTS
TxD
DTR
CTS
GND

IC = Internal Connect 97YL-0040C (3/97)

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© 1997 NEC Electronics Inc./Printed in U.S.A. U11815EU3V0PB00