Design of an AC-to-DC Converter Based on a Flyback Converter with Active

Input Current Shaper

J.Sebastian*, A. Fernandez*, P.Villega<, M. M. Hetmando*and S. Ollero**

*Departamentode Ingenieria Electric%Electronica, de Coinputadores y Sistemas de la Universidad de Omedo.

Campus Universitario de Viesques S/N. 33204 Gijon. SPAIN
Phone:+34 985 18 20 85. Fax: +34 985 18 21 38. Mail: sebas(g$te.uniovi.es

**Alate1Alsthom Corporate Research Center. Energy Department. Ramirez de Prado 5.Madrid 28045. SPAIN

Abstract - This paper deals with the design of an ac-to-dc converter

based on a Flyback converter which uses the recently proposed
Active Input Current Shaper (AICS) to reduce the line current
harmonics, in order to comply with the IEC 1000-3-2
specifications, maintaining fast response. Several design
possibilities have been theoretically and experimentally
analyzed in order to achieve low cost, good efficiency and
compliance with the regulations.
All cases:
voev lo=o5-zA
I. INTRODUCTION n4=28 k=12
6=150nF Ga7pF
L = l . O M fvlOOkk
In search of low-cost, high-performance, ac-to-dc power 8‘5 m=n< bP0.43mH (Design m)
converters complying with IEC 1000-3-2 specifications,
many power topologies have been proposed and investigated.
These topologies can be divided into passive and active
solutions.
0 On the one hand, the major reason for the interest
in employing passive solutions in the waveshaping of the I ” I

line current arises from its simplicity, which implies their
potential to meet the desired specifications with high
efficiency and low cost [ 11. The input current waveform
obtained with passive solutions is not sinusoidal since
very bulky inductor should be used to obtain a perfect
sinusoidal input current [2]. Therefore, the main
converter
New elements
Source Resistor
Fig. 2: Implementations based on the Flyback converter: a) With additional
winding. b) Without additional winding (simpler implementation).
objective is to meet IEC 1000-3-2 specifications instead
of obtaining an almost perfect input current with very
high power factor.
0 On the other hand, active solutions with fast
output voltage regulation are usually based on two
switching conversion stages (input current waveshaping
plus dc-to-dc conversion) [3,4], sometimes integrated in
one stage which processes twice the output power [5,6],
sometimes with two stages which process the output
power less than twice [7-IO]. In all these cases. the input
current is sinusoidal (or quasi-sinusoidal when using
stages based on a boost converter operating in
discontinuous conduction mode).
However, a third option has recently been proposed. This
option is based on using standard dc-to-dc topologies with
slight changes in order to comply with regulations (such as
IEC 1000-3-2) at as low a cost as possible and maintaining
fast response [ 11,121 . In this case, the main objective, as in
the case of using passive solutions, is not to obtain a
sinusoidal (or almost sinusoidal) input current. but to obtain

-
Fig. 1 : a) Basic idea ofthe AICS proposed in [ 131. b) Equivalent circuit
an input current with a harmonic content which meets the
regulations. Cost and efficiency are of priinary concern here.
Following this principle, a new solution to meet
standards IEC 1000-3-2 with only a slight modification of
well-known topologies (flyback, forward, half-bridge,

0 1999 IEEE.
0-7803-5160-6/99/$10.00 84

. I I
,hll";
I
--
Fig. 3: Main voltages 'and input current at minimum
input voltiige and maximum input power (V,=V,,,,,
Vc=V,m, VS=VSIa d $c.= Ocmx).
SEPIC. Cuk. etc.) has recently been proposed [13]. Tliis
solution is based on the connection of one additional output
of the converter (obtained from the converter's transformer,
see Fig. la) between the input rectifier and the low-frequency
filter capacitor (bulk capacitor, CB). In appearance, the
additional output is similar to the main output of a Forward
converter. However, an extra inductor LDhas been connected
in series with the high-frequency rectifier diode D,. Thus,
this output is a "delayed output", proposed in [ 141 as second
output in a type of new completely regulated two-output dc-
to-dc converter. With this extra inductor and with the output
inductor L working in continuous conduction mode. the
Thevenin equivalent of the additional output consists of a
voltage source Vs plus a Loss-Free Resistor (LFR) RLF (see
Fig. lb). These elements connected in series between the line
rectifier and the bulk capacitor work as an input current
shaper (called Active Input Current Shaper. AICS, in [ 131).
This solution is in closely related to one particular
implementation of the converter presented in [IS].
In the type of converters introduced in [ 131, part of the
energy is re-cycled to help the low-frequency input rectifiers
to start conducting (that is, to improve the conduction angle
+c, Fig. lb). The hlgher this energy is, the wider the
conduction angle +c is but the higher the energy liandled by
the standard part of the converter is. Due to this fact, it is
94,
355 V dc
25 50 75 100
OutpLlt Power watts]
I I
684
25 50 75 100
OUput Power pflatts]
b)
Fig. 4: Efficiency for Design #l. Europa'an r'mge: a) As dc-to-dc
converter. b) As ac-to-dc converter with AICS.
expected that efficiency will decrease when the converter is
designed for high conduction angles. However, the higher
the conduction angle +c is, the lower the rms value of the
input current (for the same input power) is, and therefore.
the lower the conduction losses in some parts of the
converter are. It is expected that the efficiency will increase
due to this fact when the converter is designed for high
conduction angles. Therefore. these two different effects
must be taken into account when the converter is designed.
Moreover, the conduction angle +c must be larger than 67.5"
in order to comply with the IEC 1000-3-2.
The final converter must be designed aiming for as high a
efficiency as possible. whilst complying with the IEC 1000-
3-2. The influence of the design conditions (especially the
conduction angle +c) on the efficiency of a specific converter
is studied in this paper. This converter is an ac-to-dc
converter based on a Flyback topology (see Fig. 2) which
delivers l0OW to a regulated 54V distribution bus.
11. REVIEW OF THE DESIGN OF A FLYE)ACK CONVERTER
WITH AICS
As is demonstrated in [9-lo]. a forward output with an
additional inductor (LDin Fig. la) has a Thevenin equivalent
wliicli consists of a voltage source Vs plus a Loss-Free
Resistor (LFR) RLF (see Fig.lb). By properly choosing both
elements (voltage source and LFR), a good trade-off between
efficiency and harmonic content can be established [ 101. The
voltage source Vs helps the low-frequency diodes of the
input rectifier to start conducting. In fact, they start
conducting when the input voltage v,=V,sin(mt) reaches the
value (Vc-Vs). V,. being the voltage across the bulk capacitor
CB.Thus, the input current waveform i, will be:
0 If v,< (VC-Vs), then ig=O
If v,> (Vc-Vs), then ig=(vg+VS-VC)/RLF (1)
Therefore. the input current waveform consists of pieces of
positive and negative sinusoids (see Fig. lb), whose
conduction angle +c can be chosen to meet regulations with
I
as low a re-cycling power as possible. The conduction angle
+C can be easily obtained from (1):
The input power can be expressed as follows:
n+ar
__
I
The value of RLF must be chosen in such a way that V,.
equals V, at minimum peak value of the input voltage Vgnu,
and maximum input power Pgmm(see Fig. 3). The value of
the conduction angle is the maximum one ($I~,,,=) in these
85
 V" =-.-.n2 d
v,.
n, 1-d
and when Vg=Vgmu,:

This last equation allows us to obtain the value of the turns

ratio n2/ns.
The value of Vs also depends on d and VC:
LTAGE 100 Wdiv
v, =-."S d.V,
n,
From (9) and (11) we obtain:

L k I
b)
Fig. 5 , Input voltage and current for Design # 1, European r'mge: a) From (2), (3) and (12) tlie evolution of the voltage across the
Po=lOOW. b) Po=SOW. bulk capacitor can be computed using a computer program
conditions. whereas the value of Vs is Vsl. The design (we have used MathCad 5.0). The maximum reverse voltage
procedure starts by choosing the desired value of the across the main switch and diodes (excluding spikes) can be
conduction angle I$Creg at the peak value of the input voltage easily obtained from Vc:
specified in the regulations Vgeg(it should be noted that this 0 Flyback switch S:
angle must be larger than 67.4" to comply with the +
V,, = V,. V,, . n, I n2 (13)
regulations). The value of can be computed from ( 3 ) : 0 Flyback diode DF:
vim, (4 ('max - sin+ Cmax = V;eg (4 ,reg - sin4 rreg (4) +
V,, = V,, V, n 2 I n , (14)
Tile value of Vsl can be obtained from (2): 0 AICS diode DI:

vS1 = vgmin (l+-cosI$

2
1
Cmax ) (513
v,, = v,, " s 1 n2
* (15)
0 AICS diode DZ:
and RLFcan be easily computed from ( 3 ) : V,, = V,. - n, I n, (16)
('pin
RLF = (4 Cmax - sin4 Cmax 1 (6) 111. DESIGN OPTIONS
2nPpax
Equations (4)-(6) allows us to choose RLFand VSI (which is The converter to be designed is an ac-to-dc converter based
the value of Vs at the minimum input voltage, V,,). The on a Flyback topology which delivers l0OW to a regulated
values of the delayer inductor LD and the turns ratio nl/ns 54V distribution bus. Several possibilities have been taken
can be obtained from the definition of RLFand Vsl in [9-101: into account to design the above mentioned converter:
L D =RLF/fS (7)
Design #l. Two different converters, one for the
"s -
-- v,, (8),
American range (90V-130V) and the other for the
European range (190V-25OV). Both converters had the
"I 'pun * 'mu same devices, except the delayer inductor LD.
where fsis the switching frequency and dn,= is the maximum Design #2. One converter for the complete range (9OV-
value of the duty cycle d. However, many times, the value of 2SOV) with no extra winding.
nl/ns will be set equal to 1 in order to simplify the topology Design #3. The same as Design #2, but changing the
(see Fig. 2b). In'this case, (8) allows us to obtain the value of
d,, as a function of the desired value of Vsl.
Vg=220Vrms
PF =Ll845
The voltage across the bulk capacitor. across the switch and
across the diode (which are very important to design the
converter) for different values of the input voltage V, and of
the input power P, cannot be obtained from these equations. Measured
To obtain this information. it should be noted that the steady
state value of the output voltage V(, is maintained constant
by the output-voltage feedback loop. Assuming that the
c 0.1

0
2 3 4
yo,
5 6 7 8 9
10 11 12 1314
nth Harmonic
Flyback's transformer is operating in Continuous
Fig. 6: Hainionic content for Design #I. European range
Conduction Mode (CCM), the value of V, , will be:

86
 500 I I I I I I 1 I l l l l t l l l l l
L 25ov DCM GCM I
E
m 400
300
eQ , (in CCM)
(inCCM)

1
200
U
j 100 Measured +220 V m s
m I I

0
0 20 40 60 80 100
Output power [wl
Fig. 7: Voltage across the bulk capacitor for Design #I, European
range.

switching frequency from 1OOkHz to 150kHz when the

input voltage is in the European range.
Design #4. The same as Design #2, but with extra
winding to have higher conduction angles.

A. Design # I
Two prototypes of the converter shown in Fig. 2.b (one
for each input voltage range) have been built and tested.
The value of the delayer inductor LD is O.43inH for the
European range converter, whereas its value for the
American range converter is O.26mH. The efficiency of the
European range converter operating as a dc-to-dc converter
(dc input voltage connected in parallel with C,) is shown in
Fig. 4a, whereas its efficiency operating as an ac-to-dc
converter is depicted in Fig. 4b (only 5-7 points lower). The
input current waveforms for two different loads are shown in
Fig.5, whereas the harmonic content is given in Fig.6. The
measured Power Factor (PF) is 0.845,whereas the Total
Harmonics Distortion (THD) is 52%. The evolution of the
voltage across the bulk capacitor when the load changes is
shown in Fig. 7. As this figure shows, the voltage measured
at light load is lower than the one predicted theoretically,
due to the fact that the Flyback's transformer starts working
12N dc
156V dc
b)
Fig. 9: Input voltage and current for Design # 1. American
range: a) Po=lOOW. b) P0=50w.
in the Discontinuous Conduction Mode (DCM) at around
5OW. It should be noted that operation in the CCM in the
Flyback's tr'ansformer for all loads (which is the worst case
from the point of view of the voltage across the bulk
capacitor) has been assumed in (9). As Fig. 7 shows, a 450V
electrolytic capacitor can be used as bulk capacitor.
The same quantities are shown in Fig. 8-11 for the
converter designed for the American range. It should be
noted that only LD has been changed in this design.
Efficiencies are slightly lower due to the fact that the same
transistor has been used in this case (same RuS,,,)even
though, the current is higher. Also, the voltage drop across
the input diodes is more significant in this case. The
conduction angle at full load is higher (about 115' at 110V)
and, therefore, the converter belongs to Class A (Fig. IO).
The Power Factor and the THD have also been improved
(PF=0.918 and THD=36.5%). Finally, the voltage across the
bulk capacitor (Fig. 11) fits with the evolution predicted
theoretically because the Flyback's transformer operates in

t 1 the CCM for all the load range (0.5A-2A).

R. Design #2
0 50 100
Power [wl In this case, the converter designed for the American
a) range (that is, with Lr,=0.261nH) is used for the complete

130V ac
p _ -

11OV a
w 70
0 60 100
Power [wl 1 3 5 7 9 1 1 1 3
b) nth Harmonic
Fig. 10: Hamionic content for Design #I. American range.
Fig. 8: Efiiciency for Design #1, American range: a) & dc-to-dc converter. b)
As ac-to-dc converter with AICS.

87
 300 r I I I I I
E
a
130V rms
cs)
g 200
g
B 100
x 0 50 100
i Output power pnrl
I I Fig. 13: Conduction angle Oc for Design #2.
0 I I I I

20 40 60 80 I00 efficiencies for operation from a dc voltage source (in the

Output
. power -~
. [wl
Fig. 1 1 : Volkige across the hulk capacitor for Design # 1 ,
American range.
range (90V-25OV). The input current and voltage waveforms
are shown in Fig. 12 for different load values. The evolution
of the conduction angle is given in Fig. 13, whereas the
voltage across the bulk capacitor is shown in Fig. 14. As this
figure shows, this voltage is always lower than 450V due to
the operation in the DCM of the Flyback's transformer. The
harmonic content for all the harmonics specified in the IEC
1000-3-2 is given in Fig. 15, where it can be appreciated that
the converter complies with the regulations. However, the
hannonic content in tliis case is higher than in the first
design (PF=0.807, THD=58.8%), due the lower value of Ln
(and, therefore. of RLF) in comparison with that design.
Finally, Fig. 16a shows the efficiency of the converter
operating from the ac line and from a dc voltage source
connected in parallel with the bulk capacitor. This dc voltage
source has been set at the same value as the voltage across
the capacitor when the converter is operating froin the line
(it should be noted that this voltage has been changed for
each output power). Fig. 16b repeats the same quantities, but
around 220V. whereas the difference between the
above mentioned conditions) and from the ac line is given in
Fig. 16c. This figure shows that the penalty to be paid for
using the AICS is lower when the conduction angle is lower
(at 220V), at least when the converter is operating around
full load.
C-. Design #3
In this design, the switching frequency is changed from
IOOkHz to 15OkHz when the converter operates in the
European range. As Fig. 17 shows, the conduction angle
slightly increases (theoretically, it should increase loo, but
the increase observed was lower). As a consequence of the
higher switching frequency, the efficiency decreases about 2-
3 points.
D. Design #4
In this case, the converter has an extra winding ns
(n=ns/nl=1.5), as is shown in Fig. 2a. The input waveforms
at full load are given in Fig. 18a (ll0V) and in Fig. 18b
(220V). In this design. the conduction angle is 10-12'' higher
(compare Fig. 13 and Fig. 19) and the efficiency is lower, as
Fig. 20a shows; the difference between the efficiency with no
extra winding (n=1) and with extra winding (n=1.5) is
shown in Fig. 20b. Finally, the evolution of the voltage
across the bulk capacitor is given in Fig.21.

IV. CONCLIJSIONS

1. The best results from the point of view of

efficiency have been obtained designing two different

I l l l l l l l l l l
a)
I I I I I I I I I I I

100
Measwed

0 20 40 60 80 100
Output power
b)
Fig. 12: Input voltage and current for Design #2. European Fig. 14: Voltage across the hulk capacitor for Design #2. both
range: a) PO=lOOW. h) P0=50W. ranges.

88
 I I I I I ,

nth Harmonic
Fig. 15: Harmonic content for Design #2, Europenn range.
converters, one for the European and the other for the
American range of input voltages (Design #l).
2. If the converter for the American range of
voltages is designed for conduction angles at full load
and llOV about 115" (or higher), the converter will
comply with the IEC 1000-3-2 at 220V. Efficiency is
around 85% at full load (slightly lower than in Design
Fig. 17: Input voltage ,and current for Design #3. European
range (fs=15OkHz) and full load.
#l), but the cost will decrease. In tlus design (Design #2).
the Power Factor is 0.807 and the THD is 58.8%.
3. Changing the switching frequency from 100kI-I~
to 150kHz when the converter is operating connected to
the Europe<an line (Design #3), no significant
improvement in the conduction angle has been obtained

-25 loo 7
-
besides efficiency decreases 2-3points. Therefore, it is not
a good solution to improve the harmonic reduction.
4. A significant improvement in the conduction
390 angle (and, thus, in harmonic reduction) is obtained
S
.-
Q) using an extra winding (Design #4). In this case. a
80 - increase of 10-12" degrees implies that efficiency
iii 110Vrms decreases 2-3 points.
5. It should be noted that efficiency usually decreases
0 50 I00 when the conduction angle increases. Designing in such
Output Power [wl a way that the conduction angle at 220V is around 75".
a) good efficiency and compliance are achieved.

loomREFERENCES
[ l]M. Jovanovic and D. Crow, ''Merits and Limitations of Full Bridge Rectifier
with LC Filter in Meeting IEC 1000-3-2 Harmonic-Limit
Specifications", IEEE Trans. on Ind. Applicat. 1.997, pp.55 1-557.

[2] V. Vorp6rian and R. B. Ridley "A simple scheme for unity power factor
rectification for high frequency ac buses". IEEE Trans. on Power
Electronics, January 1990, pp.77-87.
70
0 50 1OD [3] R.J. Kocher and R.L. Steigenvald, "An dc-to-dc converter with high quality
Output Power pnl input waveforms", IEEE Trans. Ind. Applicat. vol. IA-19. no.4, pp. 586-
599, JulyIAug. 1983.
b)
[4] L.H. Dixon. "High power factor preregulators for off-line power supplies".
llnitrode Power Supply Design Seminar, 1988. pp. 6.1-6.16.
11OVrms
[5] M. Madigan, R. Erickson and E. Ismail, "Integrated high quality rectifier-
regulators", Proc. IEEE PESC 1992, pp. 1043-1051.
.-
.-0 [6] R. Redl, L. Balogh and N. Sokal, "A new family of single-stage isolated
E power-factor correctors with f a t regulation of the output voltage", Proc.
IEEE PESC 1994, pp. 1137-1144.
Q
'0 20 40 60 80 100 [7] M.H. Kheraluwala. R.L. Steigenvald and R. Gummoorthy, "A fat-response
Output Power [wl high power fxtor converter with a single power stage", Proc.IEEE PESC
a
Fig. 16: Eficiency for Design #2, comparing
1991, pp. 769-779.

values as dc-to-dc converter with values as ac-
to-dc converter with AICS: a) American range.
b) European range. c) Difference between
efficiencies as dc-to dc converter and ac-to-dc
converter for both ranges.
[8] Y. Jiang, F.C. Lee, G. Hua and W. Tang, "A novel single-phase power
factor correction scheme". Proc. IEEE APEC 1993. pp. 287-292.
191 Y. Jiang and F.C. Lee. "Single-szage single-phase parallel power factor
correction scheme", IEEE PESC 1994, pp.1145-1151.

89
[ l b i J. Sebastizin. P. Villegas, M. M. Hemando and S. Ollero, “High Quality
Flyback Power Factor Corrector B‘ased on a Two-Input Buck Post-
Regulator”. Proc. IEEE APEC 1997, pp.288-294.

[ 1 11 F.Tsai, P.Markowski and E. Whitcomb. “Off-Line Flyback Converter with

Input Harmonic Current Correction”, IEEE Intemational
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[ 121 L.Huber and M. Jovanovic, “Single-Stage, Single-Switch, Isolated Power

Supply Technique with Input-Current Shaping and Fast Output-Voltage
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APEC, 1.997,pp.272-280. 70
0 20 40 60 80 I00
[ 131 J.Seb,?stiin, M.M.Hemando, P.ViIlegas, J.Diaz and A Fonth, “Input Output Power Iw]
Current Shaper Based on the Series Connection of a Voltage Source and a)
a Loss-Free Resistor”, IEEE APEC 1998, pp. 461-467.

[ 14) J. Uceda and J. Sebastiin, “Two different types of fully regulated two-
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[ 151 L.Huber and M. Jovanovic, “Design Optimization of Single-Stage, Single-

Switch Input-Current Shapers”, IEEE PESC 1997, pp. 519-526.
- 0 20 40 60 80
Output Power [wl
100

b)
Fig. 20: a) Comparing efficiency in Design #2 (n=l)
and Design #4 (n= 1.5) for both ranges. b) Difference
between efficiencies for both ranges.

r I I 1 I 1
E400
Q)

9
g 11OV rms -
fJ200
++’
U
Measured
I
{:
I I I
A

Output power [WJ

Fig. 2 1: Voltage across the bulk capacitor for Design #4, both
ranges.

b)
Fig. 18: Input v o h g e and current for Design
#4 and full load a) American range. b)
European range.
150 I

0 50 100 I This wok has been supported by the CICYT (Project TIC97-0936) and by the

Output power pnrl FICYT (Project PA-TDI96-03)

Fig. 19: Conduction ‘angle $C for Design #4.