THE ISLAMIC UNIVERSITY OF GAZA

ENGINEERING FACULTY DEPARTMENT OF

COMPUTER ENGINEERING DIGITAL LOGIC

DESIGN LAB – ECOM 2112

Experiment5
BCD Adder and Comparator

Eng. Mai Z. Alyazji

November, 2016
DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

Objectives:
To be familiar with BCD adder/ subtractor circuits.
To be familiar with digital comparators circuits.

PreLab:
Using Logisim implement the circuit shown in Figure 3 and test it.

Background:

Binary-Coded Decimal Code

BCD is a class of binary encodings of decimal numbers where each decimal
digit is represented by a fixed number of bits, four bits. For example decimal
396 is represented in BCD with 12 bits as 0011 1001 0110. A decimal number
in BCD is the same as its equivalent binary number only when the number is
between 0 and 9. A BCD number greater than 10 looks different from its
equivalent binary number, even though both contain 1’s and 0’s. Moreover,
the binary combinations 1010 through 1111 are not used and have no
meaning in BCD.

Decimal
BCD Digit
Symbol
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001

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DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

BCD Addition
Consider the addition of two decimal digits in BCD, together with a possible
carry from a previous less significant pair of digits. Since each digit does not
exceed 9, the sum cannot be greater than 9 + 9 + 1 = 19, with the 1 being a
previous carry. Suppose we add the BCD digits as if they were binary
numbers. Then the binary sum will produce a result in the range from 0 to 19.
In binary, this range will be from 0000 to 10011, but in BCD, it is from 0000 to
1 1001, with the first (i.e., leftmost) 1 being a carry and the next four bits
being the BCD sum. When the binary sum is equal to or less than 1001
(without a carry), the corresponding BCD digit is correct. However, when the
binary sum is greater than or equal to 1010, the result is an invalid BCD digit.
The addition of 6 = (0110)2 to the binary sum converts it to the correct digit
and also produces a carry as required. This is because a carry in the most
significant bit position of the binary sum and a decimal carry differ by 16 - 10
= 6. See the following example which shows the addition of 791 and 658 in
BCD.
1 1 1
0111 1001 0001
+
0110 0101 1000
1 1 1 11 1 1
1101 1110 1001
0110 0110 +

0001 0100 0100 1001

BCD Adder
Suppose we apply two BCD digits to a four-bit binary adder. The adder will
form the sum in binary and produce a result that ranges from 0 through 19.
These binary numbers are listed in Table 1. The problem is to find a rule by
which the binary sum is converted to the correct BCD digit representation of
the number in the BCD sum. In examining the contents of the table, it becomes
apparent that when the binary sum is equal to or less than 1001, the

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DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

corresponding BCD number is identical, and therefore no conversion is

needed. When the binary sum is greater than 1001, we obtain an invalid BCD
representation. The addition of binary 6 (0110) to the binary sum converts it
to the correct BCD representation and also produces an output carry as
required.

Table 1 Derivation of BCD Adder

The logic circuit that detects the necessary correction can be derived from the
entries in the table. It is obvious that a correction is needed when the binary
sum has an output carry K = 1. The other six combinations from 1010 through
1111 that need a correction have a 1 in position Z8. To distinguish them from
binary 1000 and 1001, which also have a 1 in position Z8, we specify further
that either Z4 or Z2 must have a 1. The condition for a correction and an output
carry can be expressed by the Boolean function

C = K + Z8Z4 + Z8Z2

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DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

When C = 1, it is necessary to add 0110 to the binary sum and provide an

output carry for the next stage.

A BCD adder that adds two BCD digits and produces a sum digit in BCD is
shown in Figure 1.

Figure 1 BCD Adder

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DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

Comparator
The comparison of two numbers is an operation that determines whether one
number is greater than, less than, or equal to the other number. A magnitude
comparator is a combinational circuit that compares two numbers A and B
and determines their relative magnitudes.

A B A>B A=B A<B

0 0 0 1 0
0 1 0 0 1
1 0 1 0 0
1 1 0 1 0
Table 2 The truth table of 1-bit comparator

Figure 2 Logic diagram of 1-bit comparator

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DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

To implement a 4-bit comparator consider two numbers, A and B , with four

digits each. Write the coefficients of the numbers in descending order of
significance:

A = A3 A2 A1 A0

B = B3 B2 B1 B0

Each subscripted letter represents one of the digits in the number. The two
numbers are equal if all pairs of significant digits are equal: A3 = B3, A2 = B2, A1
= B1, and A0 = B0. When the numbers are binary, the digits are either 1 or 0,
and the equality of

each pair of bits can be expressed logically with an exclusive-NOR function as

xi = AiBi + A’i B’i for i = 0, 1, 2, 3 where xi = 1 only if the pair of bits in position i
are equal (i.e., if both are 1 or both are 0).

The equality of the two numbers A and B is displayed in a combinational

circuit by an output binary variable that we designate by the symbol (A = B).
This binary variable is equal to 1 if the input numbers, A and B , are equal, and
is equal to 0 otherwise. For equality to exist, all xi variables must be equal to 1,
a condition that dictates an AND operation of all variables:

(A = B) = x3x2x1x0

The binary variable (A = B) is equal to 1 only if all pairs of digits of the two
numbers are equal.

To determine whether A is greater or less than B , we inspect the relative

magnitudes of pairs of significant digits, starting from the most significant
position. If the two digits of a pair are equal, we compare the next lower
significant pair of digits. The comparison continues until a pair of unequal
digits is reached. If the corresponding digit of A is 1 and that of B is 0, we
conclude that A > B. If the corresponding digit of A is 0 and that of B is 1, we
have A < B. The sequential comparison can be expressed logically by the two
Boolean functions

(A > B) = A3B’3 + x3 A 2B’2 + x3x2A1B’1 + x3x2x1A0B’0

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DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

(A < B) = A’3B3 + x3A’2B2 + x3x2A’1B’1 + x3x2x1A’n0B’0

The symbols (A > B) and (A < B) are binary output variables that are equal to
1 when A > B and A < B, respectively. Figure 3 show a 4-bit comparator.

Figure 3 Four-bit comparator

Lab work:

Equipment’s required:
IC's 74LS04 (Hex Inverter), 74LS08 (Quad 2 input AND), 74LS32 (Quad
2 input OR), 74LS86 (Quad 2 input Exclusive OR), 74LS83 (4-bit binary
adder)
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DIGITAL LOGIC DESIGN LAB ECOM 2112 ENG. Mai Z. Alyazji

Module KL-33004.
The Datasheets of the IC’s.

Part I: BCD Adder

Construct the BCD adder using module KL-33004

Part II: Comparator

Construct 1-bit comparator as shown in Figure 2.
Use 74LS85 IC to construct a 4-bit comparator.


Exercises:
Using Logisim

Design 8-bit BCD adder-subtractor.

Design 8-bit comparator using 2 of 4-bit comparator