Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
CO 1 Know the human body electro- physiological parameters and recording of bio-potentials
Sources of bio medical signals, Bio-potentials, Biopotential electrodes, biological amplifiers, ECG,EEG,
EMG, PCG, typical waveforms and signal characteristics.
UNIT -I1 Bio-Chemical and Non Electrical Parameter Measurement (10Hrs)
pH, PO2, PCO2, Colorimeter, Blood flow meter, Cardiac output, respiratory, blood pressure,temperature
and pulse measurement, Blood Cell Counters.
UNIT -1II Assist Devices (9 Hrs)
Diathermies- Shortwave, ultrasonic and microwave type and their applications, Surgical Diathermy,
Biotelemetry.
UNIT -V Recent Trends in MedicalInstrumentation ( 9 Hrs)
Telemedicine, Insulin Pumps, Radio pill, Endomicroscopy, Brain machine interface, Lab on a chip.
TEXT BOOKS
UNIT 1-5 1.
‘Biomedical Instrumentation and Measurement’, Leslie Cromwell, 2007, Prentice
Hall of India, New Delhi . (UNIT I – V)
REFERENCE BOOKS
1. ‘Handbook of Biomedical Instrumentation’, Khandpur, R.StataMcGraw-Hill, New
Delhi,2003.
UNIT 1-5
2. ‘Medical Instrumentation Application and Design’ , John G.Webster , 3 rd Edition, Wiley
India Edition, 2007
3. ‘Introduction to Biomedical Equipment Technology’ , Joseph J.Carr and John M.Brown
John Wiley and Sons, New York, 2004.
WEB RESOURCES
1. https://en.wikipedia.org/wiki/Biomedical_engineering
2. https://guides.lib.uh.edu/biomedical
COs/POs/PSOs Mapping
Program Specific
Program Outcomes (POs)
COs Outcomes (PSOs)
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
1 3 1 1 2 2 1 1 1 - - - 1 2 2 -
2 3 1 1 1 2 1 - 1 - 1 1 1 2 3 1
3 3 1 - 1 2 1 - - 2 - - 1 2 3 1
4 3 1 - 1 1 1 - 1 - 1 - 1 2 2 1
5 3 - 1 1 2 - - 1 - - - 1 2 2 -
L T P C
CODE ERROR CORRECTING CODE
3 0 0 3
COURSE OBJECTIVES
1 To learn the binary field arithmetic in the context of Galois Field to Groups
2 To learn Linear Block Codes for minimum distance considerations and decoding circuits.
3 To design and develop cyclic codes using multiplication circuits
4 To implement BCH codes for error correction and detection
5 To implement Hamming codes, cyclic codes, convolutional codes and Viterbi algorithms.
COURSE OUTCOMES
Upon completion of the course, students shall have ability to
1 Apply properties of Galois Field to Groups, Fields, Vector Spaces, row space and sub-spaces.
2 Describe RM codes in error detection and error correction.
3 Demonstrate cyclic block codes in error detection and correction.
4 Illustrate various BCH Codes and apply them for error detection & correction.
5 Construct higher-order error-control codes and use Viterbi & stack algorithms for decoding.
COURSE CONTENTS
UNIT -1 Introduction to algebra (9 Hrs)
Groups, Fields, binary field arithmetic, Construction of Galois Field GF (2m) and its properties,
Computation using Galois filed GF (2m) arithmetic, Vector spaces and matrices on Galois field.
UNIT -I1 Linear block codes ( 9 Hrs)
Generator and parity check matrices, Encoding circuits, Syndrome and error detection and error correcting
capabilities, Minimum distance considerations, decoding circuits, Hamming codes, Reed-Muller codes.
UNIT -1II Cyclic codes (9 Hrs)
Introduction, Generator and parity check polynomials, Encoding using multiplication circuits, Systematic
cyclic codes – generator matrix for cyclic code, Encoding using feedback shift register circuits, Meggitt
decoder, Error trapping decoding, Cyclic hamming codes, Golay code, Shortened cyclic codes.
UNIT -1V BCH codes (9
Hrs)
Binary primitive BCH codes, Decoding procedures, Implementation of Galois field arithmetic,
Implementation of error correction.
UNIT -V Convolutional codes (9
Hrs)
Encoding of convolutional codes, Viterbi decoding algorithm for decoding, soft output Viterbi algorithm,
Shano and Fano sequential decoding algorithms, Matrices on Galois field, Syndrome and error detection,
Hamming codes, Generator matrix for cyclic code, Encoding using shift register circuit, Encoding of
convolutional codes, Implementation of Hamming codes, cyclic codes, convolutional codes and Viterbi
algorithm.
TEXT BOOKS
UNIT 1-5 1. Shu Lin and Daniel J. Costello. Jr, “Error control coding”, 2nd Edition, Pearson,
Prentice Hall, 2010.
2. Blahut. R. E, “Theory and practice of Error control codes”, Addison Wesley, 1984.
REFERENCE BOOKS
UNIT 1-5 1. Patrick Guy Farrell, Jorge Castineira Moreira, “Essentials of Error Control Coding”, John
Wiley & Sons, 2010.
2. Todd K.Moon, “Error Correcting Codes”, 1st Edition, John Wiley & Sons, 2006.
WEB RESOURCES
1. https://plus.maths.org/content/error-correcting-codes
2. https://www.i-programmer.info/babbages-bag/214-error-correcting-codes.html
COs/POs/PSOs Mapping
Program Specific
Program Outcomes (POs)
COs Outcomes (PSOs)
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
1 2 2 3 1 2
2 2 1 2
3 1 2 3 1 2 1 2
4 2 2 1
5 1 2 2 3 1 1 2
COGNITIVE RADIO L T P C
CODE
COMMUNICATION 3 0 0 3
COURSE OBJECTIVES
To learn dynamic spectrum access (DSA), and the various components of cognitive radio, for
1
spectrum sensing and analysis
2 To learn the procedures and methods for spectrum sensing
3 To learn dynamic spectrum access and management and analyse spectrum mobility issues.
4 Indicate the modern cognitive radio data concepts and features to be incorporated for secured
data transfer as per societal needs.
5 To understand the various functionalities of software defined radio.
COURSE OUTCOMES
Upon completion of the course, students shall have ability to
1 An understanding on cognitive radio components, functions and capabilities.
2 Evaluate different spectrum sensing mechanisms in cognitive radio.
3 Analyse the spectrum management functions using cognitive radio systems and cognitive radio
networks.
4 Understand software defined radio architecture and design principles.
5 To implement various reconfigurable wireless communication systems.
COURSE CONTENTS
UNIT -1 Introduction to Cognitive Radios (9
Hrs)
Digital dividend, cognitive radio (CR) architecture, functions of cognitive radio, dynamic spectrum access
(DSA), components of cognitive radio, spectrum sensing, spectrum analysis and decision, potential
applications of cognitive radio.
UNIT -I1 Spectrum Sensing ( 9 Hrs)
Spectrum sensing and identification, primary signal detection. energy detector, cyclostationary feature
detector, matched filter, cooperative sensing, spectrum opportunity, spectrum opportunity detection,
fundamental trade-offs: performance versus constraint, sensing accuracy versus sensing overhead.
UNIT -1II Dynamic Spectrum Access and Management (9
Hrs)
Spectrum broker, Dynamic spectrum access architecture- centralized dynamic spectrum access, distributed
dynamic spectrum access, Inter- and intra-RAN dynamic spectrum allocation, Spectrum management,
Spectrum sharing, Spectrum mobility issues.
UNIT -1V Cognitive Radio Networks (9
Hrs)
Cognitive radio networks (CRN) architecture, terminal architecture of CRN, diversity radio access networks,
routing in CRN, Control of CRN, Self-organization in mobile communication networks, security in CRN,
cooperative communications, cooperative wireless networks, user cooperation and cognitive systems.
UNIT -V Software Defined Radio (SDR) (9
Hrs)
Essential functions of the SDR, SDR architecture, design principles of SDR, traditional radio implemented
in hardware and SDR, transmitter architecture and its issues, digital radio processing, reconfigurable
wireless communication systems.
TEXT BOOKS
1. Ekram Hossain, Dusit Niyato, Zhu Han, “Dynamic Spectrum Access and Management in
UNIT 1-5 Cognitive Radio Networks”, Cambridge University Press, 2009.
2. Kwang-Cheng Chen, Ramjee Prasad, “Cognitive radio networks”, John Wiley & Sons
Ltd., 2009.
REFERENCE BOOKS
3. Alexander M. Wyglinski, Maziar Nekovee, and Y. Thomas Hou, “Cognitive Radio
UNIT 1-5 Communications and Networks - Principles and Practice”, Elsevier Inc., 2010.
4. Jeffrey H. Reed “Software Radio: A Modern Approach to radio Engineering", Pearson
Education Asia.
WEB RESOURCES
3. https://www.cmsoc.org/publications/best-readings/cognitive-radio
4. https://searchnetworking.techtarget.com/definition/cognitive-radio
COs/POs/PSOs Mapping
Program Specific
Program Outcomes (POs)
COs Outcomes (PSOs)
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
1 1 1 2 1 1 2
2 1 1 2 2 1
3 2 2 2 3 1
4 1 2 3 1 1 2
5 2 3 1 2 1
L T P C
ROBOTICS
3 0 0 3
COURSE OBJECTIVES
COs/POs/PSOs Mapping
Program Specific
Program Outcomes (POs)
COs Outcomes (PSOs)
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
1 3 2 1 2 1 - - - - - - - 3 2 -
2 3 2 1 2 1 - - - - - - - 3 2 -
3 3 2 1 2 1 - - - - - - - 3 2 -
4 3 2 1 2 1 - - - - - - - 3 2 -
5 3 2 1 2 1 - - - - - - 2 3 2 -
TESTING AND VERIFICATION OF VLSI L T P C
CODE
CIRCUITS 3 0 0 3
COURSE OBJECTIVES
COURSE OUTCOMES
CO1 Understand how to abstract physical faults in VLSI circuits as logical fault models
Apply core decision principles based on Boolean and algebraic reasoning to test and verify
CO2
digital systems
CO3 Understand chip level, system level test strategies
CO4 Analyze different design circuits which is easier to test
Analyze and find verify whether a circuit implementation is bug free or functionally equivalent
CO5
to its specification
COURSE CONTENTS
UNIT - I FAULTS IN DIGITAL CIRCUITS (9 Hrs)
Modeling of faults, Logical Fault Models, Fault detection ,Fault location ,Fault dominance, CMOS testing,
Manufacturing test principles ,Design Strategies for test, chip level test techniques ,System level test
techniques, Testability features for board test
UNIT -II AUTOMATIC TEST PATTERN GENERATION (9 Hrs)
Fault Table, Boolean difference, Path sensitization, D algorithm, Sequential circuits, Random test vectors
Serial, Single-fault propagation, Deductive, Parallel and Concurrent Simulation
UNIT -III BUILT IN SELF-TEST (9 Hrs)
Scan-in Scan-out design, Signature analysis, Built In Self Test, Test pattern generation for BIST, Circular
BIST, BIST Architectures, Testable Memory Design, Test algorithms, Test generation for Embedded RAMs
UNIT -IV FAULT DIAGNOSIS (9 Hrs)
Logic Level Diagnosis, Diagnosis by UUT reduction, Fault Diagnosis for Combinational Circuits, Self-
checking design, System Level Diagnosis
UNIT -V VERIFICATION (9 Hrs)
Design verification techniques based on simulation, analytical and formal approaches, function Verification,
timing verification, formal verification, basics of equivalence checking and model Checking, hardware
emulation
TEXT BOOKS
1. P.K. Lala, "Digital Circuit Testing and Testability", Academic Press, 2002
2. M. Abramovici M.A, Breuer and A.D Friedman, “Digital Systems Testing and
UNIT 1-5 3. Testable Design”, Computer Sciences Press, 2002
4. M.L. Bushnell and V.D. Agarwal, "Essentials of Electronic Testing for Digital, Memory
and Mixed-Signal VLSI Circuits", Kluwer Academic Publishers, 2002
REFERENCE BOOKS
1. Robert J.Feuguate, Jr. Steven M.Mcintyre, “Introduction to VLSI testing’, Prentice Hall,
Englewood Cliffs, 1998
2. Kropf.T, “Introduction to Formal Hardware verification”, Springer Verlag 1999
UNIT 1-5 3. Rashinkar,Patterson and Singh, “ System on chip verification methodology and
techniques” Kluver academics, 2001
4. LaungTerngWang,Cheng Wen Wu, XiaoqingWen,”VLSI test principles and
architectures” Morgan Kaufmann, 2011
WEB RESOURCES
1. https://nptel.ac.in/courses/117103125/18
2. http://www.cs.colostate.edu/~malaiya/530/08/resources.html
3. https://nptel.ac.in/syllabus/syllabus_pdf/117103125.pdf
COs/POs/PSOs Mapping
Program Specific
Program Outcomes (POs)
COs Outcomes (PSOs)
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
1 1 2 3 - - - - - - - - - 2 - -
2 1 2 2 - - - - - - - - - 2 - -
3 1 2 3 - - - - - - - - - 2 - -
4 1 2 2 - - - - - - - - - 2 - -
5 1 2 2 3 - - - - - - - - 2 - -